Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 1 | //===-- ARMISelDAGToDAG.cpp - A dag to dag inst selector for ARM ----------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file defines an instruction selector for the ARM target. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #include "ARM.h" |
Evan Cheng | e5ad88e | 2008-12-10 21:54:21 +0000 | [diff] [blame] | 15 | #include "ARMAddressingModes.h" |
| 16 | #include "ARMConstantPoolValue.h" |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 17 | #include "ARMISelLowering.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 18 | #include "ARMTargetMachine.h" |
Rafael Espindola | 84b19be | 2006-07-16 01:02:57 +0000 | [diff] [blame] | 19 | #include "llvm/CallingConv.h" |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 20 | #include "llvm/Constants.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 21 | #include "llvm/DerivedTypes.h" |
| 22 | #include "llvm/Function.h" |
| 23 | #include "llvm/Intrinsics.h" |
| 24 | #include "llvm/CodeGen/MachineFrameInfo.h" |
| 25 | #include "llvm/CodeGen/MachineFunction.h" |
| 26 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
| 27 | #include "llvm/CodeGen/SelectionDAG.h" |
| 28 | #include "llvm/CodeGen/SelectionDAGISel.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 29 | #include "llvm/Target/TargetLowering.h" |
Chris Lattner | 7293912 | 2007-05-03 00:32:00 +0000 | [diff] [blame] | 30 | #include "llvm/Target/TargetOptions.h" |
Chris Lattner | 3d62d78 | 2008-02-03 05:43:57 +0000 | [diff] [blame] | 31 | #include "llvm/Support/Compiler.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 32 | #include "llvm/Support/Debug.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 33 | using namespace llvm; |
| 34 | |
Bob Wilson | 5bafff3 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 35 | static const unsigned arm_dsubreg_0 = 5; |
| 36 | static const unsigned arm_dsubreg_1 = 6; |
| 37 | |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 38 | //===--------------------------------------------------------------------===// |
| 39 | /// ARMDAGToDAGISel - ARM specific code to select ARM machine |
| 40 | /// instructions for SelectionDAG operations. |
| 41 | /// |
| 42 | namespace { |
| 43 | class ARMDAGToDAGISel : public SelectionDAGISel { |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 44 | ARMBaseTargetMachine &TM; |
Evan Cheng | 3f7eb8e | 2008-09-18 07:24:33 +0000 | [diff] [blame] | 45 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 46 | /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can |
| 47 | /// make the right decision when generating code for different targets. |
| 48 | const ARMSubtarget *Subtarget; |
| 49 | |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 50 | public: |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 51 | explicit ARMDAGToDAGISel(ARMBaseTargetMachine &tm) |
Dan Gohman | 79ce276 | 2009-01-15 19:20:50 +0000 | [diff] [blame] | 52 | : SelectionDAGISel(tm), TM(tm), |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 53 | Subtarget(&TM.getSubtarget<ARMSubtarget>()) { |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 54 | } |
| 55 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 56 | virtual const char *getPassName() const { |
| 57 | return "ARM Instruction Selection"; |
Anton Korobeynikov | 5223711 | 2009-06-17 18:13:58 +0000 | [diff] [blame] | 58 | } |
| 59 | |
| 60 | /// getI32Imm - Return a target constant with the specified value, of type i32. |
| 61 | inline SDValue getI32Imm(unsigned Imm) { |
| 62 | return CurDAG->getTargetConstant(Imm, MVT::i32); |
| 63 | } |
| 64 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 65 | SDNode *Select(SDValue Op); |
Dan Gohman | f350b27 | 2008-08-23 02:25:05 +0000 | [diff] [blame] | 66 | virtual void InstructionSelect(); |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 67 | bool SelectShifterOperandReg(SDValue Op, SDValue N, SDValue &A, |
| 68 | SDValue &B, SDValue &C); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 69 | bool SelectAddrMode2(SDValue Op, SDValue N, SDValue &Base, |
| 70 | SDValue &Offset, SDValue &Opc); |
| 71 | bool SelectAddrMode2Offset(SDValue Op, SDValue N, |
| 72 | SDValue &Offset, SDValue &Opc); |
| 73 | bool SelectAddrMode3(SDValue Op, SDValue N, SDValue &Base, |
| 74 | SDValue &Offset, SDValue &Opc); |
| 75 | bool SelectAddrMode3Offset(SDValue Op, SDValue N, |
| 76 | SDValue &Offset, SDValue &Opc); |
| 77 | bool SelectAddrMode5(SDValue Op, SDValue N, SDValue &Base, |
| 78 | SDValue &Offset); |
Bob Wilson | 8b024a5 | 2009-07-01 23:16:05 +0000 | [diff] [blame] | 79 | bool SelectAddrMode6(SDValue Op, SDValue N, SDValue &Addr, SDValue &Update, |
| 80 | SDValue &Opc); |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 81 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 82 | bool SelectAddrModePC(SDValue Op, SDValue N, SDValue &Offset, |
Bob Wilson | 8b024a5 | 2009-07-01 23:16:05 +0000 | [diff] [blame] | 83 | SDValue &Label); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 84 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 85 | bool SelectThumbAddrModeRR(SDValue Op, SDValue N, SDValue &Base, |
| 86 | SDValue &Offset); |
| 87 | bool SelectThumbAddrModeRI5(SDValue Op, SDValue N, unsigned Scale, |
| 88 | SDValue &Base, SDValue &OffImm, |
| 89 | SDValue &Offset); |
| 90 | bool SelectThumbAddrModeS1(SDValue Op, SDValue N, SDValue &Base, |
| 91 | SDValue &OffImm, SDValue &Offset); |
| 92 | bool SelectThumbAddrModeS2(SDValue Op, SDValue N, SDValue &Base, |
| 93 | SDValue &OffImm, SDValue &Offset); |
| 94 | bool SelectThumbAddrModeS4(SDValue Op, SDValue N, SDValue &Base, |
| 95 | SDValue &OffImm, SDValue &Offset); |
| 96 | bool SelectThumbAddrModeSP(SDValue Op, SDValue N, SDValue &Base, |
| 97 | SDValue &OffImm); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 98 | |
Evan Cheng | 9cb9e67 | 2009-06-27 02:26:13 +0000 | [diff] [blame] | 99 | bool SelectT2ShifterOperandReg(SDValue Op, SDValue N, |
| 100 | SDValue &BaseReg, SDValue &Opc); |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 101 | bool SelectT2AddrModeImm12(SDValue Op, SDValue N, SDValue &Base, |
| 102 | SDValue &OffImm); |
| 103 | bool SelectT2AddrModeImm8(SDValue Op, SDValue N, SDValue &Base, |
| 104 | SDValue &OffImm); |
David Goodwin | 6647cea | 2009-06-30 22:50:01 +0000 | [diff] [blame] | 105 | bool SelectT2AddrModeImm8s4(SDValue Op, SDValue N, SDValue &Base, |
| 106 | SDValue &OffImm); |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 107 | bool SelectT2AddrModeSoReg(SDValue Op, SDValue N, SDValue &Base, |
| 108 | SDValue &OffReg, SDValue &ShImm); |
| 109 | |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 110 | // Include the pieces autogenerated from the target description. |
| 111 | #include "ARMGenDAGISel.inc" |
Bob Wilson | 224c244 | 2009-05-19 05:53:42 +0000 | [diff] [blame] | 112 | |
| 113 | private: |
Evan Cheng | af4550f | 2009-07-02 01:23:32 +0000 | [diff] [blame] | 114 | SDNode *SelectARMIndexedLoad(SDValue Op); |
| 115 | |
| 116 | /// SelectInlineAsmMemoryOperand - Implement addressing mode selection for |
| 117 | /// inline asm expressions. |
| 118 | virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op, |
| 119 | char ConstraintCode, |
| 120 | std::vector<SDValue> &OutOps); |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 121 | }; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 122 | } |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 123 | |
Dan Gohman | f350b27 | 2008-08-23 02:25:05 +0000 | [diff] [blame] | 124 | void ARMDAGToDAGISel::InstructionSelect() { |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 125 | DEBUG(BB->dump()); |
| 126 | |
David Greene | 8ad4c00 | 2008-10-27 21:56:29 +0000 | [diff] [blame] | 127 | SelectRoot(*CurDAG); |
Dan Gohman | f350b27 | 2008-08-23 02:25:05 +0000 | [diff] [blame] | 128 | CurDAG->RemoveDeadNodes(); |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 129 | } |
| 130 | |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 131 | bool ARMDAGToDAGISel::SelectShifterOperandReg(SDValue Op, |
| 132 | SDValue N, |
| 133 | SDValue &BaseReg, |
| 134 | SDValue &ShReg, |
| 135 | SDValue &Opc) { |
| 136 | ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N); |
| 137 | |
| 138 | // Don't match base register only case. That is matched to a separate |
| 139 | // lower complexity pattern with explicit register operand. |
| 140 | if (ShOpcVal == ARM_AM::no_shift) return false; |
| 141 | |
| 142 | BaseReg = N.getOperand(0); |
| 143 | unsigned ShImmVal = 0; |
| 144 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
| 145 | ShReg = CurDAG->getRegister(0, MVT::i32); |
| 146 | ShImmVal = RHS->getZExtValue() & 31; |
| 147 | } else { |
| 148 | ShReg = N.getOperand(1); |
| 149 | } |
| 150 | Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), |
| 151 | MVT::i32); |
| 152 | return true; |
| 153 | } |
| 154 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 155 | bool ARMDAGToDAGISel::SelectAddrMode2(SDValue Op, SDValue N, |
| 156 | SDValue &Base, SDValue &Offset, |
| 157 | SDValue &Opc) { |
Evan Cheng | a13fd10 | 2007-03-13 21:05:54 +0000 | [diff] [blame] | 158 | if (N.getOpcode() == ISD::MUL) { |
| 159 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
| 160 | // X * [3,5,9] -> X + X * [2,4,8] etc. |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 161 | int RHSC = (int)RHS->getZExtValue(); |
Evan Cheng | a13fd10 | 2007-03-13 21:05:54 +0000 | [diff] [blame] | 162 | if (RHSC & 1) { |
| 163 | RHSC = RHSC & ~1; |
| 164 | ARM_AM::AddrOpc AddSub = ARM_AM::add; |
| 165 | if (RHSC < 0) { |
| 166 | AddSub = ARM_AM::sub; |
| 167 | RHSC = - RHSC; |
| 168 | } |
| 169 | if (isPowerOf2_32(RHSC)) { |
| 170 | unsigned ShAmt = Log2_32(RHSC); |
| 171 | Base = Offset = N.getOperand(0); |
| 172 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, |
| 173 | ARM_AM::lsl), |
| 174 | MVT::i32); |
| 175 | return true; |
| 176 | } |
| 177 | } |
| 178 | } |
| 179 | } |
| 180 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 181 | if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB) { |
| 182 | Base = N; |
| 183 | if (N.getOpcode() == ISD::FrameIndex) { |
| 184 | int FI = cast<FrameIndexSDNode>(N)->getIndex(); |
| 185 | Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); |
| 186 | } else if (N.getOpcode() == ARMISD::Wrapper) { |
| 187 | Base = N.getOperand(0); |
| 188 | } |
| 189 | Offset = CurDAG->getRegister(0, MVT::i32); |
| 190 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(ARM_AM::add, 0, |
| 191 | ARM_AM::no_shift), |
| 192 | MVT::i32); |
Rafael Espindola | 6e8c649 | 2006-11-08 17:07:32 +0000 | [diff] [blame] | 193 | return true; |
| 194 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 195 | |
| 196 | // Match simple R +/- imm12 operands. |
| 197 | if (N.getOpcode() == ISD::ADD) |
| 198 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 199 | int RHSC = (int)RHS->getZExtValue(); |
Evan Cheng | e966d64 | 2007-01-24 02:45:25 +0000 | [diff] [blame] | 200 | if ((RHSC >= 0 && RHSC < 0x1000) || |
| 201 | (RHSC < 0 && RHSC > -0x1000)) { // 12 bits. |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 202 | Base = N.getOperand(0); |
Evan Cheng | e966d64 | 2007-01-24 02:45:25 +0000 | [diff] [blame] | 203 | if (Base.getOpcode() == ISD::FrameIndex) { |
| 204 | int FI = cast<FrameIndexSDNode>(Base)->getIndex(); |
| 205 | Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); |
| 206 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 207 | Offset = CurDAG->getRegister(0, MVT::i32); |
Evan Cheng | e966d64 | 2007-01-24 02:45:25 +0000 | [diff] [blame] | 208 | |
| 209 | ARM_AM::AddrOpc AddSub = ARM_AM::add; |
| 210 | if (RHSC < 0) { |
| 211 | AddSub = ARM_AM::sub; |
| 212 | RHSC = - RHSC; |
| 213 | } |
| 214 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, RHSC, |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 215 | ARM_AM::no_shift), |
| 216 | MVT::i32); |
| 217 | return true; |
Rafael Espindola | 6e8c649 | 2006-11-08 17:07:32 +0000 | [diff] [blame] | 218 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 219 | } |
| 220 | |
| 221 | // Otherwise this is R +/- [possibly shifted] R |
| 222 | ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::ADD ? ARM_AM::add:ARM_AM::sub; |
| 223 | ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOperand(1)); |
| 224 | unsigned ShAmt = 0; |
| 225 | |
| 226 | Base = N.getOperand(0); |
| 227 | Offset = N.getOperand(1); |
| 228 | |
| 229 | if (ShOpcVal != ARM_AM::no_shift) { |
| 230 | // Check to see if the RHS of the shift is a constant, if not, we can't fold |
| 231 | // it. |
| 232 | if (ConstantSDNode *Sh = |
| 233 | dyn_cast<ConstantSDNode>(N.getOperand(1).getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 234 | ShAmt = Sh->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 235 | Offset = N.getOperand(1).getOperand(0); |
| 236 | } else { |
| 237 | ShOpcVal = ARM_AM::no_shift; |
Rafael Espindola | 6e8c649 | 2006-11-08 17:07:32 +0000 | [diff] [blame] | 238 | } |
| 239 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 240 | |
| 241 | // Try matching (R shl C) + (R). |
| 242 | if (N.getOpcode() == ISD::ADD && ShOpcVal == ARM_AM::no_shift) { |
| 243 | ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOperand(0)); |
| 244 | if (ShOpcVal != ARM_AM::no_shift) { |
| 245 | // Check to see if the RHS of the shift is a constant, if not, we can't |
| 246 | // fold it. |
| 247 | if (ConstantSDNode *Sh = |
| 248 | dyn_cast<ConstantSDNode>(N.getOperand(0).getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 249 | ShAmt = Sh->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 250 | Offset = N.getOperand(0).getOperand(0); |
| 251 | Base = N.getOperand(1); |
| 252 | } else { |
| 253 | ShOpcVal = ARM_AM::no_shift; |
| 254 | } |
| 255 | } |
| 256 | } |
| 257 | |
| 258 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), |
| 259 | MVT::i32); |
Rafael Espindola | 6e8c649 | 2006-11-08 17:07:32 +0000 | [diff] [blame] | 260 | return true; |
| 261 | } |
| 262 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 263 | bool ARMDAGToDAGISel::SelectAddrMode2Offset(SDValue Op, SDValue N, |
| 264 | SDValue &Offset, SDValue &Opc) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 265 | unsigned Opcode = Op.getOpcode(); |
| 266 | ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) |
| 267 | ? cast<LoadSDNode>(Op)->getAddressingMode() |
| 268 | : cast<StoreSDNode>(Op)->getAddressingMode(); |
| 269 | ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) |
| 270 | ? ARM_AM::add : ARM_AM::sub; |
| 271 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N)) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 272 | int Val = (int)C->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 273 | if (Val >= 0 && Val < 0x1000) { // 12 bits. |
| 274 | Offset = CurDAG->getRegister(0, MVT::i32); |
| 275 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, Val, |
| 276 | ARM_AM::no_shift), |
| 277 | MVT::i32); |
| 278 | return true; |
| 279 | } |
| 280 | } |
| 281 | |
| 282 | Offset = N; |
| 283 | ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N); |
| 284 | unsigned ShAmt = 0; |
| 285 | if (ShOpcVal != ARM_AM::no_shift) { |
| 286 | // Check to see if the RHS of the shift is a constant, if not, we can't fold |
| 287 | // it. |
| 288 | if (ConstantSDNode *Sh = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 289 | ShAmt = Sh->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 290 | Offset = N.getOperand(0); |
| 291 | } else { |
| 292 | ShOpcVal = ARM_AM::no_shift; |
| 293 | } |
| 294 | } |
| 295 | |
| 296 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), |
| 297 | MVT::i32); |
Rafael Espindola | 32bd5f4 | 2006-10-17 18:04:53 +0000 | [diff] [blame] | 298 | return true; |
| 299 | } |
| 300 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 301 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 302 | bool ARMDAGToDAGISel::SelectAddrMode3(SDValue Op, SDValue N, |
| 303 | SDValue &Base, SDValue &Offset, |
| 304 | SDValue &Opc) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 305 | if (N.getOpcode() == ISD::SUB) { |
| 306 | // X - C is canonicalize to X + -C, no need to handle it here. |
| 307 | Base = N.getOperand(0); |
| 308 | Offset = N.getOperand(1); |
| 309 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(ARM_AM::sub, 0),MVT::i32); |
| 310 | return true; |
| 311 | } |
| 312 | |
| 313 | if (N.getOpcode() != ISD::ADD) { |
| 314 | Base = N; |
| 315 | if (N.getOpcode() == ISD::FrameIndex) { |
| 316 | int FI = cast<FrameIndexSDNode>(N)->getIndex(); |
| 317 | Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); |
| 318 | } |
| 319 | Offset = CurDAG->getRegister(0, MVT::i32); |
| 320 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(ARM_AM::add, 0),MVT::i32); |
| 321 | return true; |
| 322 | } |
| 323 | |
| 324 | // If the RHS is +/- imm8, fold into addr mode. |
| 325 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 326 | int RHSC = (int)RHS->getZExtValue(); |
Evan Cheng | e966d64 | 2007-01-24 02:45:25 +0000 | [diff] [blame] | 327 | if ((RHSC >= 0 && RHSC < 256) || |
| 328 | (RHSC < 0 && RHSC > -256)) { // note -256 itself isn't allowed. |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 329 | Base = N.getOperand(0); |
Evan Cheng | e966d64 | 2007-01-24 02:45:25 +0000 | [diff] [blame] | 330 | if (Base.getOpcode() == ISD::FrameIndex) { |
| 331 | int FI = cast<FrameIndexSDNode>(Base)->getIndex(); |
| 332 | Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); |
| 333 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 334 | Offset = CurDAG->getRegister(0, MVT::i32); |
Evan Cheng | e966d64 | 2007-01-24 02:45:25 +0000 | [diff] [blame] | 335 | |
| 336 | ARM_AM::AddrOpc AddSub = ARM_AM::add; |
| 337 | if (RHSC < 0) { |
| 338 | AddSub = ARM_AM::sub; |
| 339 | RHSC = - RHSC; |
| 340 | } |
| 341 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(AddSub, RHSC),MVT::i32); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 342 | return true; |
| 343 | } |
| 344 | } |
| 345 | |
| 346 | Base = N.getOperand(0); |
| 347 | Offset = N.getOperand(1); |
| 348 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(ARM_AM::add, 0), MVT::i32); |
| 349 | return true; |
| 350 | } |
| 351 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 352 | bool ARMDAGToDAGISel::SelectAddrMode3Offset(SDValue Op, SDValue N, |
| 353 | SDValue &Offset, SDValue &Opc) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 354 | unsigned Opcode = Op.getOpcode(); |
| 355 | ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) |
| 356 | ? cast<LoadSDNode>(Op)->getAddressingMode() |
| 357 | : cast<StoreSDNode>(Op)->getAddressingMode(); |
| 358 | ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) |
| 359 | ? ARM_AM::add : ARM_AM::sub; |
| 360 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N)) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 361 | int Val = (int)C->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 362 | if (Val >= 0 && Val < 256) { |
| 363 | Offset = CurDAG->getRegister(0, MVT::i32); |
| 364 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(AddSub, Val), MVT::i32); |
| 365 | return true; |
| 366 | } |
| 367 | } |
| 368 | |
| 369 | Offset = N; |
| 370 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(AddSub, 0), MVT::i32); |
| 371 | return true; |
| 372 | } |
| 373 | |
| 374 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 375 | bool ARMDAGToDAGISel::SelectAddrMode5(SDValue Op, SDValue N, |
| 376 | SDValue &Base, SDValue &Offset) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 377 | if (N.getOpcode() != ISD::ADD) { |
| 378 | Base = N; |
| 379 | if (N.getOpcode() == ISD::FrameIndex) { |
| 380 | int FI = cast<FrameIndexSDNode>(N)->getIndex(); |
| 381 | Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); |
| 382 | } else if (N.getOpcode() == ARMISD::Wrapper) { |
| 383 | Base = N.getOperand(0); |
| 384 | } |
| 385 | Offset = CurDAG->getTargetConstant(ARM_AM::getAM5Opc(ARM_AM::add, 0), |
| 386 | MVT::i32); |
| 387 | return true; |
| 388 | } |
| 389 | |
| 390 | // If the RHS is +/- imm8, fold into addr mode. |
| 391 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 392 | int RHSC = (int)RHS->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 393 | if ((RHSC & 3) == 0) { // The constant is implicitly multiplied by 4. |
| 394 | RHSC >>= 2; |
Evan Cheng | e966d64 | 2007-01-24 02:45:25 +0000 | [diff] [blame] | 395 | if ((RHSC >= 0 && RHSC < 256) || |
| 396 | (RHSC < 0 && RHSC > -256)) { // note -256 itself isn't allowed. |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 397 | Base = N.getOperand(0); |
Evan Cheng | e966d64 | 2007-01-24 02:45:25 +0000 | [diff] [blame] | 398 | if (Base.getOpcode() == ISD::FrameIndex) { |
| 399 | int FI = cast<FrameIndexSDNode>(Base)->getIndex(); |
| 400 | Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); |
| 401 | } |
| 402 | |
| 403 | ARM_AM::AddrOpc AddSub = ARM_AM::add; |
| 404 | if (RHSC < 0) { |
| 405 | AddSub = ARM_AM::sub; |
| 406 | RHSC = - RHSC; |
| 407 | } |
| 408 | Offset = CurDAG->getTargetConstant(ARM_AM::getAM5Opc(AddSub, RHSC), |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 409 | MVT::i32); |
| 410 | return true; |
| 411 | } |
| 412 | } |
| 413 | } |
| 414 | |
| 415 | Base = N; |
| 416 | Offset = CurDAG->getTargetConstant(ARM_AM::getAM5Opc(ARM_AM::add, 0), |
| 417 | MVT::i32); |
| 418 | return true; |
| 419 | } |
| 420 | |
Bob Wilson | 8b024a5 | 2009-07-01 23:16:05 +0000 | [diff] [blame] | 421 | bool ARMDAGToDAGISel::SelectAddrMode6(SDValue Op, SDValue N, |
| 422 | SDValue &Addr, SDValue &Update, |
| 423 | SDValue &Opc) { |
| 424 | Addr = N; |
| 425 | // The optional writeback is handled in ARMLoadStoreOpt. |
| 426 | Update = CurDAG->getRegister(0, MVT::i32); |
| 427 | Opc = CurDAG->getTargetConstant(ARM_AM::getAM6Opc(false), MVT::i32); |
| 428 | return true; |
| 429 | } |
| 430 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 431 | bool ARMDAGToDAGISel::SelectAddrModePC(SDValue Op, SDValue N, |
| 432 | SDValue &Offset, SDValue &Label) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 433 | if (N.getOpcode() == ARMISD::PIC_ADD && N.hasOneUse()) { |
| 434 | Offset = N.getOperand(0); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 435 | SDValue N1 = N.getOperand(1); |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 436 | Label = CurDAG->getTargetConstant(cast<ConstantSDNode>(N1)->getZExtValue(), |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 437 | MVT::i32); |
| 438 | return true; |
| 439 | } |
| 440 | return false; |
| 441 | } |
| 442 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 443 | bool ARMDAGToDAGISel::SelectThumbAddrModeRR(SDValue Op, SDValue N, |
| 444 | SDValue &Base, SDValue &Offset){ |
Dale Johannesen | f5f5dce | 2009-02-06 19:16:40 +0000 | [diff] [blame] | 445 | // FIXME dl should come from the parent load or store, not the address |
| 446 | DebugLoc dl = Op.getDebugLoc(); |
Evan Cheng | c38f2bc | 2007-01-23 22:59:13 +0000 | [diff] [blame] | 447 | if (N.getOpcode() != ISD::ADD) { |
| 448 | Base = N; |
Dan Gohman | f033b5a | 2008-12-03 17:10:41 +0000 | [diff] [blame] | 449 | // We must materialize a zero in a reg! Returning a constant here |
| 450 | // wouldn't work without additional code to position the node within |
| 451 | // ISel's topological ordering in a place where ISel will process it |
| 452 | // normally. Instead, just explicitly issue a tMOVri8 node! |
Dale Johannesen | f5f5dce | 2009-02-06 19:16:40 +0000 | [diff] [blame] | 453 | Offset = SDValue(CurDAG->getTargetNode(ARM::tMOVi8, dl, MVT::i32, |
Evan Cheng | c38f2bc | 2007-01-23 22:59:13 +0000 | [diff] [blame] | 454 | CurDAG->getTargetConstant(0, MVT::i32)), 0); |
| 455 | return true; |
| 456 | } |
| 457 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 458 | Base = N.getOperand(0); |
| 459 | Offset = N.getOperand(1); |
| 460 | return true; |
| 461 | } |
| 462 | |
Evan Cheng | 79d4326 | 2007-01-24 02:21:22 +0000 | [diff] [blame] | 463 | bool |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 464 | ARMDAGToDAGISel::SelectThumbAddrModeRI5(SDValue Op, SDValue N, |
| 465 | unsigned Scale, SDValue &Base, |
| 466 | SDValue &OffImm, SDValue &Offset) { |
Evan Cheng | 79d4326 | 2007-01-24 02:21:22 +0000 | [diff] [blame] | 467 | if (Scale == 4) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 468 | SDValue TmpBase, TmpOffImm; |
Evan Cheng | 79d4326 | 2007-01-24 02:21:22 +0000 | [diff] [blame] | 469 | if (SelectThumbAddrModeSP(Op, N, TmpBase, TmpOffImm)) |
| 470 | return false; // We want to select tLDRspi / tSTRspi instead. |
Evan Cheng | 012f2d9 | 2007-01-24 08:53:17 +0000 | [diff] [blame] | 471 | if (N.getOpcode() == ARMISD::Wrapper && |
| 472 | N.getOperand(0).getOpcode() == ISD::TargetConstantPool) |
| 473 | return false; // We want to select tLDRpci instead. |
Evan Cheng | 79d4326 | 2007-01-24 02:21:22 +0000 | [diff] [blame] | 474 | } |
| 475 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 476 | if (N.getOpcode() != ISD::ADD) { |
| 477 | Base = (N.getOpcode() == ARMISD::Wrapper) ? N.getOperand(0) : N; |
Evan Cheng | c38f2bc | 2007-01-23 22:59:13 +0000 | [diff] [blame] | 478 | Offset = CurDAG->getRegister(0, MVT::i32); |
| 479 | OffImm = CurDAG->getTargetConstant(0, MVT::i32); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 480 | return true; |
| 481 | } |
| 482 | |
Evan Cheng | ad0e465 | 2007-02-06 00:22:06 +0000 | [diff] [blame] | 483 | // Thumb does not have [sp, r] address mode. |
| 484 | RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0)); |
| 485 | RegisterSDNode *RHSR = dyn_cast<RegisterSDNode>(N.getOperand(1)); |
| 486 | if ((LHSR && LHSR->getReg() == ARM::SP) || |
| 487 | (RHSR && RHSR->getReg() == ARM::SP)) { |
| 488 | Base = N; |
| 489 | Offset = CurDAG->getRegister(0, MVT::i32); |
| 490 | OffImm = CurDAG->getTargetConstant(0, MVT::i32); |
| 491 | return true; |
| 492 | } |
| 493 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 494 | // If the RHS is + imm5 * scale, fold into addr mode. |
| 495 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 496 | int RHSC = (int)RHS->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 497 | if ((RHSC & (Scale-1)) == 0) { // The constant is implicitly multiplied. |
| 498 | RHSC /= Scale; |
| 499 | if (RHSC >= 0 && RHSC < 32) { |
| 500 | Base = N.getOperand(0); |
Evan Cheng | c38f2bc | 2007-01-23 22:59:13 +0000 | [diff] [blame] | 501 | Offset = CurDAG->getRegister(0, MVT::i32); |
| 502 | OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 503 | return true; |
| 504 | } |
| 505 | } |
| 506 | } |
| 507 | |
Evan Cheng | c38f2bc | 2007-01-23 22:59:13 +0000 | [diff] [blame] | 508 | Base = N.getOperand(0); |
| 509 | Offset = N.getOperand(1); |
| 510 | OffImm = CurDAG->getTargetConstant(0, MVT::i32); |
| 511 | return true; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 512 | } |
| 513 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 514 | bool ARMDAGToDAGISel::SelectThumbAddrModeS1(SDValue Op, SDValue N, |
| 515 | SDValue &Base, SDValue &OffImm, |
| 516 | SDValue &Offset) { |
Evan Cheng | cea117d | 2007-01-30 02:35:32 +0000 | [diff] [blame] | 517 | return SelectThumbAddrModeRI5(Op, N, 1, Base, OffImm, Offset); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 518 | } |
| 519 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 520 | bool ARMDAGToDAGISel::SelectThumbAddrModeS2(SDValue Op, SDValue N, |
| 521 | SDValue &Base, SDValue &OffImm, |
| 522 | SDValue &Offset) { |
Evan Cheng | cea117d | 2007-01-30 02:35:32 +0000 | [diff] [blame] | 523 | return SelectThumbAddrModeRI5(Op, N, 2, Base, OffImm, Offset); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 524 | } |
| 525 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 526 | bool ARMDAGToDAGISel::SelectThumbAddrModeS4(SDValue Op, SDValue N, |
| 527 | SDValue &Base, SDValue &OffImm, |
| 528 | SDValue &Offset) { |
Evan Cheng | cea117d | 2007-01-30 02:35:32 +0000 | [diff] [blame] | 529 | return SelectThumbAddrModeRI5(Op, N, 4, Base, OffImm, Offset); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 530 | } |
| 531 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 532 | bool ARMDAGToDAGISel::SelectThumbAddrModeSP(SDValue Op, SDValue N, |
| 533 | SDValue &Base, SDValue &OffImm) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 534 | if (N.getOpcode() == ISD::FrameIndex) { |
| 535 | int FI = cast<FrameIndexSDNode>(N)->getIndex(); |
| 536 | Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); |
Evan Cheng | 79d4326 | 2007-01-24 02:21:22 +0000 | [diff] [blame] | 537 | OffImm = CurDAG->getTargetConstant(0, MVT::i32); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 538 | return true; |
| 539 | } |
Evan Cheng | 79d4326 | 2007-01-24 02:21:22 +0000 | [diff] [blame] | 540 | |
Evan Cheng | ad0e465 | 2007-02-06 00:22:06 +0000 | [diff] [blame] | 541 | if (N.getOpcode() != ISD::ADD) |
| 542 | return false; |
| 543 | |
| 544 | RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0)); |
Evan Cheng | 8c1a73a | 2007-02-06 09:11:20 +0000 | [diff] [blame] | 545 | if (N.getOperand(0).getOpcode() == ISD::FrameIndex || |
| 546 | (LHSR && LHSR->getReg() == ARM::SP)) { |
Evan Cheng | 79d4326 | 2007-01-24 02:21:22 +0000 | [diff] [blame] | 547 | // If the RHS is + imm8 * scale, fold into addr mode. |
| 548 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 549 | int RHSC = (int)RHS->getZExtValue(); |
Evan Cheng | 79d4326 | 2007-01-24 02:21:22 +0000 | [diff] [blame] | 550 | if ((RHSC & 3) == 0) { // The constant is implicitly multiplied. |
| 551 | RHSC >>= 2; |
| 552 | if (RHSC >= 0 && RHSC < 256) { |
Evan Cheng | ad0e465 | 2007-02-06 00:22:06 +0000 | [diff] [blame] | 553 | Base = N.getOperand(0); |
Evan Cheng | 8c1a73a | 2007-02-06 09:11:20 +0000 | [diff] [blame] | 554 | if (Base.getOpcode() == ISD::FrameIndex) { |
| 555 | int FI = cast<FrameIndexSDNode>(Base)->getIndex(); |
| 556 | Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); |
| 557 | } |
Evan Cheng | 79d4326 | 2007-01-24 02:21:22 +0000 | [diff] [blame] | 558 | OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32); |
| 559 | return true; |
| 560 | } |
| 561 | } |
| 562 | } |
| 563 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 564 | |
| 565 | return false; |
| 566 | } |
| 567 | |
Evan Cheng | 9cb9e67 | 2009-06-27 02:26:13 +0000 | [diff] [blame] | 568 | bool ARMDAGToDAGISel::SelectT2ShifterOperandReg(SDValue Op, SDValue N, |
| 569 | SDValue &BaseReg, |
| 570 | SDValue &Opc) { |
| 571 | ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N); |
| 572 | |
| 573 | // Don't match base register only case. That is matched to a separate |
| 574 | // lower complexity pattern with explicit register operand. |
| 575 | if (ShOpcVal == ARM_AM::no_shift) return false; |
| 576 | |
| 577 | BaseReg = N.getOperand(0); |
| 578 | unsigned ShImmVal = 0; |
| 579 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
| 580 | ShImmVal = RHS->getZExtValue() & 31; |
| 581 | Opc = getI32Imm(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal)); |
| 582 | return true; |
| 583 | } |
| 584 | |
| 585 | return false; |
| 586 | } |
| 587 | |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 588 | bool ARMDAGToDAGISel::SelectT2AddrModeImm12(SDValue Op, SDValue N, |
| 589 | SDValue &Base, SDValue &OffImm) { |
| 590 | // Match simple R + imm12 operands. |
| 591 | if (N.getOpcode() != ISD::ADD) |
| 592 | return false; |
| 593 | |
| 594 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
| 595 | int RHSC = (int)RHS->getZExtValue(); |
| 596 | if (RHSC >= 0 && RHSC < 0x1000) { // 12 bits. |
| 597 | Base = N.getOperand(0); |
| 598 | OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32); |
| 599 | return true; |
| 600 | } |
| 601 | } |
| 602 | |
| 603 | return false; |
| 604 | } |
| 605 | |
| 606 | bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue Op, SDValue N, |
| 607 | SDValue &Base, SDValue &OffImm) { |
| 608 | if (N.getOpcode() == ISD::ADD) { |
| 609 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
| 610 | int RHSC = (int)RHS->getZExtValue(); |
| 611 | if (RHSC < 0 && RHSC > -0x100) { // 8 bits. |
| 612 | Base = N.getOperand(0); |
| 613 | OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32); |
| 614 | return true; |
| 615 | } |
| 616 | } |
| 617 | } else if (N.getOpcode() == ISD::SUB) { |
| 618 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
| 619 | int RHSC = (int)RHS->getZExtValue(); |
| 620 | if (RHSC >= 0 && RHSC < 0x100) { // 8 bits. |
| 621 | Base = N.getOperand(0); |
| 622 | OffImm = CurDAG->getTargetConstant(-RHSC, MVT::i32); |
| 623 | return true; |
| 624 | } |
| 625 | } |
| 626 | } |
| 627 | |
| 628 | return false; |
| 629 | } |
| 630 | |
David Goodwin | 6647cea | 2009-06-30 22:50:01 +0000 | [diff] [blame] | 631 | bool ARMDAGToDAGISel::SelectT2AddrModeImm8s4(SDValue Op, SDValue N, |
| 632 | SDValue &Base, SDValue &OffImm) { |
| 633 | if (N.getOpcode() == ISD::ADD) { |
| 634 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
| 635 | int RHSC = (int)RHS->getZExtValue(); |
| 636 | if (((RHSC & 0x3) == 0) && (RHSC < 0 && RHSC > -0x400)) { // 8 bits. |
| 637 | Base = N.getOperand(0); |
| 638 | OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32); |
| 639 | return true; |
| 640 | } |
| 641 | } |
| 642 | } else if (N.getOpcode() == ISD::SUB) { |
| 643 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
| 644 | int RHSC = (int)RHS->getZExtValue(); |
| 645 | if (((RHSC & 0x3) == 0) && (RHSC >= 0 && RHSC < 0x400)) { // 8 bits. |
| 646 | Base = N.getOperand(0); |
| 647 | OffImm = CurDAG->getTargetConstant(-RHSC, MVT::i32); |
| 648 | return true; |
| 649 | } |
| 650 | } |
| 651 | } |
| 652 | |
| 653 | return false; |
| 654 | } |
| 655 | |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 656 | bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue Op, SDValue N, |
| 657 | SDValue &Base, |
| 658 | SDValue &OffReg, SDValue &ShImm) { |
| 659 | // Base only. |
| 660 | if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB) { |
| 661 | Base = N; |
| 662 | if (N.getOpcode() == ISD::FrameIndex) { |
| 663 | int FI = cast<FrameIndexSDNode>(N)->getIndex(); |
| 664 | Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); |
| 665 | } else if (N.getOpcode() == ARMISD::Wrapper) { |
| 666 | Base = N.getOperand(0); |
| 667 | if (Base.getOpcode() == ISD::TargetConstantPool) |
| 668 | return false; // We want to select t2LDRpci instead. |
| 669 | } |
| 670 | OffReg = CurDAG->getRegister(0, MVT::i32); |
| 671 | ShImm = CurDAG->getTargetConstant(0, MVT::i32); |
| 672 | return true; |
| 673 | } |
| 674 | |
| 675 | // Look for (R + R) or (R + (R << [1,2,3])). |
| 676 | unsigned ShAmt = 0; |
| 677 | Base = N.getOperand(0); |
| 678 | OffReg = N.getOperand(1); |
| 679 | |
| 680 | // Swap if it is ((R << c) + R). |
| 681 | ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(OffReg); |
| 682 | if (ShOpcVal != ARM_AM::lsl) { |
| 683 | ShOpcVal = ARM_AM::getShiftOpcForNode(Base); |
| 684 | if (ShOpcVal == ARM_AM::lsl) |
| 685 | std::swap(Base, OffReg); |
| 686 | } |
| 687 | |
| 688 | if (ShOpcVal == ARM_AM::lsl) { |
| 689 | // Check to see if the RHS of the shift is a constant, if not, we can't fold |
| 690 | // it. |
| 691 | if (ConstantSDNode *Sh = dyn_cast<ConstantSDNode>(OffReg.getOperand(1))) { |
| 692 | ShAmt = Sh->getZExtValue(); |
| 693 | if (ShAmt >= 4) { |
| 694 | ShAmt = 0; |
| 695 | ShOpcVal = ARM_AM::no_shift; |
| 696 | } else |
| 697 | OffReg = OffReg.getOperand(0); |
| 698 | } else { |
| 699 | ShOpcVal = ARM_AM::no_shift; |
| 700 | } |
| 701 | } else if (SelectT2AddrModeImm12(Op, N, Base, ShImm) || |
| 702 | SelectT2AddrModeImm8 (Op, N, Base, ShImm)) |
| 703 | // Don't match if it's possible to match to one of the r +/- imm cases. |
| 704 | return false; |
| 705 | |
| 706 | ShImm = CurDAG->getTargetConstant(ShAmt, MVT::i32); |
| 707 | |
| 708 | return true; |
| 709 | } |
| 710 | |
| 711 | //===--------------------------------------------------------------------===// |
| 712 | |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 713 | /// getAL - Returns a ARMCC::AL immediate node. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 714 | static inline SDValue getAL(SelectionDAG *CurDAG) { |
Evan Cheng | 44bec52 | 2007-05-15 01:29:07 +0000 | [diff] [blame] | 715 | return CurDAG->getTargetConstant((uint64_t)ARMCC::AL, MVT::i32); |
| 716 | } |
| 717 | |
Evan Cheng | af4550f | 2009-07-02 01:23:32 +0000 | [diff] [blame] | 718 | SDNode *ARMDAGToDAGISel::SelectARMIndexedLoad(SDValue Op) { |
| 719 | LoadSDNode *LD = cast<LoadSDNode>(Op); |
| 720 | ISD::MemIndexedMode AM = LD->getAddressingMode(); |
| 721 | if (AM == ISD::UNINDEXED) |
| 722 | return NULL; |
| 723 | |
| 724 | MVT LoadedVT = LD->getMemoryVT(); |
| 725 | SDValue Offset, AMOpc; |
| 726 | bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); |
| 727 | unsigned Opcode = 0; |
| 728 | bool Match = false; |
| 729 | if (LoadedVT == MVT::i32 && |
| 730 | SelectAddrMode2Offset(Op, LD->getOffset(), Offset, AMOpc)) { |
| 731 | Opcode = isPre ? ARM::LDR_PRE : ARM::LDR_POST; |
| 732 | Match = true; |
| 733 | } else if (LoadedVT == MVT::i16 && |
| 734 | SelectAddrMode3Offset(Op, LD->getOffset(), Offset, AMOpc)) { |
| 735 | Match = true; |
| 736 | Opcode = (LD->getExtensionType() == ISD::SEXTLOAD) |
| 737 | ? (isPre ? ARM::LDRSH_PRE : ARM::LDRSH_POST) |
| 738 | : (isPre ? ARM::LDRH_PRE : ARM::LDRH_POST); |
| 739 | } else if (LoadedVT == MVT::i8 || LoadedVT == MVT::i1) { |
| 740 | if (LD->getExtensionType() == ISD::SEXTLOAD) { |
| 741 | if (SelectAddrMode3Offset(Op, LD->getOffset(), Offset, AMOpc)) { |
| 742 | Match = true; |
| 743 | Opcode = isPre ? ARM::LDRSB_PRE : ARM::LDRSB_POST; |
| 744 | } |
| 745 | } else { |
| 746 | if (SelectAddrMode2Offset(Op, LD->getOffset(), Offset, AMOpc)) { |
| 747 | Match = true; |
| 748 | Opcode = isPre ? ARM::LDRB_PRE : ARM::LDRB_POST; |
| 749 | } |
| 750 | } |
| 751 | } |
| 752 | |
| 753 | if (Match) { |
| 754 | SDValue Chain = LD->getChain(); |
| 755 | SDValue Base = LD->getBasePtr(); |
| 756 | SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG), |
| 757 | CurDAG->getRegister(0, MVT::i32), Chain }; |
| 758 | return CurDAG->getTargetNode(Opcode, Op.getDebugLoc(), MVT::i32, MVT::i32, |
| 759 | MVT::Other, Ops, 6); |
| 760 | } |
| 761 | |
| 762 | return NULL; |
| 763 | } |
| 764 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 765 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 766 | SDNode *ARMDAGToDAGISel::Select(SDValue Op) { |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 767 | SDNode *N = Op.getNode(); |
Dale Johannesen | ed2eee6 | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 768 | DebugLoc dl = N->getDebugLoc(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 769 | |
Dan Gohman | e8be6c6 | 2008-07-17 19:10:17 +0000 | [diff] [blame] | 770 | if (N->isMachineOpcode()) |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 771 | return NULL; // Already selected. |
Rafael Espindola | 337c4ad6 | 2006-06-12 12:28:08 +0000 | [diff] [blame] | 772 | |
| 773 | switch (N->getOpcode()) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 774 | default: break; |
| 775 | case ISD::Constant: { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 776 | unsigned Val = cast<ConstantSDNode>(N)->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 777 | bool UseCP = true; |
Bob Wilson | e64e3cf | 2009-06-22 17:29:13 +0000 | [diff] [blame] | 778 | if (Subtarget->isThumb()) { |
| 779 | if (Subtarget->hasThumb2()) |
| 780 | // Thumb2 has the MOVT instruction, so all immediates can |
| 781 | // be done with MOV + MOVT, at worst. |
| 782 | UseCP = 0; |
| 783 | else |
| 784 | UseCP = (Val > 255 && // MOV |
| 785 | ~Val > 255 && // MOV + MVN |
| 786 | !ARM_AM::isThumbImmShiftedVal(Val)); // MOV + LSL |
| 787 | } else |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 788 | UseCP = (ARM_AM::getSOImmVal(Val) == -1 && // MOV |
| 789 | ARM_AM::getSOImmVal(~Val) == -1 && // MVN |
| 790 | !ARM_AM::isSOImmTwoPartVal(Val)); // two instrs. |
| 791 | if (UseCP) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 792 | SDValue CPIdx = |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 793 | CurDAG->getTargetConstantPool(ConstantInt::get(Type::Int32Ty, Val), |
| 794 | TLI.getPointerTy()); |
Evan Cheng | 012f2d9 | 2007-01-24 08:53:17 +0000 | [diff] [blame] | 795 | |
| 796 | SDNode *ResNode; |
| 797 | if (Subtarget->isThumb()) |
Dale Johannesen | ed2eee6 | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 798 | ResNode = CurDAG->getTargetNode(ARM::tLDRcp, dl, MVT::i32, MVT::Other, |
Evan Cheng | 012f2d9 | 2007-01-24 08:53:17 +0000 | [diff] [blame] | 799 | CPIdx, CurDAG->getEntryNode()); |
| 800 | else { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 801 | SDValue Ops[] = { |
Anton Korobeynikov | dada95b | 2009-06-08 22:57:18 +0000 | [diff] [blame] | 802 | CPIdx, |
Evan Cheng | 012f2d9 | 2007-01-24 08:53:17 +0000 | [diff] [blame] | 803 | CurDAG->getRegister(0, MVT::i32), |
| 804 | CurDAG->getTargetConstant(0, MVT::i32), |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 805 | getAL(CurDAG), |
| 806 | CurDAG->getRegister(0, MVT::i32), |
Evan Cheng | 012f2d9 | 2007-01-24 08:53:17 +0000 | [diff] [blame] | 807 | CurDAG->getEntryNode() |
| 808 | }; |
Dale Johannesen | ed2eee6 | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 809 | ResNode=CurDAG->getTargetNode(ARM::LDRcp, dl, MVT::i32, MVT::Other, |
| 810 | Ops, 6); |
Evan Cheng | 012f2d9 | 2007-01-24 08:53:17 +0000 | [diff] [blame] | 811 | } |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 812 | ReplaceUses(Op, SDValue(ResNode, 0)); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 813 | return NULL; |
| 814 | } |
Anton Korobeynikov | dada95b | 2009-06-08 22:57:18 +0000 | [diff] [blame] | 815 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 816 | // Other cases are autogenerated. |
Rafael Espindola | 337c4ad6 | 2006-06-12 12:28:08 +0000 | [diff] [blame] | 817 | break; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 818 | } |
Rafael Espindola | f819a49 | 2006-11-09 13:58:55 +0000 | [diff] [blame] | 819 | case ISD::FrameIndex: { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 820 | // Selects to ADDri FI, 0 which in turn will become ADDri SP, imm. |
Rafael Espindola | f819a49 | 2006-11-09 13:58:55 +0000 | [diff] [blame] | 821 | int FI = cast<FrameIndexSDNode>(N)->getIndex(); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 822 | SDValue TFI = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); |
Jim Grosbach | 30eae3c | 2009-04-07 20:34:09 +0000 | [diff] [blame] | 823 | if (Subtarget->isThumb()) { |
Evan Cheng | 44bec52 | 2007-05-15 01:29:07 +0000 | [diff] [blame] | 824 | return CurDAG->SelectNodeTo(N, ARM::tADDrSPi, MVT::i32, TFI, |
| 825 | CurDAG->getTargetConstant(0, MVT::i32)); |
Jim Grosbach | 30eae3c | 2009-04-07 20:34:09 +0000 | [diff] [blame] | 826 | } else { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 827 | SDValue Ops[] = { TFI, CurDAG->getTargetConstant(0, MVT::i32), |
Evan Cheng | 13ab020 | 2007-07-10 18:08:01 +0000 | [diff] [blame] | 828 | getAL(CurDAG), CurDAG->getRegister(0, MVT::i32), |
| 829 | CurDAG->getRegister(0, MVT::i32) }; |
| 830 | return CurDAG->SelectNodeTo(N, ARM::ADDri, MVT::i32, Ops, 5); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 831 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 832 | } |
Evan Cheng | ad0e465 | 2007-02-06 00:22:06 +0000 | [diff] [blame] | 833 | case ISD::ADD: { |
Evan Cheng | 9d7b530 | 2009-03-26 19:09:01 +0000 | [diff] [blame] | 834 | if (!Subtarget->isThumb()) |
| 835 | break; |
Evan Cheng | ad0e465 | 2007-02-06 00:22:06 +0000 | [diff] [blame] | 836 | // Select add sp, c to tADDhirr. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 837 | SDValue N0 = Op.getOperand(0); |
| 838 | SDValue N1 = Op.getOperand(1); |
Evan Cheng | ad0e465 | 2007-02-06 00:22:06 +0000 | [diff] [blame] | 839 | RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(Op.getOperand(0)); |
| 840 | RegisterSDNode *RHSR = dyn_cast<RegisterSDNode>(Op.getOperand(1)); |
| 841 | if (LHSR && LHSR->getReg() == ARM::SP) { |
| 842 | std::swap(N0, N1); |
| 843 | std::swap(LHSR, RHSR); |
| 844 | } |
| 845 | if (RHSR && RHSR->getReg() == ARM::SP) { |
Jim Grosbach | 30eae3c | 2009-04-07 20:34:09 +0000 | [diff] [blame] | 846 | SDValue Val = SDValue(CurDAG->getTargetNode(ARM::tMOVlor2hir, dl, |
| 847 | Op.getValueType(), N0, N0), 0); |
| 848 | return CurDAG->SelectNodeTo(N, ARM::tADDhirr, Op.getValueType(), Val, N1); |
Evan Cheng | ad0e465 | 2007-02-06 00:22:06 +0000 | [diff] [blame] | 849 | } |
| 850 | break; |
| 851 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 852 | case ISD::MUL: |
Evan Cheng | 79d4326 | 2007-01-24 02:21:22 +0000 | [diff] [blame] | 853 | if (Subtarget->isThumb()) |
| 854 | break; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 855 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 856 | unsigned RHSV = C->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 857 | if (!RHSV) break; |
| 858 | if (isPowerOf2_32(RHSV-1)) { // 2^n+1? |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 859 | SDValue V = Op.getOperand(0); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 860 | unsigned ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, Log2_32(RHSV-1)); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 861 | SDValue Ops[] = { V, V, CurDAG->getRegister(0, MVT::i32), |
Evan Cheng | 44bec52 | 2007-05-15 01:29:07 +0000 | [diff] [blame] | 862 | CurDAG->getTargetConstant(ShImm, MVT::i32), |
Evan Cheng | 13ab020 | 2007-07-10 18:08:01 +0000 | [diff] [blame] | 863 | getAL(CurDAG), CurDAG->getRegister(0, MVT::i32), |
| 864 | CurDAG->getRegister(0, MVT::i32) }; |
| 865 | return CurDAG->SelectNodeTo(N, ARM::ADDrs, MVT::i32, Ops, 7); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 866 | } |
| 867 | if (isPowerOf2_32(RHSV+1)) { // 2^n-1? |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 868 | SDValue V = Op.getOperand(0); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 869 | unsigned ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, Log2_32(RHSV+1)); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 870 | SDValue Ops[] = { V, V, CurDAG->getRegister(0, MVT::i32), |
Evan Cheng | 44bec52 | 2007-05-15 01:29:07 +0000 | [diff] [blame] | 871 | CurDAG->getTargetConstant(ShImm, MVT::i32), |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 872 | getAL(CurDAG), CurDAG->getRegister(0, MVT::i32), |
Evan Cheng | 13ab020 | 2007-07-10 18:08:01 +0000 | [diff] [blame] | 873 | CurDAG->getRegister(0, MVT::i32) }; |
| 874 | return CurDAG->SelectNodeTo(N, ARM::RSBrs, MVT::i32, Ops, 7); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 875 | } |
| 876 | } |
| 877 | break; |
| 878 | case ARMISD::FMRRD: |
Dale Johannesen | ed2eee6 | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 879 | return CurDAG->getTargetNode(ARM::FMRRD, dl, MVT::i32, MVT::i32, |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 880 | Op.getOperand(0), getAL(CurDAG), |
| 881 | CurDAG->getRegister(0, MVT::i32)); |
Dan Gohman | 525178c | 2007-10-08 18:33:35 +0000 | [diff] [blame] | 882 | case ISD::UMUL_LOHI: { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 883 | SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1), |
Evan Cheng | 13ab020 | 2007-07-10 18:08:01 +0000 | [diff] [blame] | 884 | getAL(CurDAG), CurDAG->getRegister(0, MVT::i32), |
| 885 | CurDAG->getRegister(0, MVT::i32) }; |
Dale Johannesen | ed2eee6 | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 886 | return CurDAG->getTargetNode(ARM::UMULL, dl, MVT::i32, MVT::i32, Ops, 5); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 887 | } |
Dan Gohman | 525178c | 2007-10-08 18:33:35 +0000 | [diff] [blame] | 888 | case ISD::SMUL_LOHI: { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 889 | SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1), |
Evan Cheng | 13ab020 | 2007-07-10 18:08:01 +0000 | [diff] [blame] | 890 | getAL(CurDAG), CurDAG->getRegister(0, MVT::i32), |
| 891 | CurDAG->getRegister(0, MVT::i32) }; |
Dale Johannesen | ed2eee6 | 2009-02-06 01:31:28 +0000 | [diff] [blame] | 892 | return CurDAG->getTargetNode(ARM::SMULL, dl, MVT::i32, MVT::i32, Ops, 5); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 893 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 894 | case ISD::LOAD: { |
Evan Cheng | af4550f | 2009-07-02 01:23:32 +0000 | [diff] [blame] | 895 | SDNode *ResNode = SelectARMIndexedLoad(Op); |
| 896 | if (ResNode) |
| 897 | return ResNode; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 898 | // Other cases are autogenerated. |
Rafael Espindola | f819a49 | 2006-11-09 13:58:55 +0000 | [diff] [blame] | 899 | break; |
Rafael Espindola | 337c4ad6 | 2006-06-12 12:28:08 +0000 | [diff] [blame] | 900 | } |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 901 | case ARMISD::BRCOND: { |
| 902 | // Pattern: (ARMbrcond:void (bb:Other):$dst, (imm:i32):$cc) |
| 903 | // Emits: (Bcc:void (bb:Other):$dst, (imm:i32):$cc) |
| 904 | // Pattern complexity = 6 cost = 1 size = 0 |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 905 | |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 906 | // Pattern: (ARMbrcond:void (bb:Other):$dst, (imm:i32):$cc) |
| 907 | // Emits: (tBcc:void (bb:Other):$dst, (imm:i32):$cc) |
| 908 | // Pattern complexity = 6 cost = 1 size = 0 |
| 909 | |
David Goodwin | 5e47a9a | 2009-06-30 18:04:13 +0000 | [diff] [blame] | 910 | // Pattern: (ARMbrcond:void (bb:Other):$dst, (imm:i32):$cc) |
| 911 | // Emits: (t2Bcc:void (bb:Other):$dst, (imm:i32):$cc) |
| 912 | // Pattern complexity = 6 cost = 1 size = 0 |
| 913 | |
| 914 | unsigned Opc = Subtarget->isThumb() ? |
| 915 | ((Subtarget->hasThumb2()) ? ARM::t2Bcc : ARM::tBcc) : ARM::Bcc; |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 916 | SDValue Chain = Op.getOperand(0); |
| 917 | SDValue N1 = Op.getOperand(1); |
| 918 | SDValue N2 = Op.getOperand(2); |
| 919 | SDValue N3 = Op.getOperand(3); |
| 920 | SDValue InFlag = Op.getOperand(4); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 921 | assert(N1.getOpcode() == ISD::BasicBlock); |
| 922 | assert(N2.getOpcode() == ISD::Constant); |
| 923 | assert(N3.getOpcode() == ISD::Register); |
| 924 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 925 | SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned) |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 926 | cast<ConstantSDNode>(N2)->getZExtValue()), |
| 927 | MVT::i32); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 928 | SDValue Ops[] = { N1, Tmp2, N3, Chain, InFlag }; |
Dale Johannesen | f90b2a7 | 2009-02-06 02:08:06 +0000 | [diff] [blame] | 929 | SDNode *ResNode = CurDAG->getTargetNode(Opc, dl, MVT::Other, |
| 930 | MVT::Flag, Ops, 5); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 931 | Chain = SDValue(ResNode, 0); |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 932 | if (Op.getNode()->getNumValues() == 2) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 933 | InFlag = SDValue(ResNode, 1); |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 934 | ReplaceUses(SDValue(Op.getNode(), 1), InFlag); |
Chris Lattner | a47b9bc | 2008-02-03 03:20:59 +0000 | [diff] [blame] | 935 | } |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 936 | ReplaceUses(SDValue(Op.getNode(), 0), SDValue(Chain.getNode(), Chain.getResNo())); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 937 | return NULL; |
| 938 | } |
| 939 | case ARMISD::CMOV: { |
| 940 | bool isThumb = Subtarget->isThumb(); |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 941 | MVT VT = Op.getValueType(); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 942 | SDValue N0 = Op.getOperand(0); |
| 943 | SDValue N1 = Op.getOperand(1); |
| 944 | SDValue N2 = Op.getOperand(2); |
| 945 | SDValue N3 = Op.getOperand(3); |
| 946 | SDValue InFlag = Op.getOperand(4); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 947 | assert(N2.getOpcode() == ISD::Constant); |
| 948 | assert(N3.getOpcode() == ISD::Register); |
| 949 | |
| 950 | // Pattern: (ARMcmov:i32 GPR:i32:$false, so_reg:i32:$true, (imm:i32):$cc) |
| 951 | // Emits: (MOVCCs:i32 GPR:i32:$false, so_reg:i32:$true, (imm:i32):$cc) |
| 952 | // Pattern complexity = 18 cost = 1 size = 0 |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 953 | SDValue CPTmp0; |
| 954 | SDValue CPTmp1; |
| 955 | SDValue CPTmp2; |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 956 | if (!isThumb && VT == MVT::i32 && |
| 957 | SelectShifterOperandReg(Op, N1, CPTmp0, CPTmp1, CPTmp2)) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 958 | SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned) |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 959 | cast<ConstantSDNode>(N2)->getZExtValue()), |
| 960 | MVT::i32); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 961 | SDValue Ops[] = { N0, CPTmp0, CPTmp1, CPTmp2, Tmp2, N3, InFlag }; |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 962 | return CurDAG->SelectNodeTo(Op.getNode(), ARM::MOVCCs, MVT::i32, Ops, 7); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 963 | } |
| 964 | |
| 965 | // Pattern: (ARMcmov:i32 GPR:i32:$false, |
| 966 | // (imm:i32)<<P:Predicate_so_imm>><<X:so_imm_XFORM>>:$true, |
| 967 | // (imm:i32):$cc) |
| 968 | // Emits: (MOVCCi:i32 GPR:i32:$false, |
| 969 | // (so_imm_XFORM:i32 (imm:i32):$true), (imm:i32):$cc) |
| 970 | // Pattern complexity = 10 cost = 1 size = 0 |
| 971 | if (VT == MVT::i32 && |
| 972 | N3.getOpcode() == ISD::Constant && |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 973 | Predicate_so_imm(N3.getNode())) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 974 | SDValue Tmp1 = CurDAG->getTargetConstant(((unsigned) |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 975 | cast<ConstantSDNode>(N1)->getZExtValue()), |
| 976 | MVT::i32); |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 977 | Tmp1 = Transform_so_imm_XFORM(Tmp1.getNode()); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 978 | SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned) |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 979 | cast<ConstantSDNode>(N2)->getZExtValue()), |
| 980 | MVT::i32); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 981 | SDValue Ops[] = { N0, Tmp1, Tmp2, N3, InFlag }; |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 982 | return CurDAG->SelectNodeTo(Op.getNode(), ARM::MOVCCi, MVT::i32, Ops, 5); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 983 | } |
| 984 | |
| 985 | // Pattern: (ARMcmov:i32 GPR:i32:$false, GPR:i32:$true, (imm:i32):$cc) |
| 986 | // Emits: (MOVCCr:i32 GPR:i32:$false, GPR:i32:$true, (imm:i32):$cc) |
| 987 | // Pattern complexity = 6 cost = 1 size = 0 |
| 988 | // |
| 989 | // Pattern: (ARMcmov:i32 GPR:i32:$false, GPR:i32:$true, (imm:i32):$cc) |
| 990 | // Emits: (tMOVCCr:i32 GPR:i32:$false, GPR:i32:$true, (imm:i32):$cc) |
| 991 | // Pattern complexity = 6 cost = 11 size = 0 |
| 992 | // |
| 993 | // Also FCPYScc and FCPYDcc. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 994 | SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned) |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 995 | cast<ConstantSDNode>(N2)->getZExtValue()), |
| 996 | MVT::i32); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 997 | SDValue Ops[] = { N0, N1, Tmp2, N3, InFlag }; |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 998 | unsigned Opc = 0; |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 999 | switch (VT.getSimpleVT()) { |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 1000 | default: assert(false && "Illegal conditional move type!"); |
| 1001 | break; |
| 1002 | case MVT::i32: |
| 1003 | Opc = isThumb ? ARM::tMOVCCr : ARM::MOVCCr; |
| 1004 | break; |
| 1005 | case MVT::f32: |
| 1006 | Opc = ARM::FCPYScc; |
| 1007 | break; |
| 1008 | case MVT::f64: |
| 1009 | Opc = ARM::FCPYDcc; |
| 1010 | break; |
| 1011 | } |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 1012 | return CurDAG->SelectNodeTo(Op.getNode(), Opc, VT, Ops, 5); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 1013 | } |
| 1014 | case ARMISD::CNEG: { |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1015 | MVT VT = Op.getValueType(); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1016 | SDValue N0 = Op.getOperand(0); |
| 1017 | SDValue N1 = Op.getOperand(1); |
| 1018 | SDValue N2 = Op.getOperand(2); |
| 1019 | SDValue N3 = Op.getOperand(3); |
| 1020 | SDValue InFlag = Op.getOperand(4); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 1021 | assert(N2.getOpcode() == ISD::Constant); |
| 1022 | assert(N3.getOpcode() == ISD::Register); |
| 1023 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1024 | SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned) |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1025 | cast<ConstantSDNode>(N2)->getZExtValue()), |
| 1026 | MVT::i32); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1027 | SDValue Ops[] = { N0, N1, Tmp2, N3, InFlag }; |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 1028 | unsigned Opc = 0; |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1029 | switch (VT.getSimpleVT()) { |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 1030 | default: assert(false && "Illegal conditional move type!"); |
| 1031 | break; |
| 1032 | case MVT::f32: |
| 1033 | Opc = ARM::FNEGScc; |
| 1034 | break; |
| 1035 | case MVT::f64: |
| 1036 | Opc = ARM::FNEGDcc; |
Evan Cheng | e5ad88e | 2008-12-10 21:54:21 +0000 | [diff] [blame] | 1037 | break; |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 1038 | } |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 1039 | return CurDAG->SelectNodeTo(Op.getNode(), Opc, VT, Ops, 5); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 1040 | } |
Evan Cheng | e5ad88e | 2008-12-10 21:54:21 +0000 | [diff] [blame] | 1041 | |
| 1042 | case ISD::DECLARE: { |
| 1043 | SDValue Chain = Op.getOperand(0); |
| 1044 | SDValue N1 = Op.getOperand(1); |
| 1045 | SDValue N2 = Op.getOperand(2); |
| 1046 | FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N1); |
Chris Lattner | 8c4d1b2 | 2009-02-12 17:38:23 +0000 | [diff] [blame] | 1047 | // FIXME: handle VLAs. |
| 1048 | if (!FINode) { |
| 1049 | ReplaceUses(Op.getValue(0), Chain); |
| 1050 | return NULL; |
| 1051 | } |
Evan Cheng | e5ad88e | 2008-12-10 21:54:21 +0000 | [diff] [blame] | 1052 | if (N2.getOpcode() == ARMISD::PIC_ADD && isa<LoadSDNode>(N2.getOperand(0))) |
| 1053 | N2 = N2.getOperand(0); |
| 1054 | LoadSDNode *Ld = dyn_cast<LoadSDNode>(N2); |
Chris Lattner | 8c4d1b2 | 2009-02-12 17:38:23 +0000 | [diff] [blame] | 1055 | if (!Ld) { |
| 1056 | ReplaceUses(Op.getValue(0), Chain); |
| 1057 | return NULL; |
| 1058 | } |
Evan Cheng | e5ad88e | 2008-12-10 21:54:21 +0000 | [diff] [blame] | 1059 | SDValue BasePtr = Ld->getBasePtr(); |
| 1060 | assert(BasePtr.getOpcode() == ARMISD::Wrapper && |
| 1061 | isa<ConstantPoolSDNode>(BasePtr.getOperand(0)) && |
| 1062 | "llvm.dbg.variable should be a constantpool node"); |
| 1063 | ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(BasePtr.getOperand(0)); |
| 1064 | GlobalValue *GV = 0; |
| 1065 | if (CP->isMachineConstantPoolEntry()) { |
| 1066 | ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)CP->getMachineCPVal(); |
| 1067 | GV = ACPV->getGV(); |
| 1068 | } else |
| 1069 | GV = dyn_cast<GlobalValue>(CP->getConstVal()); |
Chris Lattner | 8c4d1b2 | 2009-02-12 17:38:23 +0000 | [diff] [blame] | 1070 | if (!GV) { |
| 1071 | ReplaceUses(Op.getValue(0), Chain); |
| 1072 | return NULL; |
Evan Cheng | e5ad88e | 2008-12-10 21:54:21 +0000 | [diff] [blame] | 1073 | } |
Chris Lattner | 8c4d1b2 | 2009-02-12 17:38:23 +0000 | [diff] [blame] | 1074 | |
| 1075 | SDValue Tmp1 = CurDAG->getTargetFrameIndex(FINode->getIndex(), |
| 1076 | TLI.getPointerTy()); |
| 1077 | SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy()); |
| 1078 | SDValue Ops[] = { Tmp1, Tmp2, Chain }; |
| 1079 | return CurDAG->getTargetNode(TargetInstrInfo::DECLARE, dl, |
| 1080 | MVT::Other, Ops, 3); |
Evan Cheng | ee568cf | 2007-07-05 07:15:27 +0000 | [diff] [blame] | 1081 | } |
Bob Wilson | 5bafff3 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1082 | |
| 1083 | case ISD::CONCAT_VECTORS: { |
| 1084 | MVT VT = Op.getValueType(); |
| 1085 | assert(VT.is128BitVector() && Op.getNumOperands() == 2 && |
| 1086 | "unexpected CONCAT_VECTORS"); |
| 1087 | SDValue N0 = Op.getOperand(0); |
| 1088 | SDValue N1 = Op.getOperand(1); |
| 1089 | SDNode *Result = |
| 1090 | CurDAG->getTargetNode(TargetInstrInfo::IMPLICIT_DEF, dl, VT); |
| 1091 | if (N0.getOpcode() != ISD::UNDEF) |
| 1092 | Result = CurDAG->getTargetNode(TargetInstrInfo::INSERT_SUBREG, dl, VT, |
| 1093 | SDValue(Result, 0), N0, |
| 1094 | CurDAG->getTargetConstant(arm_dsubreg_0, |
| 1095 | MVT::i32)); |
| 1096 | if (N1.getOpcode() != ISD::UNDEF) |
| 1097 | Result = CurDAG->getTargetNode(TargetInstrInfo::INSERT_SUBREG, dl, VT, |
| 1098 | SDValue(Result, 0), N1, |
| 1099 | CurDAG->getTargetConstant(arm_dsubreg_1, |
| 1100 | MVT::i32)); |
| 1101 | return Result; |
| 1102 | } |
| 1103 | |
| 1104 | case ISD::VECTOR_SHUFFLE: { |
| 1105 | MVT VT = Op.getValueType(); |
| 1106 | |
| 1107 | // Match 128-bit splat to VDUPLANEQ. (This could be done with a Pat in |
| 1108 | // ARMInstrNEON.td but it is awkward because the shuffle mask needs to be |
| 1109 | // transformed first into a lane number and then to both a subregister |
| 1110 | // index and an adjusted lane number.) If the source operand is a |
| 1111 | // SCALAR_TO_VECTOR, leave it so it will be matched later as a VDUP. |
| 1112 | ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(N); |
| 1113 | if (VT.is128BitVector() && SVOp->isSplat() && |
| 1114 | Op.getOperand(0).getOpcode() != ISD::SCALAR_TO_VECTOR && |
| 1115 | Op.getOperand(1).getOpcode() == ISD::UNDEF) { |
| 1116 | unsigned LaneVal = SVOp->getSplatIndex(); |
| 1117 | |
| 1118 | MVT HalfVT; |
| 1119 | unsigned Opc = 0; |
| 1120 | switch (VT.getVectorElementType().getSimpleVT()) { |
| 1121 | default: assert(false && "unhandled VDUP splat type"); |
| 1122 | case MVT::i8: Opc = ARM::VDUPLN8q; HalfVT = MVT::v8i8; break; |
| 1123 | case MVT::i16: Opc = ARM::VDUPLN16q; HalfVT = MVT::v4i16; break; |
| 1124 | case MVT::i32: Opc = ARM::VDUPLN32q; HalfVT = MVT::v2i32; break; |
| 1125 | case MVT::f32: Opc = ARM::VDUPLNfq; HalfVT = MVT::v2f32; break; |
| 1126 | } |
| 1127 | |
| 1128 | // The source operand needs to be changed to a subreg of the original |
| 1129 | // 128-bit operand, and the lane number needs to be adjusted accordingly. |
| 1130 | unsigned NumElts = VT.getVectorNumElements() / 2; |
| 1131 | unsigned SRVal = (LaneVal < NumElts ? arm_dsubreg_0 : arm_dsubreg_1); |
| 1132 | SDValue SR = CurDAG->getTargetConstant(SRVal, MVT::i32); |
| 1133 | SDValue NewLane = CurDAG->getTargetConstant(LaneVal % NumElts, MVT::i32); |
| 1134 | SDNode *SubReg = CurDAG->getTargetNode(TargetInstrInfo::EXTRACT_SUBREG, |
| 1135 | dl, HalfVT, N->getOperand(0), SR); |
| 1136 | return CurDAG->SelectNodeTo(N, Opc, VT, SDValue(SubReg, 0), NewLane); |
| 1137 | } |
| 1138 | |
| 1139 | break; |
| 1140 | } |
Evan Cheng | e5ad88e | 2008-12-10 21:54:21 +0000 | [diff] [blame] | 1141 | } |
| 1142 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1143 | return SelectCode(Op); |
| 1144 | } |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 1145 | |
Bob Wilson | 224c244 | 2009-05-19 05:53:42 +0000 | [diff] [blame] | 1146 | bool ARMDAGToDAGISel:: |
| 1147 | SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, |
| 1148 | std::vector<SDValue> &OutOps) { |
| 1149 | assert(ConstraintCode == 'm' && "unexpected asm memory constraint"); |
| 1150 | |
| 1151 | SDValue Base, Offset, Opc; |
| 1152 | if (!SelectAddrMode2(Op, Op, Base, Offset, Opc)) |
| 1153 | return true; |
| 1154 | |
| 1155 | OutOps.push_back(Base); |
| 1156 | OutOps.push_back(Offset); |
| 1157 | OutOps.push_back(Opc); |
| 1158 | return false; |
| 1159 | } |
| 1160 | |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 1161 | /// createARMISelDag - This pass converts a legalized DAG into a |
| 1162 | /// ARM-specific DAG, ready for instruction scheduling. |
| 1163 | /// |
Anton Korobeynikov | d49ea77 | 2009-06-26 21:28:53 +0000 | [diff] [blame] | 1164 | FunctionPass *llvm::createARMISelDag(ARMBaseTargetMachine &TM) { |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 1165 | return new ARMDAGToDAGISel(TM); |
| 1166 | } |