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Jakob Stoklund Olesen88794802012-06-09 02:13:10 +00001//===-- LiveRegMatrix.cpp - Track register interference -------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the LiveRegMatrix analysis pass.
11//
12//===----------------------------------------------------------------------===//
13
Chandler Carruthd04a8d42012-12-03 16:50:05 +000014#include "llvm/CodeGen/LiveRegMatrix.h"
Jakob Stoklund Olesen45c5c572012-09-06 18:15:23 +000015#include "RegisterCoalescer.h"
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +000016#include "llvm/ADT/Statistic.h"
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +000017#include "llvm/CodeGen/LiveIntervalAnalysis.h"
Chandler Carruthd04a8d42012-12-03 16:50:05 +000018#include "llvm/CodeGen/MachineRegisterInfo.h"
Jakob Stoklund Olesen1ead68d2012-11-28 19:13:06 +000019#include "llvm/CodeGen/VirtRegMap.h"
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +000020#include "llvm/Support/Debug.h"
Stephen Hinesebe69fe2015-03-23 12:10:34 -070021#include "llvm/Support/Format.h"
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +000022#include "llvm/Support/raw_ostream.h"
Chandler Carruthd04a8d42012-12-03 16:50:05 +000023#include "llvm/Target/TargetRegisterInfo.h"
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +000024
25using namespace llvm;
26
Stephen Hinesdce4a402014-05-29 02:49:00 -070027#define DEBUG_TYPE "regalloc"
28
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +000029STATISTIC(NumAssigned , "Number of registers assigned");
30STATISTIC(NumUnassigned , "Number of registers unassigned");
31
32char LiveRegMatrix::ID = 0;
33INITIALIZE_PASS_BEGIN(LiveRegMatrix, "liveregmatrix",
34 "Live Register Matrix", false, false)
35INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
36INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
37INITIALIZE_PASS_END(LiveRegMatrix, "liveregmatrix",
38 "Live Register Matrix", false, false)
39
40LiveRegMatrix::LiveRegMatrix() : MachineFunctionPass(ID),
41 UserTag(0), RegMaskTag(0), RegMaskVirtReg(0) {}
42
43void LiveRegMatrix::getAnalysisUsage(AnalysisUsage &AU) const {
44 AU.setPreservesAll();
45 AU.addRequiredTransitive<LiveIntervals>();
46 AU.addRequiredTransitive<VirtRegMap>();
47 MachineFunctionPass::getAnalysisUsage(AU);
48}
49
50bool LiveRegMatrix::runOnMachineFunction(MachineFunction &MF) {
Stephen Hines37ed9c12014-12-01 14:51:49 -080051 TRI = MF.getSubtarget().getRegisterInfo();
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +000052 MRI = &MF.getRegInfo();
53 LIS = &getAnalysis<LiveIntervals>();
54 VRM = &getAnalysis<VirtRegMap>();
55
56 unsigned NumRegUnits = TRI->getNumRegUnits();
57 if (NumRegUnits != Matrix.size())
58 Queries.reset(new LiveIntervalUnion::Query[NumRegUnits]);
59 Matrix.init(LIUAlloc, NumRegUnits);
60
61 // Make sure no stale queries get reused.
62 invalidateVirtRegs();
63 return false;
64}
65
66void LiveRegMatrix::releaseMemory() {
67 for (unsigned i = 0, e = Matrix.size(); i != e; ++i) {
68 Matrix[i].clear();
Stephen Hines36b56882014-04-23 16:57:46 -070069 // No need to clear Queries here, since LiveIntervalUnion::Query doesn't
70 // have anything important to clear and LiveRegMatrix's runOnFunction()
71 // does a std::unique_ptr::reset anyways.
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +000072 }
73}
74
Stephen Hinesebe69fe2015-03-23 12:10:34 -070075template<typename Callable>
76bool foreachUnit(const TargetRegisterInfo *TRI, LiveInterval &VRegInterval,
77 unsigned PhysReg, Callable Func) {
78 if (VRegInterval.hasSubRanges()) {
79 for (MCRegUnitMaskIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
80 unsigned Unit = (*Units).first;
81 unsigned Mask = (*Units).second;
82 for (LiveInterval::SubRange &S : VRegInterval.subranges()) {
83 if (S.LaneMask & Mask) {
84 if (Func(Unit, S))
85 return true;
86 break;
87 }
88 }
89 }
90 } else {
91 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
92 if (Func(*Units, VRegInterval))
93 return true;
94 }
95 }
96 return false;
97}
98
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +000099void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned PhysReg) {
100 DEBUG(dbgs() << "assigning " << PrintReg(VirtReg.reg, TRI)
101 << " to " << PrintReg(PhysReg, TRI) << ':');
102 assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment");
103 VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
104 MRI->setPhysRegUsed(PhysReg);
Stephen Hinesebe69fe2015-03-23 12:10:34 -0700105
106 foreachUnit(TRI, VirtReg, PhysReg, [&](unsigned Unit,
107 const LiveRange &Range) {
108 DEBUG(dbgs() << ' ' << PrintRegUnit(Unit, TRI) << ' ' << Range);
109 Matrix[Unit].unify(VirtReg, Range);
110 return false;
111 });
112
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +0000113 ++NumAssigned;
114 DEBUG(dbgs() << '\n');
115}
116
117void LiveRegMatrix::unassign(LiveInterval &VirtReg) {
118 unsigned PhysReg = VRM->getPhys(VirtReg.reg);
119 DEBUG(dbgs() << "unassigning " << PrintReg(VirtReg.reg, TRI)
120 << " from " << PrintReg(PhysReg, TRI) << ':');
121 VRM->clearVirt(VirtReg.reg);
Stephen Hinesebe69fe2015-03-23 12:10:34 -0700122
123 foreachUnit(TRI, VirtReg, PhysReg, [&](unsigned Unit,
124 const LiveRange &Range) {
125 DEBUG(dbgs() << ' ' << PrintRegUnit(Unit, TRI));
126 Matrix[Unit].extract(VirtReg, Range);
127 return false;
128 });
129
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +0000130 ++NumUnassigned;
131 DEBUG(dbgs() << '\n');
132}
133
134bool LiveRegMatrix::checkRegMaskInterference(LiveInterval &VirtReg,
135 unsigned PhysReg) {
136 // Check if the cached information is valid.
137 // The same BitVector can be reused for all PhysRegs.
138 // We could cache multiple VirtRegs if it becomes necessary.
139 if (RegMaskVirtReg != VirtReg.reg || RegMaskTag != UserTag) {
140 RegMaskVirtReg = VirtReg.reg;
141 RegMaskTag = UserTag;
142 RegMaskUsable.clear();
143 LIS->checkRegMaskInterference(VirtReg, RegMaskUsable);
144 }
145
146 // The BitVector is indexed by PhysReg, not register unit.
147 // Regmask interference is more fine grained than regunits.
148 // For example, a Win64 call can clobber %ymm8 yet preserve %xmm8.
Jakob Stoklund Oleseneb06b0b2012-06-15 22:24:22 +0000149 return !RegMaskUsable.empty() && (!PhysReg || !RegMaskUsable.test(PhysReg));
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +0000150}
151
152bool LiveRegMatrix::checkRegUnitInterference(LiveInterval &VirtReg,
153 unsigned PhysReg) {
154 if (VirtReg.empty())
155 return false;
Jakob Stoklund Olesen45c5c572012-09-06 18:15:23 +0000156 CoalescerPair CP(VirtReg.reg, PhysReg, *TRI);
Stephen Hinesebe69fe2015-03-23 12:10:34 -0700157
158 bool Result = foreachUnit(TRI, VirtReg, PhysReg, [&](unsigned Unit,
159 const LiveRange &Range) {
160 const LiveRange &UnitRange = LIS->getRegUnit(Unit);
161 return Range.overlaps(UnitRange, CP, *LIS->getSlotIndexes());
162 });
163 return Result;
Jakob Stoklund Olesen88794802012-06-09 02:13:10 +0000164}
165
166LiveIntervalUnion::Query &LiveRegMatrix::query(LiveInterval &VirtReg,
167 unsigned RegUnit) {
168 LiveIntervalUnion::Query &Q = Queries[RegUnit];
169 Q.init(UserTag, &VirtReg, &Matrix[RegUnit]);
170 return Q;
171}
172
173LiveRegMatrix::InterferenceKind
174LiveRegMatrix::checkInterference(LiveInterval &VirtReg, unsigned PhysReg) {
175 if (VirtReg.empty())
176 return IK_Free;
177
178 // Regmask interference is the fastest check.
179 if (checkRegMaskInterference(VirtReg, PhysReg))
180 return IK_RegMask;
181
182 // Check for fixed interference.
183 if (checkRegUnitInterference(VirtReg, PhysReg))
184 return IK_RegUnit;
185
186 // Check the matrix for virtual register interference.
187 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
188 if (query(VirtReg, *Units).checkInterference())
189 return IK_VirtReg;
190
191 return IK_Free;
192}