Justin Holewinski | 49683f3 | 2012-05-04 20:18:50 +0000 | [diff] [blame] | 1 | //===-- NVPTXTargetMachine.cpp - Define TargetMachine for NVPTX -----------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // Top-level implementation for the NVPTX target. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #include "NVPTXTargetMachine.h" |
| 15 | #include "NVPTX.h" |
| 16 | #include "NVPTXSplitBBatBar.h" |
| 17 | #include "NVPTXLowerAggrCopies.h" |
| 18 | #include "MCTargetDesc/NVPTXMCAsmInfo.h" |
| 19 | #include "NVPTXAllocaHoisting.h" |
| 20 | #include "llvm/PassManager.h" |
| 21 | #include "llvm/Analysis/Passes.h" |
| 22 | #include "llvm/Analysis/Verifier.h" |
| 23 | #include "llvm/Assembly/PrintModulePass.h" |
| 24 | #include "llvm/ADT/OwningPtr.h" |
| 25 | #include "llvm/CodeGen/AsmPrinter.h" |
| 26 | #include "llvm/CodeGen/MachineFunctionAnalysis.h" |
| 27 | #include "llvm/CodeGen/MachineModuleInfo.h" |
| 28 | #include "llvm/CodeGen/Passes.h" |
| 29 | #include "llvm/MC/MCAsmInfo.h" |
| 30 | #include "llvm/MC/MCInstrInfo.h" |
| 31 | #include "llvm/MC/MCStreamer.h" |
| 32 | #include "llvm/MC/MCSubtargetInfo.h" |
| 33 | #include "llvm/Support/TargetRegistry.h" |
| 34 | #include "llvm/Support/raw_ostream.h" |
| 35 | #include "llvm/Target/TargetData.h" |
| 36 | #include "llvm/Target/TargetInstrInfo.h" |
| 37 | #include "llvm/Target/TargetLowering.h" |
| 38 | #include "llvm/Target/TargetLoweringObjectFile.h" |
| 39 | #include "llvm/Target/TargetMachine.h" |
| 40 | #include "llvm/Target/TargetOptions.h" |
| 41 | #include "llvm/Target/TargetRegisterInfo.h" |
| 42 | #include "llvm/Target/TargetSubtargetInfo.h" |
| 43 | #include "llvm/Transforms/Scalar.h" |
| 44 | #include "llvm/Support/CommandLine.h" |
| 45 | #include "llvm/Support/Debug.h" |
| 46 | #include "llvm/Support/FormattedStream.h" |
| 47 | #include "llvm/Support/TargetRegistry.h" |
| 48 | |
| 49 | |
| 50 | using namespace llvm; |
| 51 | |
| 52 | |
| 53 | extern "C" void LLVMInitializeNVPTXTarget() { |
| 54 | // Register the target. |
| 55 | RegisterTargetMachine<NVPTXTargetMachine32> X(TheNVPTXTarget32); |
| 56 | RegisterTargetMachine<NVPTXTargetMachine64> Y(TheNVPTXTarget64); |
| 57 | |
| 58 | RegisterMCAsmInfo<NVPTXMCAsmInfo> A(TheNVPTXTarget32); |
| 59 | RegisterMCAsmInfo<NVPTXMCAsmInfo> B(TheNVPTXTarget64); |
| 60 | |
| 61 | } |
| 62 | |
| 63 | NVPTXTargetMachine::NVPTXTargetMachine(const Target &T, |
| 64 | StringRef TT, |
| 65 | StringRef CPU, |
| 66 | StringRef FS, |
| 67 | const TargetOptions& Options, |
| 68 | Reloc::Model RM, |
| 69 | CodeModel::Model CM, |
| 70 | CodeGenOpt::Level OL, |
| 71 | bool is64bit) |
| 72 | : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), |
| 73 | Subtarget(TT, CPU, FS, is64bit), |
| 74 | DataLayout(Subtarget.getDataLayout()), |
| 75 | InstrInfo(*this), TLInfo(*this), TSInfo(*this), FrameLowering(*this,is64bit) |
| 76 | /*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ { |
| 77 | } |
| 78 | |
| 79 | |
| 80 | |
| 81 | void NVPTXTargetMachine32::anchor() {} |
| 82 | |
| 83 | NVPTXTargetMachine32::NVPTXTargetMachine32(const Target &T, StringRef TT, |
| 84 | StringRef CPU, StringRef FS, |
| 85 | const TargetOptions &Options, |
| 86 | Reloc::Model RM, CodeModel::Model CM, |
| 87 | CodeGenOpt::Level OL) |
| 88 | : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { |
| 89 | } |
| 90 | |
| 91 | void NVPTXTargetMachine64::anchor() {} |
| 92 | |
| 93 | NVPTXTargetMachine64::NVPTXTargetMachine64(const Target &T, StringRef TT, |
| 94 | StringRef CPU, StringRef FS, |
| 95 | const TargetOptions &Options, |
| 96 | Reloc::Model RM, CodeModel::Model CM, |
| 97 | CodeGenOpt::Level OL) |
| 98 | : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { |
| 99 | } |
| 100 | |
| 101 | |
| 102 | namespace llvm { |
| 103 | class NVPTXPassConfig : public TargetPassConfig { |
| 104 | public: |
| 105 | NVPTXPassConfig(NVPTXTargetMachine *TM, PassManagerBase &PM) |
| 106 | : TargetPassConfig(TM, PM) {} |
| 107 | |
| 108 | NVPTXTargetMachine &getNVPTXTargetMachine() const { |
| 109 | return getTM<NVPTXTargetMachine>(); |
| 110 | } |
| 111 | |
| 112 | virtual bool addInstSelector(); |
| 113 | virtual bool addPreRegAlloc(); |
| 114 | }; |
| 115 | } |
| 116 | |
| 117 | TargetPassConfig *NVPTXTargetMachine::createPassConfig(PassManagerBase &PM) { |
| 118 | NVPTXPassConfig *PassConfig = new NVPTXPassConfig(this, PM); |
| 119 | return PassConfig; |
| 120 | } |
| 121 | |
| 122 | bool NVPTXPassConfig::addInstSelector() { |
| 123 | PM->add(createLowerAggrCopies()); |
| 124 | PM->add(createSplitBBatBarPass()); |
| 125 | PM->add(createAllocaHoisting()); |
| 126 | PM->add(createNVPTXISelDag(getNVPTXTargetMachine(), getOptLevel())); |
| 127 | PM->add(createVectorElementizePass(getNVPTXTargetMachine())); |
| 128 | return false; |
| 129 | } |
| 130 | |
| 131 | bool NVPTXPassConfig::addPreRegAlloc() { |
| 132 | return false; |
| 133 | } |