Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 1 | //===-- PPC32ISelSimple.cpp - A simple instruction selector PowerPC32 -----===// |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the LLVM research group and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | |
Misha Brukman | 98649d1 | 2004-06-24 21:54:47 +0000 | [diff] [blame] | 10 | #define DEBUG_TYPE "isel" |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 11 | #include "PowerPC.h" |
| 12 | #include "PowerPCInstrBuilder.h" |
| 13 | #include "PowerPCInstrInfo.h" |
Misha Brukman | 3d9a6c2 | 2004-08-11 00:09:42 +0000 | [diff] [blame] | 14 | #include "PPC32TargetMachine.h" |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 15 | #include "llvm/Constants.h" |
| 16 | #include "llvm/DerivedTypes.h" |
| 17 | #include "llvm/Function.h" |
| 18 | #include "llvm/Instructions.h" |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 19 | #include "llvm/Pass.h" |
Misha Brukman | 8c9f520 | 2004-06-21 18:30:31 +0000 | [diff] [blame] | 20 | #include "llvm/CodeGen/IntrinsicLowering.h" |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 21 | #include "llvm/CodeGen/MachineConstantPool.h" |
| 22 | #include "llvm/CodeGen/MachineFrameInfo.h" |
| 23 | #include "llvm/CodeGen/MachineFunction.h" |
| 24 | #include "llvm/CodeGen/SSARegMap.h" |
| 25 | #include "llvm/Target/MRegisterInfo.h" |
| 26 | #include "llvm/Target/TargetMachine.h" |
| 27 | #include "llvm/Support/GetElementPtrTypeIterator.h" |
| 28 | #include "llvm/Support/InstVisitor.h" |
Reid Spencer | 551ccae | 2004-09-01 22:55:40 +0000 | [diff] [blame] | 29 | #include "llvm/Support/Debug.h" |
| 30 | #include "llvm/ADT/Statistic.h" |
Misha Brukman | 98649d1 | 2004-06-24 21:54:47 +0000 | [diff] [blame] | 31 | #include <vector> |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 32 | using namespace llvm; |
| 33 | |
| 34 | namespace { |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 35 | /// TypeClass - Used by the PowerPC backend to group LLVM types by their basic |
| 36 | /// PPC Representation. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 37 | /// |
| 38 | enum TypeClass { |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 39 | cByte, cShort, cInt, cFP32, cFP64, cLong |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 40 | }; |
| 41 | } |
| 42 | |
| 43 | /// getClass - Turn a primitive type into a "class" number which is based on the |
| 44 | /// size of the type, and whether or not it is floating point. |
| 45 | /// |
| 46 | static inline TypeClass getClass(const Type *Ty) { |
Misha Brukman | 358829f | 2004-06-21 17:25:55 +0000 | [diff] [blame] | 47 | switch (Ty->getTypeID()) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 48 | case Type::SByteTyID: |
| 49 | case Type::UByteTyID: return cByte; // Byte operands are class #0 |
| 50 | case Type::ShortTyID: |
| 51 | case Type::UShortTyID: return cShort; // Short operands are class #1 |
| 52 | case Type::IntTyID: |
| 53 | case Type::UIntTyID: |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 54 | case Type::PointerTyID: return cInt; // Ints and pointers are class #2 |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 55 | |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 56 | case Type::FloatTyID: return cFP32; // Single float is #3 |
| 57 | case Type::DoubleTyID: return cFP64; // Double Point is #4 |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 58 | |
| 59 | case Type::LongTyID: |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 60 | case Type::ULongTyID: return cLong; // Longs are class #5 |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 61 | default: |
| 62 | assert(0 && "Invalid type to getClass!"); |
| 63 | return cByte; // not reached |
| 64 | } |
| 65 | } |
| 66 | |
| 67 | // getClassB - Just like getClass, but treat boolean values as ints. |
| 68 | static inline TypeClass getClassB(const Type *Ty) { |
Nate Begeman | b73a711 | 2004-08-13 09:32:01 +0000 | [diff] [blame] | 69 | if (Ty == Type::BoolTy) return cByte; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 70 | return getClass(Ty); |
| 71 | } |
| 72 | |
| 73 | namespace { |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 74 | struct PPC32ISel : public FunctionPass, InstVisitor<PPC32ISel> { |
Misha Brukman | 3d9a6c2 | 2004-08-11 00:09:42 +0000 | [diff] [blame] | 75 | PPC32TargetMachine &TM; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 76 | MachineFunction *F; // The function we are compiling into |
| 77 | MachineBasicBlock *BB; // The current MBB we are compiling |
| 78 | int VarArgsFrameIndex; // FrameIndex for start of varargs area |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 79 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 80 | /// CollapsedGepOp - This struct is for recording the intermediate results |
| 81 | /// used to calculate the base, index, and offset of a GEP instruction. |
| 82 | struct CollapsedGepOp { |
| 83 | ConstantSInt *offset; // the current offset into the struct/array |
| 84 | Value *index; // the index of the array element |
| 85 | ConstantUInt *size; // the size of each array element |
| 86 | CollapsedGepOp(ConstantSInt *o, Value *i, ConstantUInt *s) : |
| 87 | offset(o), index(i), size(s) {} |
| 88 | }; |
| 89 | |
| 90 | /// FoldedGEP - This struct is for recording the necessary information to |
| 91 | /// emit the GEP in a load or store instruction, used by emitGEPOperation. |
| 92 | struct FoldedGEP { |
| 93 | unsigned base; |
| 94 | unsigned index; |
| 95 | ConstantSInt *offset; |
| 96 | FoldedGEP() : base(0), index(0), offset(0) {} |
| 97 | FoldedGEP(unsigned b, unsigned i, ConstantSInt *o) : |
| 98 | base(b), index(i), offset(o) {} |
| 99 | }; |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 100 | |
| 101 | /// RlwimiRec - This struct is for recording the arguments to a PowerPC |
| 102 | /// rlwimi instruction to be output for a particular Instruction::Or when |
| 103 | /// we recognize the pattern for rlwimi, starting with a shift or and. |
| 104 | struct RlwimiRec { |
| 105 | Value *Target, *Insert; |
| 106 | unsigned Shift, MB, ME; |
| 107 | RlwimiRec() : Target(0), Insert(0), Shift(0), MB(0), ME(0) {} |
| 108 | RlwimiRec(Value *tgt, Value *ins, unsigned s, unsigned b, unsigned e) : |
| 109 | Target(tgt), Insert(ins), Shift(s), MB(b), ME(e) {} |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 110 | }; |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 111 | |
Misha Brukman | c7cd5e5 | 2005-03-21 19:22:14 +0000 | [diff] [blame] | 112 | // External functions we may use in compiling the Module |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 113 | Function *fmodfFn, *fmodFn, *__cmpdi2Fn, *__moddi3Fn, *__divdi3Fn, |
| 114 | *__umoddi3Fn, *__udivdi3Fn, *__fixsfdiFn, *__fixdfdiFn, *__fixunssfdiFn, |
| 115 | *__fixunsdfdiFn, *__floatdisfFn, *__floatdidfFn, *mallocFn, *freeFn; |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 116 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 117 | // Mapping between Values and SSA Regs |
| 118 | std::map<Value*, unsigned> RegMap; |
| 119 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 120 | // MBBMap - Mapping between LLVM BB -> Machine BB |
| 121 | std::map<const BasicBlock*, MachineBasicBlock*> MBBMap; |
| 122 | |
| 123 | // AllocaMap - Mapping from fixed sized alloca instructions to the |
| 124 | // FrameIndex for the alloca. |
| 125 | std::map<AllocaInst*, unsigned> AllocaMap; |
| 126 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 127 | // GEPMap - Mapping between basic blocks and GEP definitions |
| 128 | std::map<GetElementPtrInst*, FoldedGEP> GEPMap; |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 129 | |
| 130 | // RlwimiMap - Mapping between BinaryOperand (Or) instructions and info |
| 131 | // needed to properly emit a rlwimi instruction in its place. |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 132 | std::map<Instruction *, RlwimiRec> InsertMap; |
| 133 | |
| 134 | // A rlwimi instruction is the combination of at least three instructions. |
| 135 | // Keep a vector of instructions to skip around so that we do not try to |
| 136 | // emit instructions that were folded into a rlwimi. |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 137 | std::vector<Instruction *> SkipList; |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 138 | |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 139 | // A Reg to hold the base address used for global loads and stores, and a |
| 140 | // flag to set whether or not we need to emit it for this function. |
| 141 | unsigned GlobalBaseReg; |
| 142 | bool GlobalBaseInitialized; |
| 143 | |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 144 | PPC32ISel(TargetMachine &tm):TM(reinterpret_cast<PPC32TargetMachine&>(tm)), |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 145 | F(0), BB(0) {} |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 146 | |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 147 | bool doInitialization(Module &M) { |
Misha Brukman | b093259 | 2004-07-07 15:36:18 +0000 | [diff] [blame] | 148 | // Add external functions that we may call |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 149 | Type *i = Type::IntTy; |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 150 | Type *d = Type::DoubleTy; |
Misha Brukman | f3f6382 | 2004-07-08 19:41:16 +0000 | [diff] [blame] | 151 | Type *f = Type::FloatTy; |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 152 | Type *l = Type::LongTy; |
| 153 | Type *ul = Type::ULongTy; |
Misha Brukman | 313efcb | 2004-07-09 15:45:07 +0000 | [diff] [blame] | 154 | Type *voidPtr = PointerType::get(Type::SByteTy); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 155 | // float fmodf(float, float); |
| 156 | fmodfFn = M.getOrInsertFunction("fmodf", f, f, f, 0); |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 157 | // double fmod(double, double); |
Misha Brukman | 0aa97c6 | 2004-07-08 18:27:59 +0000 | [diff] [blame] | 158 | fmodFn = M.getOrInsertFunction("fmod", d, d, d, 0); |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 159 | // int __cmpdi2(long, long); |
| 160 | __cmpdi2Fn = M.getOrInsertFunction("__cmpdi2", i, l, l, 0); |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 161 | // long __moddi3(long, long); |
Misha Brukman | 0aa97c6 | 2004-07-08 18:27:59 +0000 | [diff] [blame] | 162 | __moddi3Fn = M.getOrInsertFunction("__moddi3", l, l, l, 0); |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 163 | // long __divdi3(long, long); |
Misha Brukman | 0aa97c6 | 2004-07-08 18:27:59 +0000 | [diff] [blame] | 164 | __divdi3Fn = M.getOrInsertFunction("__divdi3", l, l, l, 0); |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 165 | // unsigned long __umoddi3(unsigned long, unsigned long); |
Misha Brukman | 0aa97c6 | 2004-07-08 18:27:59 +0000 | [diff] [blame] | 166 | __umoddi3Fn = M.getOrInsertFunction("__umoddi3", ul, ul, ul, 0); |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 167 | // unsigned long __udivdi3(unsigned long, unsigned long); |
Misha Brukman | 0aa97c6 | 2004-07-08 18:27:59 +0000 | [diff] [blame] | 168 | __udivdi3Fn = M.getOrInsertFunction("__udivdi3", ul, ul, ul, 0); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 169 | // long __fixsfdi(float) |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 170 | __fixsfdiFn = M.getOrInsertFunction("__fixsfdi", l, f, 0); |
Misha Brukman | f3f6382 | 2004-07-08 19:41:16 +0000 | [diff] [blame] | 171 | // long __fixdfdi(double) |
| 172 | __fixdfdiFn = M.getOrInsertFunction("__fixdfdi", l, d, 0); |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 173 | // unsigned long __fixunssfdi(float) |
| 174 | __fixunssfdiFn = M.getOrInsertFunction("__fixunssfdi", ul, f, 0); |
| 175 | // unsigned long __fixunsdfdi(double) |
| 176 | __fixunsdfdiFn = M.getOrInsertFunction("__fixunsdfdi", ul, d, 0); |
Misha Brukman | f3f6382 | 2004-07-08 19:41:16 +0000 | [diff] [blame] | 177 | // float __floatdisf(long) |
| 178 | __floatdisfFn = M.getOrInsertFunction("__floatdisf", f, l, 0); |
| 179 | // double __floatdidf(long) |
| 180 | __floatdidfFn = M.getOrInsertFunction("__floatdidf", d, l, 0); |
Misha Brukman | 313efcb | 2004-07-09 15:45:07 +0000 | [diff] [blame] | 181 | // void* malloc(size_t) |
| 182 | mallocFn = M.getOrInsertFunction("malloc", voidPtr, Type::UIntTy, 0); |
| 183 | // void free(void*) |
| 184 | freeFn = M.getOrInsertFunction("free", Type::VoidTy, voidPtr, 0); |
Misha Brukman | c7cd5e5 | 2005-03-21 19:22:14 +0000 | [diff] [blame] | 185 | return true; |
Misha Brukman | 2834a4d | 2004-07-07 20:07:22 +0000 | [diff] [blame] | 186 | } |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 187 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 188 | /// runOnFunction - Top level implementation of instruction selection for |
| 189 | /// the entire function. |
| 190 | /// |
| 191 | bool runOnFunction(Function &Fn) { |
| 192 | // First pass over the function, lower any unknown intrinsic functions |
| 193 | // with the IntrinsicLowering class. |
| 194 | LowerUnknownIntrinsicFunctionCalls(Fn); |
| 195 | |
| 196 | F = &MachineFunction::construct(&Fn, TM); |
| 197 | |
| 198 | // Create all of the machine basic blocks for the function... |
| 199 | for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) |
| 200 | F->getBasicBlockList().push_back(MBBMap[I] = new MachineBasicBlock(I)); |
| 201 | |
| 202 | BB = &F->front(); |
| 203 | |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 204 | // Make sure we re-emit a set of the global base reg if necessary |
| 205 | GlobalBaseInitialized = false; |
| 206 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 207 | // Copy incoming arguments off of the stack... |
| 208 | LoadArgumentsToVirtualRegs(Fn); |
| 209 | |
| 210 | // Instruction select everything except PHI nodes |
| 211 | visit(Fn); |
| 212 | |
| 213 | // Select the PHI nodes |
| 214 | SelectPHINodes(); |
| 215 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 216 | GEPMap.clear(); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 217 | RegMap.clear(); |
| 218 | MBBMap.clear(); |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 219 | InsertMap.clear(); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 220 | AllocaMap.clear(); |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 221 | SkipList.clear(); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 222 | F = 0; |
| 223 | // We always build a machine code representation for the function |
| 224 | return true; |
| 225 | } |
| 226 | |
| 227 | virtual const char *getPassName() const { |
| 228 | return "PowerPC Simple Instruction Selection"; |
| 229 | } |
| 230 | |
| 231 | /// visitBasicBlock - This method is called when we are visiting a new basic |
| 232 | /// block. This simply creates a new MachineBasicBlock to emit code into |
| 233 | /// and adds it to the current MachineFunction. Subsequent visit* for |
| 234 | /// instructions will be invoked for all instructions in the basic block. |
| 235 | /// |
| 236 | void visitBasicBlock(BasicBlock &LLVM_BB) { |
| 237 | BB = MBBMap[&LLVM_BB]; |
| 238 | } |
| 239 | |
| 240 | /// LowerUnknownIntrinsicFunctionCalls - This performs a prepass over the |
| 241 | /// function, lowering any calls to unknown intrinsic functions into the |
| 242 | /// equivalent LLVM code. |
| 243 | /// |
| 244 | void LowerUnknownIntrinsicFunctionCalls(Function &F); |
| 245 | |
| 246 | /// LoadArgumentsToVirtualRegs - Load all of the arguments to this function |
| 247 | /// from the stack into virtual registers. |
| 248 | /// |
| 249 | void LoadArgumentsToVirtualRegs(Function &F); |
| 250 | |
| 251 | /// SelectPHINodes - Insert machine code to generate phis. This is tricky |
| 252 | /// because we have to generate our sources into the source basic blocks, |
| 253 | /// not the current one. |
| 254 | /// |
| 255 | void SelectPHINodes(); |
| 256 | |
| 257 | // Visitation methods for various instructions. These methods simply emit |
| 258 | // fixed PowerPC code for each instruction. |
| 259 | |
Chris Lattner | 289a49a | 2004-10-16 18:13:47 +0000 | [diff] [blame] | 260 | // Control flow operators. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 261 | void visitReturnInst(ReturnInst &RI); |
| 262 | void visitBranchInst(BranchInst &BI); |
Chris Lattner | 289a49a | 2004-10-16 18:13:47 +0000 | [diff] [blame] | 263 | void visitUnreachableInst(UnreachableInst &UI) {} |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 264 | |
| 265 | struct ValueRecord { |
| 266 | Value *Val; |
| 267 | unsigned Reg; |
| 268 | const Type *Ty; |
| 269 | ValueRecord(unsigned R, const Type *T) : Val(0), Reg(R), Ty(T) {} |
| 270 | ValueRecord(Value *V) : Val(V), Reg(0), Ty(V->getType()) {} |
| 271 | }; |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 272 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 273 | void doCall(const ValueRecord &Ret, MachineInstr *CallMI, |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 274 | const std::vector<ValueRecord> &Args, bool isVarArg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 275 | void visitCallInst(CallInst &I); |
| 276 | void visitIntrinsicCall(Intrinsic::ID ID, CallInst &I); |
| 277 | |
| 278 | // Arithmetic operators |
| 279 | void visitSimpleBinary(BinaryOperator &B, unsigned OpcodeClass); |
| 280 | void visitAdd(BinaryOperator &B) { visitSimpleBinary(B, 0); } |
| 281 | void visitSub(BinaryOperator &B) { visitSimpleBinary(B, 1); } |
| 282 | void visitMul(BinaryOperator &B); |
| 283 | |
| 284 | void visitDiv(BinaryOperator &B) { visitDivRem(B); } |
| 285 | void visitRem(BinaryOperator &B) { visitDivRem(B); } |
| 286 | void visitDivRem(BinaryOperator &B); |
| 287 | |
| 288 | // Bitwise operators |
| 289 | void visitAnd(BinaryOperator &B) { visitSimpleBinary(B, 2); } |
| 290 | void visitOr (BinaryOperator &B) { visitSimpleBinary(B, 3); } |
| 291 | void visitXor(BinaryOperator &B) { visitSimpleBinary(B, 4); } |
| 292 | |
| 293 | // Comparison operators... |
| 294 | void visitSetCondInst(SetCondInst &I); |
| 295 | unsigned EmitComparison(unsigned OpNum, Value *Op0, Value *Op1, |
| 296 | MachineBasicBlock *MBB, |
| 297 | MachineBasicBlock::iterator MBBI); |
| 298 | void visitSelectInst(SelectInst &SI); |
| 299 | |
| 300 | |
| 301 | // Memory Instructions |
| 302 | void visitLoadInst(LoadInst &I); |
| 303 | void visitStoreInst(StoreInst &I); |
| 304 | void visitGetElementPtrInst(GetElementPtrInst &I); |
| 305 | void visitAllocaInst(AllocaInst &I); |
| 306 | void visitMallocInst(MallocInst &I); |
| 307 | void visitFreeInst(FreeInst &I); |
| 308 | |
| 309 | // Other operators |
| 310 | void visitShiftInst(ShiftInst &I); |
| 311 | void visitPHINode(PHINode &I) {} // PHI nodes handled by second pass |
| 312 | void visitCastInst(CastInst &I); |
| 313 | void visitVANextInst(VANextInst &I); |
| 314 | void visitVAArgInst(VAArgInst &I); |
| 315 | |
| 316 | void visitInstruction(Instruction &I) { |
| 317 | std::cerr << "Cannot instruction select: " << I; |
| 318 | abort(); |
| 319 | } |
| 320 | |
Nate Begeman | b47321b | 2004-08-20 09:56:22 +0000 | [diff] [blame] | 321 | unsigned ExtendOrClear(MachineBasicBlock *MBB, |
| 322 | MachineBasicBlock::iterator IP, |
Nate Begeman | a2de102 | 2004-09-22 04:40:25 +0000 | [diff] [blame] | 323 | Value *Op0); |
Nate Begeman | b47321b | 2004-08-20 09:56:22 +0000 | [diff] [blame] | 324 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 325 | /// promote32 - Make a value 32-bits wide, and put it somewhere. |
| 326 | /// |
| 327 | void promote32(unsigned targetReg, const ValueRecord &VR); |
| 328 | |
| 329 | /// emitGEPOperation - Common code shared between visitGetElementPtrInst and |
| 330 | /// constant expression GEP support. |
| 331 | /// |
| 332 | void emitGEPOperation(MachineBasicBlock *BB, MachineBasicBlock::iterator IP, |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 333 | GetElementPtrInst *GEPI, bool foldGEP); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 334 | |
| 335 | /// emitCastOperation - Common code shared between visitCastInst and |
| 336 | /// constant expression cast support. |
| 337 | /// |
| 338 | void emitCastOperation(MachineBasicBlock *BB,MachineBasicBlock::iterator IP, |
| 339 | Value *Src, const Type *DestTy, unsigned TargetReg); |
| 340 | |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 341 | |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 342 | /// emitBitfieldInsert - return true if we were able to fold the sequence of |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 343 | /// instructions into a bitfield insert (rlwimi). |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 344 | bool emitBitfieldInsert(User *OpUser, unsigned DestReg); |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 345 | |
| 346 | /// emitBitfieldExtract - return true if we were able to fold the sequence |
| 347 | /// of instructions into a bitfield extract (rlwinm). |
| 348 | bool emitBitfieldExtract(MachineBasicBlock *MBB, |
| 349 | MachineBasicBlock::iterator IP, |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 350 | User *OpUser, unsigned DestReg); |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 351 | |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 352 | /// emitBinaryConstOperation - Used by several functions to emit simple |
| 353 | /// arithmetic and logical operations with constants on a register rather |
| 354 | /// than a Value. |
| 355 | /// |
| 356 | void emitBinaryConstOperation(MachineBasicBlock *MBB, |
| 357 | MachineBasicBlock::iterator IP, |
| 358 | unsigned Op0Reg, ConstantInt *Op1, |
| 359 | unsigned Opcode, unsigned DestReg); |
| 360 | |
| 361 | /// emitSimpleBinaryOperation - Implement simple binary operators for |
| 362 | /// integral types. OperatorClass is one of: 0 for Add, 1 for Sub, |
| 363 | /// 2 for And, 3 for Or, 4 for Xor. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 364 | /// |
| 365 | void emitSimpleBinaryOperation(MachineBasicBlock *BB, |
| 366 | MachineBasicBlock::iterator IP, |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 367 | BinaryOperator *BO, Value *Op0, Value *Op1, |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 368 | unsigned OperatorClass, unsigned TargetReg); |
| 369 | |
| 370 | /// emitBinaryFPOperation - This method handles emission of floating point |
| 371 | /// Add (0), Sub (1), Mul (2), and Div (3) operations. |
| 372 | void emitBinaryFPOperation(MachineBasicBlock *BB, |
| 373 | MachineBasicBlock::iterator IP, |
| 374 | Value *Op0, Value *Op1, |
| 375 | unsigned OperatorClass, unsigned TargetReg); |
| 376 | |
| 377 | void emitMultiply(MachineBasicBlock *BB, MachineBasicBlock::iterator IP, |
| 378 | Value *Op0, Value *Op1, unsigned TargetReg); |
| 379 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 380 | void doMultiply(MachineBasicBlock *MBB, |
| 381 | MachineBasicBlock::iterator IP, |
| 382 | unsigned DestReg, Value *Op0, Value *Op1); |
| 383 | |
| 384 | /// doMultiplyConst - This method will multiply the value in Op0Reg by the |
| 385 | /// value of the ContantInt *CI |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 386 | void doMultiplyConst(MachineBasicBlock *MBB, |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 387 | MachineBasicBlock::iterator IP, |
| 388 | unsigned DestReg, Value *Op0, ConstantInt *CI); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 389 | |
| 390 | void emitDivRemOperation(MachineBasicBlock *BB, |
| 391 | MachineBasicBlock::iterator IP, |
| 392 | Value *Op0, Value *Op1, bool isDiv, |
| 393 | unsigned TargetReg); |
| 394 | |
| 395 | /// emitSetCCOperation - Common code shared between visitSetCondInst and |
| 396 | /// constant expression support. |
| 397 | /// |
| 398 | void emitSetCCOperation(MachineBasicBlock *BB, |
| 399 | MachineBasicBlock::iterator IP, |
| 400 | Value *Op0, Value *Op1, unsigned Opcode, |
| 401 | unsigned TargetReg); |
| 402 | |
| 403 | /// emitShiftOperation - Common code shared between visitShiftInst and |
| 404 | /// constant expression support. |
| 405 | /// |
| 406 | void emitShiftOperation(MachineBasicBlock *MBB, |
| 407 | MachineBasicBlock::iterator IP, |
| 408 | Value *Op, Value *ShiftAmount, bool isLeftShift, |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 409 | const Type *ResultTy, ShiftInst *SI, |
| 410 | unsigned DestReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 411 | |
| 412 | /// emitSelectOperation - Common code shared between visitSelectInst and the |
| 413 | /// constant expression support. |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 414 | /// |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 415 | void emitSelectOperation(MachineBasicBlock *MBB, |
| 416 | MachineBasicBlock::iterator IP, |
| 417 | Value *Cond, Value *TrueVal, Value *FalseVal, |
| 418 | unsigned DestReg); |
| 419 | |
Nate Begeman | 1f5308e | 2004-11-18 06:51:29 +0000 | [diff] [blame] | 420 | /// getGlobalBaseReg - Output the instructions required to put the |
| 421 | /// base address to use for accessing globals into a register. Returns the |
| 422 | /// register containing the base address. |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 423 | /// |
Nate Begeman | 5e96661 | 2005-03-24 06:28:42 +0000 | [diff] [blame] | 424 | unsigned getGlobalBaseReg(); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 425 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 426 | /// copyConstantToRegister - Output the instructions required to put the |
| 427 | /// specified constant into the specified register. |
| 428 | /// |
| 429 | void copyConstantToRegister(MachineBasicBlock *MBB, |
| 430 | MachineBasicBlock::iterator MBBI, |
| 431 | Constant *C, unsigned Reg); |
| 432 | |
| 433 | void emitUCOM(MachineBasicBlock *MBB, MachineBasicBlock::iterator MBBI, |
| 434 | unsigned LHS, unsigned RHS); |
| 435 | |
| 436 | /// makeAnotherReg - This method returns the next register number we haven't |
| 437 | /// yet used. |
| 438 | /// |
| 439 | /// Long values are handled somewhat specially. They are always allocated |
| 440 | /// as pairs of 32 bit integer values. The register number returned is the |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 441 | /// high 32 bits of the long value, and the regNum+1 is the low 32 bits. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 442 | /// |
| 443 | unsigned makeAnotherReg(const Type *Ty) { |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 444 | assert(dynamic_cast<const PPC32RegisterInfo*>(TM.getRegisterInfo()) && |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 445 | "Current target doesn't have PPC reg info??"); |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 446 | const PPC32RegisterInfo *PPCRI = |
| 447 | static_cast<const PPC32RegisterInfo*>(TM.getRegisterInfo()); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 448 | if (Ty == Type::LongTy || Ty == Type::ULongTy) { |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 449 | const TargetRegisterClass *RC = PPCRI->getRegClassForType(Type::IntTy); |
| 450 | // Create the upper part |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 451 | F->getSSARegMap()->createVirtualRegister(RC); |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 452 | // Create the lower part. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 453 | return F->getSSARegMap()->createVirtualRegister(RC)-1; |
| 454 | } |
| 455 | |
| 456 | // Add the mapping of regnumber => reg class to MachineFunction |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 457 | const TargetRegisterClass *RC = PPCRI->getRegClassForType(Ty); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 458 | return F->getSSARegMap()->createVirtualRegister(RC); |
| 459 | } |
| 460 | |
| 461 | /// getReg - This method turns an LLVM value into a register number. |
| 462 | /// |
| 463 | unsigned getReg(Value &V) { return getReg(&V); } // Allow references |
| 464 | unsigned getReg(Value *V) { |
| 465 | // Just append to the end of the current bb. |
| 466 | MachineBasicBlock::iterator It = BB->end(); |
| 467 | return getReg(V, BB, It); |
| 468 | } |
| 469 | unsigned getReg(Value *V, MachineBasicBlock *MBB, |
| 470 | MachineBasicBlock::iterator IPt); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 471 | |
| 472 | /// canUseAsImmediateForOpcode - This method returns whether a ConstantInt |
| 473 | /// is okay to use as an immediate argument to a certain binary operation |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 474 | bool canUseAsImmediateForOpcode(ConstantInt *CI, unsigned Opcode, |
| 475 | bool Shifted); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 476 | |
| 477 | /// getFixedSizedAllocaFI - Return the frame index for a fixed sized alloca |
| 478 | /// that is to be statically allocated with the initial stack frame |
| 479 | /// adjustment. |
| 480 | unsigned getFixedSizedAllocaFI(AllocaInst *AI); |
| 481 | }; |
| 482 | } |
| 483 | |
| 484 | /// dyn_castFixedAlloca - If the specified value is a fixed size alloca |
| 485 | /// instruction in the entry block, return it. Otherwise, return a null |
| 486 | /// pointer. |
| 487 | static AllocaInst *dyn_castFixedAlloca(Value *V) { |
| 488 | if (AllocaInst *AI = dyn_cast<AllocaInst>(V)) { |
| 489 | BasicBlock *BB = AI->getParent(); |
| 490 | if (isa<ConstantUInt>(AI->getArraySize()) && BB ==&BB->getParent()->front()) |
| 491 | return AI; |
| 492 | } |
| 493 | return 0; |
| 494 | } |
| 495 | |
| 496 | /// getReg - This method turns an LLVM value into a register number. |
| 497 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 498 | unsigned PPC32ISel::getReg(Value *V, MachineBasicBlock *MBB, |
| 499 | MachineBasicBlock::iterator IPt) { |
Misha Brukman | ba1c1da | 2004-07-20 00:59:38 +0000 | [diff] [blame] | 500 | if (Constant *C = dyn_cast<Constant>(V)) { |
Chris Lattner | a51e4f6 | 2004-07-18 18:45:01 +0000 | [diff] [blame] | 501 | unsigned Reg = makeAnotherReg(V->getType()); |
| 502 | copyConstantToRegister(MBB, IPt, C, Reg); |
| 503 | return Reg; |
Nate Begeman | 676dee6 | 2004-11-08 02:25:40 +0000 | [diff] [blame] | 504 | } else if (CastInst *CI = dyn_cast<CastInst>(V)) { |
| 505 | // Do not emit noop casts at all, unless it's a double -> float cast. |
| 506 | if (getClassB(CI->getType()) == getClassB(CI->getOperand(0)->getType())) |
| 507 | return getReg(CI->getOperand(0), MBB, IPt); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 508 | } else if (AllocaInst *AI = dyn_castFixedAlloca(V)) { |
| 509 | unsigned Reg = makeAnotherReg(V->getType()); |
| 510 | unsigned FI = getFixedSizedAllocaFI(AI); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 511 | addFrameReference(BuildMI(*MBB, IPt, PPC::ADDI, 2, Reg), FI, 0, false); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 512 | return Reg; |
| 513 | } |
| 514 | |
| 515 | unsigned &Reg = RegMap[V]; |
| 516 | if (Reg == 0) { |
| 517 | Reg = makeAnotherReg(V->getType()); |
| 518 | RegMap[V] = Reg; |
| 519 | } |
| 520 | |
| 521 | return Reg; |
| 522 | } |
| 523 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 524 | /// canUseAsImmediateForOpcode - This method returns whether a ConstantInt |
| 525 | /// is okay to use as an immediate argument to a certain binary operator. |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 526 | /// The shifted argument determines if the immediate is suitable to be used with |
| 527 | /// the PowerPC instructions such as addis which concatenate 16 bits of the |
| 528 | /// immediate with 16 bits of zeroes. |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 529 | /// |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 530 | bool PPC32ISel::canUseAsImmediateForOpcode(ConstantInt *CI, unsigned Opcode, |
| 531 | bool Shifted) { |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 532 | ConstantSInt *Op1Cs; |
| 533 | ConstantUInt *Op1Cu; |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 534 | |
| 535 | // For shifted immediates, any value with the low halfword cleared may be used |
| 536 | if (Shifted) { |
Nate Begeman | bdf6984 | 2004-10-08 02:49:24 +0000 | [diff] [blame] | 537 | if (((int32_t)CI->getRawValue() & 0x0000FFFF) == 0) |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 538 | return true; |
Nate Begeman | bdf6984 | 2004-10-08 02:49:24 +0000 | [diff] [blame] | 539 | else |
| 540 | return false; |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 541 | } |
Nate Begeman | 28dd2fc | 2004-11-04 19:43:18 +0000 | [diff] [blame] | 542 | |
| 543 | // Treat subfic like addi for the purposes of constant validation |
| 544 | if (Opcode == 5) Opcode = 0; |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 545 | |
Nate Begeman | 28dd2fc | 2004-11-04 19:43:18 +0000 | [diff] [blame] | 546 | // addi, subfic, compare, and non-indexed load take SIMM |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 547 | bool cond1 = (Opcode < 2) |
Nate Begeman | a41fc77 | 2004-09-29 02:35:05 +0000 | [diff] [blame] | 548 | && ((int32_t)CI->getRawValue() <= 32767) |
| 549 | && ((int32_t)CI->getRawValue() >= -32768); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 550 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 551 | // ANDIo, ORI, and XORI take unsigned values |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 552 | bool cond2 = (Opcode >= 2) |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 553 | && (Op1Cs = dyn_cast<ConstantSInt>(CI)) |
| 554 | && (Op1Cs->getValue() >= 0) |
Nate Begeman | a41fc77 | 2004-09-29 02:35:05 +0000 | [diff] [blame] | 555 | && (Op1Cs->getValue() <= 65535); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 556 | |
| 557 | // ANDIo, ORI, and XORI take UIMMs, so they can be larger |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 558 | bool cond3 = (Opcode >= 2) |
Misha Brukman | 17a9000 | 2004-07-21 20:22:06 +0000 | [diff] [blame] | 559 | && (Op1Cu = dyn_cast<ConstantUInt>(CI)) |
| 560 | && (Op1Cu->getValue() <= 65535); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 561 | |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 562 | if (cond1 || cond2 || cond3) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 563 | return true; |
| 564 | |
| 565 | return false; |
| 566 | } |
| 567 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 568 | /// getFixedSizedAllocaFI - Return the frame index for a fixed sized alloca |
| 569 | /// that is to be statically allocated with the initial stack frame |
| 570 | /// adjustment. |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 571 | unsigned PPC32ISel::getFixedSizedAllocaFI(AllocaInst *AI) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 572 | // Already computed this? |
| 573 | std::map<AllocaInst*, unsigned>::iterator I = AllocaMap.lower_bound(AI); |
| 574 | if (I != AllocaMap.end() && I->first == AI) return I->second; |
| 575 | |
| 576 | const Type *Ty = AI->getAllocatedType(); |
| 577 | ConstantUInt *CUI = cast<ConstantUInt>(AI->getArraySize()); |
| 578 | unsigned TySize = TM.getTargetData().getTypeSize(Ty); |
| 579 | TySize *= CUI->getValue(); // Get total allocated size... |
| 580 | unsigned Alignment = TM.getTargetData().getTypeAlignment(Ty); |
| 581 | |
| 582 | // Create a new stack object using the frame manager... |
| 583 | int FrameIdx = F->getFrameInfo()->CreateStackObject(TySize, Alignment); |
| 584 | AllocaMap.insert(I, std::make_pair(AI, FrameIdx)); |
| 585 | return FrameIdx; |
| 586 | } |
| 587 | |
| 588 | |
Nate Begeman | 1f5308e | 2004-11-18 06:51:29 +0000 | [diff] [blame] | 589 | /// getGlobalBaseReg - Output the instructions required to put the |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 590 | /// base address to use for accessing globals into a register. |
| 591 | /// |
Nate Begeman | 5e96661 | 2005-03-24 06:28:42 +0000 | [diff] [blame] | 592 | unsigned PPC32ISel::getGlobalBaseReg() { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 593 | if (!GlobalBaseInitialized) { |
| 594 | // Insert the set of GlobalBaseReg into the first MBB of the function |
| 595 | MachineBasicBlock &FirstMBB = F->front(); |
| 596 | MachineBasicBlock::iterator MBBI = FirstMBB.begin(); |
| 597 | GlobalBaseReg = makeAnotherReg(Type::IntTy); |
Nate Begeman | b7a8f2c | 2004-09-02 08:13:00 +0000 | [diff] [blame] | 598 | BuildMI(FirstMBB, MBBI, PPC::MovePCtoLR, 0, PPC::LR); |
Nate Begeman | da721e7 | 2004-09-27 05:08:17 +0000 | [diff] [blame] | 599 | BuildMI(FirstMBB, MBBI, PPC::MFLR, 1, GlobalBaseReg).addReg(PPC::LR); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 600 | GlobalBaseInitialized = true; |
| 601 | } |
Nate Begeman | 1f5308e | 2004-11-18 06:51:29 +0000 | [diff] [blame] | 602 | return GlobalBaseReg; |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 603 | } |
| 604 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 605 | /// copyConstantToRegister - Output the instructions required to put the |
| 606 | /// specified constant into the specified register. |
| 607 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 608 | void PPC32ISel::copyConstantToRegister(MachineBasicBlock *MBB, |
| 609 | MachineBasicBlock::iterator IP, |
| 610 | Constant *C, unsigned R) { |
Chris Lattner | 289a49a | 2004-10-16 18:13:47 +0000 | [diff] [blame] | 611 | if (isa<UndefValue>(C)) { |
| 612 | BuildMI(*MBB, IP, PPC::IMPLICIT_DEF, 0, R); |
Chris Lattner | 411eba0 | 2005-03-08 22:53:09 +0000 | [diff] [blame] | 613 | if (getClassB(C->getType()) == cLong) |
Chris Lattner | 3c70764 | 2005-01-14 20:22:02 +0000 | [diff] [blame] | 614 | BuildMI(*MBB, IP, PPC::IMPLICIT_DEF, 0, R+1); |
Chris Lattner | 289a49a | 2004-10-16 18:13:47 +0000 | [diff] [blame] | 615 | return; |
| 616 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 617 | if (C->getType()->isIntegral()) { |
| 618 | unsigned Class = getClassB(C->getType()); |
| 619 | |
| 620 | if (Class == cLong) { |
Misha Brukman | a0af38c | 2004-07-28 19:13:49 +0000 | [diff] [blame] | 621 | if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(C)) { |
| 622 | uint64_t uval = CUI->getValue(); |
| 623 | unsigned hiUVal = uval >> 32; |
| 624 | unsigned loUVal = uval; |
| 625 | ConstantUInt *CUHi = ConstantUInt::get(Type::UIntTy, hiUVal); |
| 626 | ConstantUInt *CULo = ConstantUInt::get(Type::UIntTy, loUVal); |
| 627 | copyConstantToRegister(MBB, IP, CUHi, R); |
| 628 | copyConstantToRegister(MBB, IP, CULo, R+1); |
| 629 | return; |
| 630 | } else if (ConstantSInt *CSI = dyn_cast<ConstantSInt>(C)) { |
| 631 | int64_t sval = CSI->getValue(); |
| 632 | int hiSVal = sval >> 32; |
| 633 | int loSVal = sval; |
| 634 | ConstantSInt *CSHi = ConstantSInt::get(Type::IntTy, hiSVal); |
| 635 | ConstantSInt *CSLo = ConstantSInt::get(Type::IntTy, loSVal); |
| 636 | copyConstantToRegister(MBB, IP, CSHi, R); |
| 637 | copyConstantToRegister(MBB, IP, CSLo, R+1); |
| 638 | return; |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 639 | } else { |
Misha Brukman | a0af38c | 2004-07-28 19:13:49 +0000 | [diff] [blame] | 640 | std::cerr << "Unhandled long constant type!\n"; |
| 641 | abort(); |
| 642 | } |
| 643 | } |
| 644 | |
| 645 | assert(Class <= cInt && "Type not handled yet!"); |
| 646 | |
| 647 | // Handle bool |
| 648 | if (C->getType() == Type::BoolTy) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 649 | BuildMI(*MBB, IP, PPC::LI, 1, R).addSImm(C == ConstantBool::True); |
Misha Brukman | a0af38c | 2004-07-28 19:13:49 +0000 | [diff] [blame] | 650 | return; |
| 651 | } |
| 652 | |
| 653 | // Handle int |
| 654 | if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(C)) { |
| 655 | unsigned uval = CUI->getValue(); |
| 656 | if (uval < 32768) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 657 | BuildMI(*MBB, IP, PPC::LI, 1, R).addSImm(uval); |
Misha Brukman | a0af38c | 2004-07-28 19:13:49 +0000 | [diff] [blame] | 658 | } else { |
| 659 | unsigned Temp = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 660 | BuildMI(*MBB, IP, PPC::LIS, 1, Temp).addSImm(uval >> 16); |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 661 | BuildMI(*MBB, IP, PPC::ORI, 2, R).addReg(Temp).addImm(uval & 0xFFFF); |
Misha Brukman | a0af38c | 2004-07-28 19:13:49 +0000 | [diff] [blame] | 662 | } |
| 663 | return; |
| 664 | } else if (ConstantSInt *CSI = dyn_cast<ConstantSInt>(C)) { |
| 665 | int sval = CSI->getValue(); |
| 666 | if (sval < 32768 && sval >= -32768) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 667 | BuildMI(*MBB, IP, PPC::LI, 1, R).addSImm(sval); |
Misha Brukman | a0af38c | 2004-07-28 19:13:49 +0000 | [diff] [blame] | 668 | } else { |
| 669 | unsigned Temp = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 670 | BuildMI(*MBB, IP, PPC::LIS, 1, Temp).addSImm(sval >> 16); |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 671 | BuildMI(*MBB, IP, PPC::ORI, 2, R).addReg(Temp).addImm(sval & 0xFFFF); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 672 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 673 | return; |
| 674 | } |
Misha Brukman | a0af38c | 2004-07-28 19:13:49 +0000 | [diff] [blame] | 675 | std::cerr << "Unhandled integer constant!\n"; |
| 676 | abort(); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 677 | } else if (ConstantFP *CFP = dyn_cast<ConstantFP>(C)) { |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 678 | // We need to spill the constant to memory... |
| 679 | MachineConstantPool *CP = F->getConstantPool(); |
| 680 | unsigned CPI = CP->getConstantPoolIndex(CFP); |
| 681 | const Type *Ty = CFP->getType(); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 682 | |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 683 | assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!"); |
Misha Brukman | fc879c3 | 2004-07-08 18:02:38 +0000 | [diff] [blame] | 684 | |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 685 | // Load addr of constant to reg; constant is located at base + distance |
Misha Brukman | fc879c3 | 2004-07-08 18:02:38 +0000 | [diff] [blame] | 686 | unsigned Reg1 = makeAnotherReg(Type::IntTy); |
Nate Begeman | 07a7375 | 2004-08-17 07:17:44 +0000 | [diff] [blame] | 687 | unsigned Opcode = (Ty == Type::FloatTy) ? PPC::LFS : PPC::LFD; |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 688 | // Move value at base + distance into return reg |
Nate Begeman | 1f5308e | 2004-11-18 06:51:29 +0000 | [diff] [blame] | 689 | BuildMI(*MBB, IP, PPC::LOADHiAddr, 2, Reg1) |
Nate Begeman | 5e96661 | 2005-03-24 06:28:42 +0000 | [diff] [blame] | 690 | .addReg(getGlobalBaseReg()).addConstantPoolIndex(CPI); |
Nate Begeman | ed42853 | 2004-09-04 05:00:00 +0000 | [diff] [blame] | 691 | BuildMI(*MBB, IP, Opcode, 2, R).addConstantPoolIndex(CPI).addReg(Reg1); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 692 | } else if (isa<ConstantPointerNull>(C)) { |
| 693 | // Copy zero (null pointer) to the register. |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 694 | BuildMI(*MBB, IP, PPC::LI, 1, R).addSImm(0); |
Chris Lattner | 67910e1 | 2004-07-18 07:29:35 +0000 | [diff] [blame] | 695 | } else if (GlobalValue *GV = dyn_cast<GlobalValue>(C)) { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 696 | // GV is located at base + distance |
Misha Brukman | ba1c1da | 2004-07-20 00:59:38 +0000 | [diff] [blame] | 697 | unsigned TmpReg = makeAnotherReg(GV->getType()); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 698 | |
| 699 | // Move value at base + distance into return reg |
Nate Begeman | 1f5308e | 2004-11-18 06:51:29 +0000 | [diff] [blame] | 700 | BuildMI(*MBB, IP, PPC::LOADHiAddr, 2, TmpReg) |
Nate Begeman | 5e96661 | 2005-03-24 06:28:42 +0000 | [diff] [blame] | 701 | .addReg(getGlobalBaseReg()).addGlobalAddress(GV); |
Chris Lattner | 6540c6c | 2004-11-23 05:54:25 +0000 | [diff] [blame] | 702 | |
Nate Begeman | d4c8bea | 2004-11-25 07:09:01 +0000 | [diff] [blame] | 703 | if (GV->hasWeakLinkage() || GV->isExternal()) { |
Chris Lattner | 6540c6c | 2004-11-23 05:54:25 +0000 | [diff] [blame] | 704 | BuildMI(*MBB, IP, PPC::LWZ, 2, R).addGlobalAddress(GV).addReg(TmpReg); |
| 705 | } else { |
| 706 | BuildMI(*MBB, IP, PPC::LA, 2, R).addReg(TmpReg).addGlobalAddress(GV); |
| 707 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 708 | } else { |
Chris Lattner | 76e2df2 | 2004-07-15 02:14:30 +0000 | [diff] [blame] | 709 | std::cerr << "Offending constant: " << *C << "\n"; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 710 | assert(0 && "Type not handled yet!"); |
| 711 | } |
| 712 | } |
| 713 | |
| 714 | /// LoadArgumentsToVirtualRegs - Load all of the arguments to this function from |
| 715 | /// the stack into virtual registers. |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 716 | void PPC32ISel::LoadArgumentsToVirtualRegs(Function &Fn) { |
Chris Lattner | 3ea9346 | 2004-08-06 06:58:50 +0000 | [diff] [blame] | 717 | unsigned ArgOffset = 24; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 718 | unsigned GPR_remaining = 8; |
| 719 | unsigned FPR_remaining = 13; |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 720 | unsigned GPR_idx = 0, FPR_idx = 0; |
| 721 | static const unsigned GPR[] = { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 722 | PPC::R3, PPC::R4, PPC::R5, PPC::R6, |
| 723 | PPC::R7, PPC::R8, PPC::R9, PPC::R10, |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 724 | }; |
| 725 | static const unsigned FPR[] = { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 726 | PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, |
| 727 | PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13 |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 728 | }; |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 729 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 730 | MachineFrameInfo *MFI = F->getFrameInfo(); |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 731 | |
Chris Lattner | f429a3e | 2005-04-09 16:32:30 +0000 | [diff] [blame^] | 732 | for (Function::arg_iterator I = Fn.arg_begin(), E = Fn.arg_end(); |
| 733 | I != E; ++I) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 734 | bool ArgLive = !I->use_empty(); |
| 735 | unsigned Reg = ArgLive ? getReg(*I) : 0; |
| 736 | int FI; // Frame object index |
| 737 | |
| 738 | switch (getClassB(I->getType())) { |
| 739 | case cByte: |
| 740 | if (ArgLive) { |
Misha Brukman | ec6319a | 2004-07-20 15:51:37 +0000 | [diff] [blame] | 741 | FI = MFI->CreateFixedObject(4, ArgOffset); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 742 | if (GPR_remaining > 0) { |
Chris Lattner | f429a3e | 2005-04-09 16:32:30 +0000 | [diff] [blame^] | 743 | F->addLiveIn(GPR[GPR_idx]); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 744 | BuildMI(BB, PPC::OR, 2, Reg).addReg(GPR[GPR_idx]) |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 745 | .addReg(GPR[GPR_idx]); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 746 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 747 | addFrameReference(BuildMI(BB, PPC::LBZ, 2, Reg), FI); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 748 | } |
| 749 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 750 | break; |
| 751 | case cShort: |
| 752 | if (ArgLive) { |
Misha Brukman | ec6319a | 2004-07-20 15:51:37 +0000 | [diff] [blame] | 753 | FI = MFI->CreateFixedObject(4, ArgOffset); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 754 | if (GPR_remaining > 0) { |
Chris Lattner | f429a3e | 2005-04-09 16:32:30 +0000 | [diff] [blame^] | 755 | F->addLiveIn(GPR[GPR_idx]); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 756 | BuildMI(BB, PPC::OR, 2, Reg).addReg(GPR[GPR_idx]) |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 757 | .addReg(GPR[GPR_idx]); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 758 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 759 | addFrameReference(BuildMI(BB, PPC::LHZ, 2, Reg), FI); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 760 | } |
| 761 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 762 | break; |
| 763 | case cInt: |
| 764 | if (ArgLive) { |
| 765 | FI = MFI->CreateFixedObject(4, ArgOffset); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 766 | if (GPR_remaining > 0) { |
Chris Lattner | f429a3e | 2005-04-09 16:32:30 +0000 | [diff] [blame^] | 767 | F->addLiveIn(GPR[GPR_idx]); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 768 | BuildMI(BB, PPC::OR, 2, Reg).addReg(GPR[GPR_idx]) |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 769 | .addReg(GPR[GPR_idx]); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 770 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 771 | addFrameReference(BuildMI(BB, PPC::LWZ, 2, Reg), FI); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 772 | } |
| 773 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 774 | break; |
| 775 | case cLong: |
| 776 | if (ArgLive) { |
| 777 | FI = MFI->CreateFixedObject(8, ArgOffset); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 778 | if (GPR_remaining > 1) { |
Chris Lattner | f429a3e | 2005-04-09 16:32:30 +0000 | [diff] [blame^] | 779 | F->addLiveIn(GPR[GPR_idx]); |
| 780 | F->addLiveIn(GPR[GPR_idx+1]); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 781 | BuildMI(BB, PPC::OR, 2, Reg).addReg(GPR[GPR_idx]) |
Misha Brukman | 313efcb | 2004-07-09 15:45:07 +0000 | [diff] [blame] | 782 | .addReg(GPR[GPR_idx]); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 783 | BuildMI(BB, PPC::OR, 2, Reg+1).addReg(GPR[GPR_idx+1]) |
Misha Brukman | 313efcb | 2004-07-09 15:45:07 +0000 | [diff] [blame] | 784 | .addReg(GPR[GPR_idx+1]); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 785 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 786 | addFrameReference(BuildMI(BB, PPC::LWZ, 2, Reg), FI); |
| 787 | addFrameReference(BuildMI(BB, PPC::LWZ, 2, Reg+1), FI, 4); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 788 | } |
| 789 | } |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 790 | // longs require 4 additional bytes and use 2 GPRs |
| 791 | ArgOffset += 4; |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 792 | if (GPR_remaining > 1) { |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 793 | GPR_remaining--; |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 794 | GPR_idx++; |
| 795 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 796 | break; |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 797 | case cFP32: |
| 798 | if (ArgLive) { |
| 799 | FI = MFI->CreateFixedObject(4, ArgOffset); |
| 800 | |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 801 | if (FPR_remaining > 0) { |
Chris Lattner | f429a3e | 2005-04-09 16:32:30 +0000 | [diff] [blame^] | 802 | F->addLiveIn(FPR[FPR_idx]); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 803 | BuildMI(BB, PPC::FMR, 1, Reg).addReg(FPR[FPR_idx]); |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 804 | FPR_remaining--; |
| 805 | FPR_idx++; |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 806 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 807 | addFrameReference(BuildMI(BB, PPC::LFS, 2, Reg), FI); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 808 | } |
| 809 | } |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 810 | break; |
| 811 | case cFP64: |
| 812 | if (ArgLive) { |
| 813 | FI = MFI->CreateFixedObject(8, ArgOffset); |
| 814 | |
| 815 | if (FPR_remaining > 0) { |
Chris Lattner | f429a3e | 2005-04-09 16:32:30 +0000 | [diff] [blame^] | 816 | F->addLiveIn(FPR[FPR_idx]); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 817 | BuildMI(BB, PPC::FMR, 1, Reg).addReg(FPR[FPR_idx]); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 818 | FPR_remaining--; |
| 819 | FPR_idx++; |
| 820 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 821 | addFrameReference(BuildMI(BB, PPC::LFD, 2, Reg), FI); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 822 | } |
| 823 | } |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 824 | |
| 825 | // doubles require 4 additional bytes and use 2 GPRs of param space |
| 826 | ArgOffset += 4; |
| 827 | if (GPR_remaining > 0) { |
| 828 | GPR_remaining--; |
| 829 | GPR_idx++; |
| 830 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 831 | break; |
| 832 | default: |
| 833 | assert(0 && "Unhandled argument type!"); |
| 834 | } |
| 835 | ArgOffset += 4; // Each argument takes at least 4 bytes on the stack... |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 836 | if (GPR_remaining > 0) { |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 837 | GPR_remaining--; // uses up 2 GPRs |
| 838 | GPR_idx++; |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 839 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 840 | } |
| 841 | |
| 842 | // If the function takes variable number of arguments, add a frame offset for |
| 843 | // the start of the first vararg value... this is used to expand |
| 844 | // llvm.va_start. |
| 845 | if (Fn.getFunctionType()->isVarArg()) |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 846 | VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset); |
Chris Lattner | f429a3e | 2005-04-09 16:32:30 +0000 | [diff] [blame^] | 847 | |
| 848 | if (Fn.getReturnType() != Type::VoidTy) |
| 849 | switch (getClassB(Fn.getReturnType())) { |
| 850 | case cByte: |
| 851 | case cShort: |
| 852 | case cInt: |
| 853 | F->addLiveOut(PPC::R3); |
| 854 | break; |
| 855 | case cLong: |
| 856 | F->addLiveOut(PPC::R3); |
| 857 | F->addLiveOut(PPC::R4); |
| 858 | break; |
| 859 | case cFP32: |
| 860 | case cFP64: |
| 861 | F->addLiveOut(PPC::F1); |
| 862 | break; |
| 863 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 864 | } |
| 865 | |
| 866 | |
| 867 | /// SelectPHINodes - Insert machine code to generate phis. This is tricky |
| 868 | /// because we have to generate our sources into the source basic blocks, not |
| 869 | /// the current one. |
| 870 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 871 | void PPC32ISel::SelectPHINodes() { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 872 | const TargetInstrInfo &TII = *TM.getInstrInfo(); |
| 873 | const Function &LF = *F->getFunction(); // The LLVM function... |
| 874 | for (Function::const_iterator I = LF.begin(), E = LF.end(); I != E; ++I) { |
| 875 | const BasicBlock *BB = I; |
| 876 | MachineBasicBlock &MBB = *MBBMap[I]; |
| 877 | |
| 878 | // Loop over all of the PHI nodes in the LLVM basic block... |
| 879 | MachineBasicBlock::iterator PHIInsertPoint = MBB.begin(); |
| 880 | for (BasicBlock::const_iterator I = BB->begin(); |
| 881 | PHINode *PN = const_cast<PHINode*>(dyn_cast<PHINode>(I)); ++I) { |
| 882 | |
| 883 | // Create a new machine instr PHI node, and insert it. |
| 884 | unsigned PHIReg = getReg(*PN); |
| 885 | MachineInstr *PhiMI = BuildMI(MBB, PHIInsertPoint, |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 886 | PPC::PHI, PN->getNumOperands(), PHIReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 887 | |
| 888 | MachineInstr *LongPhiMI = 0; |
| 889 | if (PN->getType() == Type::LongTy || PN->getType() == Type::ULongTy) |
| 890 | LongPhiMI = BuildMI(MBB, PHIInsertPoint, |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 891 | PPC::PHI, PN->getNumOperands(), PHIReg+1); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 892 | |
| 893 | // PHIValues - Map of blocks to incoming virtual registers. We use this |
| 894 | // so that we only initialize one incoming value for a particular block, |
| 895 | // even if the block has multiple entries in the PHI node. |
| 896 | // |
| 897 | std::map<MachineBasicBlock*, unsigned> PHIValues; |
| 898 | |
| 899 | for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) { |
Misha Brukman | 313efcb | 2004-07-09 15:45:07 +0000 | [diff] [blame] | 900 | MachineBasicBlock *PredMBB = 0; |
| 901 | for (MachineBasicBlock::pred_iterator PI = MBB.pred_begin (), |
| 902 | PE = MBB.pred_end (); PI != PE; ++PI) |
| 903 | if (PN->getIncomingBlock(i) == (*PI)->getBasicBlock()) { |
| 904 | PredMBB = *PI; |
| 905 | break; |
| 906 | } |
| 907 | assert (PredMBB && "Couldn't find incoming machine-cfg edge for phi"); |
| 908 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 909 | unsigned ValReg; |
| 910 | std::map<MachineBasicBlock*, unsigned>::iterator EntryIt = |
| 911 | PHIValues.lower_bound(PredMBB); |
| 912 | |
| 913 | if (EntryIt != PHIValues.end() && EntryIt->first == PredMBB) { |
| 914 | // We already inserted an initialization of the register for this |
| 915 | // predecessor. Recycle it. |
| 916 | ValReg = EntryIt->second; |
Misha Brukman | 4722544 | 2004-07-23 22:35:49 +0000 | [diff] [blame] | 917 | } else { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 918 | // Get the incoming value into a virtual register. |
| 919 | // |
| 920 | Value *Val = PN->getIncomingValue(i); |
| 921 | |
| 922 | // If this is a constant or GlobalValue, we may have to insert code |
| 923 | // into the basic block to compute it into a virtual register. |
| 924 | if ((isa<Constant>(Val) && !isa<ConstantExpr>(Val)) || |
| 925 | isa<GlobalValue>(Val)) { |
| 926 | // Simple constants get emitted at the end of the basic block, |
| 927 | // before any terminator instructions. We "know" that the code to |
| 928 | // move a constant into a register will never clobber any flags. |
| 929 | ValReg = getReg(Val, PredMBB, PredMBB->getFirstTerminator()); |
| 930 | } else { |
| 931 | // Because we don't want to clobber any values which might be in |
| 932 | // physical registers with the computation of this constant (which |
| 933 | // might be arbitrarily complex if it is a constant expression), |
| 934 | // just insert the computation at the top of the basic block. |
| 935 | MachineBasicBlock::iterator PI = PredMBB->begin(); |
Misha Brukman | 4722544 | 2004-07-23 22:35:49 +0000 | [diff] [blame] | 936 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 937 | // Skip over any PHI nodes though! |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 938 | while (PI != PredMBB->end() && PI->getOpcode() == PPC::PHI) |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 939 | ++PI; |
Misha Brukman | 4722544 | 2004-07-23 22:35:49 +0000 | [diff] [blame] | 940 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 941 | ValReg = getReg(Val, PredMBB, PI); |
| 942 | } |
| 943 | |
| 944 | // Remember that we inserted a value for this PHI for this predecessor |
| 945 | PHIValues.insert(EntryIt, std::make_pair(PredMBB, ValReg)); |
| 946 | } |
| 947 | |
| 948 | PhiMI->addRegOperand(ValReg); |
| 949 | PhiMI->addMachineBasicBlockOperand(PredMBB); |
| 950 | if (LongPhiMI) { |
| 951 | LongPhiMI->addRegOperand(ValReg+1); |
| 952 | LongPhiMI->addMachineBasicBlockOperand(PredMBB); |
| 953 | } |
| 954 | } |
| 955 | |
| 956 | // Now that we emitted all of the incoming values for the PHI node, make |
| 957 | // sure to reposition the InsertPoint after the PHI that we just added. |
| 958 | // This is needed because we might have inserted a constant into this |
| 959 | // block, right after the PHI's which is before the old insert point! |
| 960 | PHIInsertPoint = LongPhiMI ? LongPhiMI : PhiMI; |
| 961 | ++PHIInsertPoint; |
| 962 | } |
| 963 | } |
| 964 | } |
| 965 | |
| 966 | |
| 967 | // canFoldSetCCIntoBranchOrSelect - Return the setcc instruction if we can fold |
| 968 | // it into the conditional branch or select instruction which is the only user |
| 969 | // of the cc instruction. This is the case if the conditional branch is the |
| 970 | // only user of the setcc, and if the setcc is in the same basic block as the |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 971 | // conditional branch. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 972 | // |
| 973 | static SetCondInst *canFoldSetCCIntoBranchOrSelect(Value *V) { |
| 974 | if (SetCondInst *SCI = dyn_cast<SetCondInst>(V)) |
| 975 | if (SCI->hasOneUse()) { |
| 976 | Instruction *User = cast<Instruction>(SCI->use_back()); |
Chris Lattner | fbd4de1 | 2005-01-14 19:31:00 +0000 | [diff] [blame] | 977 | if ((isa<BranchInst>(User) || |
| 978 | (isa<SelectInst>(User) && User->getOperand(0) == V)) && |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 979 | SCI->getParent() == User->getParent()) |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 980 | return SCI; |
| 981 | } |
| 982 | return 0; |
| 983 | } |
| 984 | |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 985 | // canFoldGEPIntoLoadOrStore - Return the GEP instruction if we can fold it into |
| 986 | // the load or store instruction that is the only user of the GEP. |
| 987 | // |
| 988 | static GetElementPtrInst *canFoldGEPIntoLoadOrStore(Value *V) { |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 989 | if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(V)) { |
| 990 | bool AllUsesAreMem = true; |
| 991 | for (Value::use_iterator I = GEPI->use_begin(), E = GEPI->use_end(); |
| 992 | I != E; ++I) { |
| 993 | Instruction *User = cast<Instruction>(*I); |
| 994 | |
| 995 | // If the GEP is the target of a store, but not the source, then we are ok |
| 996 | // to fold it. |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 997 | if (isa<StoreInst>(User) && |
| 998 | GEPI->getParent() == User->getParent() && |
| 999 | User->getOperand(0) != GEPI && |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 1000 | User->getOperand(1) == GEPI) |
| 1001 | continue; |
| 1002 | |
| 1003 | // If the GEP is the source of a load, then we're always ok to fold it |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 1004 | if (isa<LoadInst>(User) && |
| 1005 | GEPI->getParent() == User->getParent() && |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 1006 | User->getOperand(0) == GEPI) |
| 1007 | continue; |
| 1008 | |
| 1009 | // if we got to this point, than the instruction was not a load or store |
| 1010 | // that we are capable of folding the GEP into. |
| 1011 | AllUsesAreMem = false; |
| 1012 | break; |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 1013 | } |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 1014 | if (AllUsesAreMem) |
| 1015 | return GEPI; |
| 1016 | } |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 1017 | return 0; |
| 1018 | } |
| 1019 | |
| 1020 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1021 | // Return a fixed numbering for setcc instructions which does not depend on the |
| 1022 | // order of the opcodes. |
| 1023 | // |
| 1024 | static unsigned getSetCCNumber(unsigned Opcode) { |
Misha Brukman | e9c6551 | 2004-07-06 15:32:44 +0000 | [diff] [blame] | 1025 | switch (Opcode) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1026 | default: assert(0 && "Unknown setcc instruction!"); |
| 1027 | case Instruction::SetEQ: return 0; |
| 1028 | case Instruction::SetNE: return 1; |
| 1029 | case Instruction::SetLT: return 2; |
| 1030 | case Instruction::SetGE: return 3; |
| 1031 | case Instruction::SetGT: return 4; |
| 1032 | case Instruction::SetLE: return 5; |
| 1033 | } |
| 1034 | } |
| 1035 | |
Misha Brukman | e9c6551 | 2004-07-06 15:32:44 +0000 | [diff] [blame] | 1036 | static unsigned getPPCOpcodeForSetCCNumber(unsigned Opcode) { |
| 1037 | switch (Opcode) { |
| 1038 | default: assert(0 && "Unknown setcc instruction!"); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1039 | case Instruction::SetEQ: return PPC::BEQ; |
| 1040 | case Instruction::SetNE: return PPC::BNE; |
| 1041 | case Instruction::SetLT: return PPC::BLT; |
| 1042 | case Instruction::SetGE: return PPC::BGE; |
| 1043 | case Instruction::SetGT: return PPC::BGT; |
| 1044 | case Instruction::SetLE: return PPC::BLE; |
Misha Brukman | e9c6551 | 2004-07-06 15:32:44 +0000 | [diff] [blame] | 1045 | } |
| 1046 | } |
| 1047 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1048 | /// emitUCOM - emits an unordered FP compare. |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1049 | void PPC32ISel::emitUCOM(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP, |
| 1050 | unsigned LHS, unsigned RHS) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1051 | BuildMI(*MBB, IP, PPC::FCMPU, 2, PPC::CR0).addReg(LHS).addReg(RHS); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1052 | } |
| 1053 | |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1054 | unsigned PPC32ISel::ExtendOrClear(MachineBasicBlock *MBB, |
| 1055 | MachineBasicBlock::iterator IP, |
Nate Begeman | a2de102 | 2004-09-22 04:40:25 +0000 | [diff] [blame] | 1056 | Value *Op0) { |
Nate Begeman | 0e5e5f5 | 2004-08-22 08:10:15 +0000 | [diff] [blame] | 1057 | const Type *CompTy = Op0->getType(); |
| 1058 | unsigned Reg = getReg(Op0, MBB, IP); |
Nate Begeman | b47321b | 2004-08-20 09:56:22 +0000 | [diff] [blame] | 1059 | unsigned Class = getClassB(CompTy); |
| 1060 | |
Nate Begeman | 1b99fd3 | 2004-09-29 03:45:33 +0000 | [diff] [blame] | 1061 | // Since we know that boolean values will be either zero or one, we don't |
| 1062 | // have to extend or clear them. |
| 1063 | if (CompTy == Type::BoolTy) |
| 1064 | return Reg; |
| 1065 | |
Nate Begeman | b47321b | 2004-08-20 09:56:22 +0000 | [diff] [blame] | 1066 | // Before we do a comparison or SetCC, we have to make sure that we truncate |
| 1067 | // the source registers appropriately. |
| 1068 | if (Class == cByte) { |
| 1069 | unsigned TmpReg = makeAnotherReg(CompTy); |
| 1070 | if (CompTy->isSigned()) |
| 1071 | BuildMI(*MBB, IP, PPC::EXTSB, 1, TmpReg).addReg(Reg); |
| 1072 | else |
| 1073 | BuildMI(*MBB, IP, PPC::RLWINM, 4, TmpReg).addReg(Reg).addImm(0) |
| 1074 | .addImm(24).addImm(31); |
| 1075 | Reg = TmpReg; |
| 1076 | } else if (Class == cShort) { |
| 1077 | unsigned TmpReg = makeAnotherReg(CompTy); |
| 1078 | if (CompTy->isSigned()) |
| 1079 | BuildMI(*MBB, IP, PPC::EXTSH, 1, TmpReg).addReg(Reg); |
| 1080 | else |
| 1081 | BuildMI(*MBB, IP, PPC::RLWINM, 4, TmpReg).addReg(Reg).addImm(0) |
| 1082 | .addImm(16).addImm(31); |
| 1083 | Reg = TmpReg; |
| 1084 | } |
| 1085 | return Reg; |
| 1086 | } |
| 1087 | |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1088 | /// EmitComparison - emits a comparison of the two operands, returning the |
| 1089 | /// extended setcc code to use. The result is in CR0. |
| 1090 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1091 | unsigned PPC32ISel::EmitComparison(unsigned OpNum, Value *Op0, Value *Op1, |
| 1092 | MachineBasicBlock *MBB, |
| 1093 | MachineBasicBlock::iterator IP) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1094 | // The arguments are already supposed to be of the same type. |
| 1095 | const Type *CompTy = Op0->getType(); |
| 1096 | unsigned Class = getClassB(CompTy); |
Nate Begeman | a2de102 | 2004-09-22 04:40:25 +0000 | [diff] [blame] | 1097 | unsigned Op0r = ExtendOrClear(MBB, IP, Op0); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 1098 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1099 | // Use crand for lt, gt and crandc for le, ge |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1100 | unsigned CROpcode = (OpNum == 2 || OpNum == 4) ? PPC::CRAND : PPC::CRANDC; |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1101 | // ? cr1[lt] : cr1[gt] |
| 1102 | unsigned CR1field = (OpNum == 2 || OpNum == 3) ? 4 : 5; |
| 1103 | // ? cr0[lt] : cr0[gt] |
| 1104 | unsigned CR0field = (OpNum == 2 || OpNum == 5) ? 0 : 1; |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1105 | unsigned Opcode = CompTy->isSigned() ? PPC::CMPW : PPC::CMPLW; |
| 1106 | unsigned OpcodeImm = CompTy->isSigned() ? PPC::CMPWI : PPC::CMPLWI; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1107 | |
| 1108 | // Special case handling of: cmp R, i |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 1109 | if (ConstantInt *CI = dyn_cast<ConstantInt>(Op1)) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1110 | if (Class == cByte || Class == cShort || Class == cInt) { |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1111 | unsigned Op1v = CI->getRawValue() & 0xFFFF; |
Nate Begeman | 43d64ea | 2004-08-15 06:42:28 +0000 | [diff] [blame] | 1112 | unsigned OpClass = (CompTy->isSigned()) ? 0 : 2; |
| 1113 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1114 | // Treat compare like ADDI for the purposes of immediate suitability |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 1115 | if (canUseAsImmediateForOpcode(CI, OpClass, false)) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1116 | BuildMI(*MBB, IP, OpcodeImm, 2, PPC::CR0).addReg(Op0r).addSImm(Op1v); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1117 | } else { |
| 1118 | unsigned Op1r = getReg(Op1, MBB, IP); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1119 | BuildMI(*MBB, IP, Opcode, 2, PPC::CR0).addReg(Op0r).addReg(Op1r); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1120 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1121 | return OpNum; |
| 1122 | } else { |
| 1123 | assert(Class == cLong && "Unknown integer class!"); |
| 1124 | unsigned LowCst = CI->getRawValue(); |
| 1125 | unsigned HiCst = CI->getRawValue() >> 32; |
| 1126 | if (OpNum < 2) { // seteq, setne |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1127 | unsigned LoLow = makeAnotherReg(Type::IntTy); |
| 1128 | unsigned LoTmp = makeAnotherReg(Type::IntTy); |
| 1129 | unsigned HiLow = makeAnotherReg(Type::IntTy); |
| 1130 | unsigned HiTmp = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1131 | unsigned FinalTmp = makeAnotherReg(Type::IntTy); |
Misha Brukman | 4722544 | 2004-07-23 22:35:49 +0000 | [diff] [blame] | 1132 | |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1133 | BuildMI(*MBB, IP, PPC::XORI, 2, LoLow).addReg(Op0r+1) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1134 | .addImm(LowCst & 0xFFFF); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1135 | BuildMI(*MBB, IP, PPC::XORIS, 2, LoTmp).addReg(LoLow) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1136 | .addImm(LowCst >> 16); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1137 | BuildMI(*MBB, IP, PPC::XORI, 2, HiLow).addReg(Op0r) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1138 | .addImm(HiCst & 0xFFFF); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1139 | BuildMI(*MBB, IP, PPC::XORIS, 2, HiTmp).addReg(HiLow) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1140 | .addImm(HiCst >> 16); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1141 | BuildMI(*MBB, IP, PPC::ORo, 2, FinalTmp).addReg(LoTmp).addReg(HiTmp); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1142 | return OpNum; |
| 1143 | } else { |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1144 | unsigned ConstReg = makeAnotherReg(CompTy); |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1145 | copyConstantToRegister(MBB, IP, CI, ConstReg); |
Misha Brukman | 4722544 | 2004-07-23 22:35:49 +0000 | [diff] [blame] | 1146 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1147 | // cr0 = r3 ccOpcode r5 or (r3 == r5 AND r4 ccOpcode r6) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1148 | BuildMI(*MBB, IP, Opcode, 2, PPC::CR0).addReg(Op0r) |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1149 | .addReg(ConstReg); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1150 | BuildMI(*MBB, IP, Opcode, 2, PPC::CR1).addReg(Op0r+1) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1151 | .addReg(ConstReg+1); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1152 | BuildMI(*MBB, IP, PPC::CRAND, 3).addImm(2).addImm(2).addImm(CR1field); |
| 1153 | BuildMI(*MBB, IP, PPC::CROR, 3).addImm(CR0field).addImm(CR0field) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1154 | .addImm(2); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1155 | return OpNum; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1156 | } |
| 1157 | } |
| 1158 | } |
| 1159 | |
| 1160 | unsigned Op1r = getReg(Op1, MBB, IP); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1161 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1162 | switch (Class) { |
| 1163 | default: assert(0 && "Unknown type class!"); |
| 1164 | case cByte: |
| 1165 | case cShort: |
| 1166 | case cInt: |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1167 | BuildMI(*MBB, IP, Opcode, 2, PPC::CR0).addReg(Op0r).addReg(Op1r); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1168 | break; |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 1169 | |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1170 | case cFP32: |
| 1171 | case cFP64: |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1172 | emitUCOM(MBB, IP, Op0r, Op1r); |
| 1173 | break; |
| 1174 | |
| 1175 | case cLong: |
| 1176 | if (OpNum < 2) { // seteq, setne |
| 1177 | unsigned LoTmp = makeAnotherReg(Type::IntTy); |
| 1178 | unsigned HiTmp = makeAnotherReg(Type::IntTy); |
| 1179 | unsigned FinalTmp = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1180 | BuildMI(*MBB, IP, PPC::XOR, 2, HiTmp).addReg(Op0r).addReg(Op1r); |
| 1181 | BuildMI(*MBB, IP, PPC::XOR, 2, LoTmp).addReg(Op0r+1).addReg(Op1r+1); |
| 1182 | BuildMI(*MBB, IP, PPC::ORo, 2, FinalTmp).addReg(LoTmp).addReg(HiTmp); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1183 | break; // Allow the sete or setne to be generated from flags set by OR |
| 1184 | } else { |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1185 | unsigned TmpReg1 = makeAnotherReg(Type::IntTy); |
| 1186 | unsigned TmpReg2 = makeAnotherReg(Type::IntTy); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1187 | |
| 1188 | // cr0 = r3 ccOpcode r5 or (r3 == r5 AND r4 ccOpcode r6) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1189 | BuildMI(*MBB, IP, Opcode, 2, PPC::CR0).addReg(Op0r).addReg(Op1r); |
| 1190 | BuildMI(*MBB, IP, Opcode, 2, PPC::CR1).addReg(Op0r+1).addReg(Op1r+1); |
| 1191 | BuildMI(*MBB, IP, PPC::CRAND, 3).addImm(2).addImm(2).addImm(CR1field); |
| 1192 | BuildMI(*MBB, IP, PPC::CROR, 3).addImm(CR0field).addImm(CR0field) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1193 | .addImm(2); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1194 | return OpNum; |
| 1195 | } |
| 1196 | } |
| 1197 | return OpNum; |
| 1198 | } |
| 1199 | |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 1200 | /// visitSetCondInst - emit code to calculate the condition via |
| 1201 | /// EmitComparison(), and possibly store a 0 or 1 to a register as a result |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1202 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1203 | void PPC32ISel::visitSetCondInst(SetCondInst &I) { |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 1204 | if (canFoldSetCCIntoBranchOrSelect(&I)) |
Misha Brukman | e9c6551 | 2004-07-06 15:32:44 +0000 | [diff] [blame] | 1205 | return; |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1206 | |
Nate Begeman | a2de102 | 2004-09-22 04:40:25 +0000 | [diff] [blame] | 1207 | MachineBasicBlock::iterator MI = BB->end(); |
| 1208 | Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); |
| 1209 | const Type *Ty = Op0->getType(); |
| 1210 | unsigned Class = getClassB(Ty); |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1211 | unsigned Opcode = I.getOpcode(); |
Nate Begeman | a2de102 | 2004-09-22 04:40:25 +0000 | [diff] [blame] | 1212 | unsigned OpNum = getSetCCNumber(Opcode); |
| 1213 | unsigned DestReg = getReg(I); |
| 1214 | |
| 1215 | // If the comparison type is byte, short, or int, then we can emit a |
| 1216 | // branchless version of the SetCC that puts 0 (false) or 1 (true) in the |
| 1217 | // destination register. |
| 1218 | if (Class <= cInt) { |
| 1219 | ConstantInt *CI = dyn_cast<ConstantInt>(Op1); |
| 1220 | |
| 1221 | if (CI && CI->getRawValue() == 0) { |
Nate Begeman | a2de102 | 2004-09-22 04:40:25 +0000 | [diff] [blame] | 1222 | unsigned Op0Reg = ExtendOrClear(BB, MI, Op0); |
| 1223 | |
| 1224 | // comparisons against constant zero and negative one often have shorter |
| 1225 | // and/or faster sequences than the set-and-branch general case, handled |
| 1226 | // below. |
| 1227 | switch(OpNum) { |
| 1228 | case 0: { // eq0 |
| 1229 | unsigned TempReg = makeAnotherReg(Type::IntTy); |
| 1230 | BuildMI(*BB, MI, PPC::CNTLZW, 1, TempReg).addReg(Op0Reg); |
| 1231 | BuildMI(*BB, MI, PPC::RLWINM, 4, DestReg).addReg(TempReg).addImm(27) |
| 1232 | .addImm(5).addImm(31); |
| 1233 | break; |
| 1234 | } |
| 1235 | case 1: { // ne0 |
| 1236 | unsigned TempReg = makeAnotherReg(Type::IntTy); |
| 1237 | BuildMI(*BB, MI, PPC::ADDIC, 2, TempReg).addReg(Op0Reg).addSImm(-1); |
| 1238 | BuildMI(*BB, MI, PPC::SUBFE, 2, DestReg).addReg(TempReg).addReg(Op0Reg); |
| 1239 | break; |
| 1240 | } |
| 1241 | case 2: { // lt0, always false if unsigned |
| 1242 | if (Ty->isSigned()) |
| 1243 | BuildMI(*BB, MI, PPC::RLWINM, 4, DestReg).addReg(Op0Reg).addImm(1) |
| 1244 | .addImm(31).addImm(31); |
| 1245 | else |
| 1246 | BuildMI(*BB, MI, PPC::LI, 1, DestReg).addSImm(0); |
| 1247 | break; |
| 1248 | } |
| 1249 | case 3: { // ge0, always true if unsigned |
| 1250 | if (Ty->isSigned()) { |
| 1251 | unsigned TempReg = makeAnotherReg(Type::IntTy); |
| 1252 | BuildMI(*BB, MI, PPC::RLWINM, 4, TempReg).addReg(Op0Reg).addImm(1) |
| 1253 | .addImm(31).addImm(31); |
| 1254 | BuildMI(*BB, MI, PPC::XORI, 2, DestReg).addReg(TempReg).addImm(1); |
| 1255 | } else { |
| 1256 | BuildMI(*BB, MI, PPC::LI, 1, DestReg).addSImm(1); |
| 1257 | } |
| 1258 | break; |
| 1259 | } |
| 1260 | case 4: { // gt0, equivalent to ne0 if unsigned |
| 1261 | unsigned Temp1 = makeAnotherReg(Type::IntTy); |
| 1262 | unsigned Temp2 = makeAnotherReg(Type::IntTy); |
| 1263 | if (Ty->isSigned()) { |
| 1264 | BuildMI(*BB, MI, PPC::NEG, 2, Temp1).addReg(Op0Reg); |
| 1265 | BuildMI(*BB, MI, PPC::ANDC, 2, Temp2).addReg(Temp1).addReg(Op0Reg); |
| 1266 | BuildMI(*BB, MI, PPC::RLWINM, 4, DestReg).addReg(Temp2).addImm(1) |
| 1267 | .addImm(31).addImm(31); |
| 1268 | } else { |
| 1269 | BuildMI(*BB, MI, PPC::ADDIC, 2, Temp1).addReg(Op0Reg).addSImm(-1); |
| 1270 | BuildMI(*BB, MI, PPC::SUBFE, 2, DestReg).addReg(Temp1).addReg(Op0Reg); |
| 1271 | } |
| 1272 | break; |
| 1273 | } |
| 1274 | case 5: { // le0, equivalent to eq0 if unsigned |
| 1275 | unsigned Temp1 = makeAnotherReg(Type::IntTy); |
| 1276 | unsigned Temp2 = makeAnotherReg(Type::IntTy); |
| 1277 | if (Ty->isSigned()) { |
| 1278 | BuildMI(*BB, MI, PPC::NEG, 2, Temp1).addReg(Op0Reg); |
| 1279 | BuildMI(*BB, MI, PPC::ORC, 2, Temp2).addReg(Op0Reg).addReg(Temp1); |
| 1280 | BuildMI(*BB, MI, PPC::RLWINM, 4, DestReg).addReg(Temp2).addImm(1) |
| 1281 | .addImm(31).addImm(31); |
| 1282 | } else { |
| 1283 | BuildMI(*BB, MI, PPC::CNTLZW, 1, Temp1).addReg(Op0Reg); |
| 1284 | BuildMI(*BB, MI, PPC::RLWINM, 4, DestReg).addReg(Temp1).addImm(27) |
| 1285 | .addImm(5).addImm(31); |
| 1286 | } |
| 1287 | break; |
| 1288 | } |
| 1289 | } // switch |
| 1290 | return; |
| 1291 | } |
| 1292 | } |
Nate Begeman | b47321b | 2004-08-20 09:56:22 +0000 | [diff] [blame] | 1293 | unsigned PPCOpcode = getPPCOpcodeForSetCCNumber(Opcode); |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1294 | |
| 1295 | // Create an iterator with which to insert the MBB for copying the false value |
| 1296 | // and the MBB to hold the PHI instruction for this SetCC. |
Misha Brukman | 425ff24 | 2004-07-01 21:34:10 +0000 | [diff] [blame] | 1297 | MachineBasicBlock *thisMBB = BB; |
| 1298 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1299 | ilist<MachineBasicBlock>::iterator It = BB; |
| 1300 | ++It; |
| 1301 | |
Misha Brukman | 425ff24 | 2004-07-01 21:34:10 +0000 | [diff] [blame] | 1302 | // thisMBB: |
| 1303 | // ... |
| 1304 | // cmpTY cr0, r1, r2 |
Misha Brukman | 425ff24 | 2004-07-01 21:34:10 +0000 | [diff] [blame] | 1305 | // %TrueValue = li 1 |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1306 | // bCC sinkMBB |
Nate Begeman | a2de102 | 2004-09-22 04:40:25 +0000 | [diff] [blame] | 1307 | EmitComparison(Opcode, Op0, Op1, BB, BB->end()); |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 1308 | unsigned TrueValue = makeAnotherReg(I.getType()); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1309 | BuildMI(BB, PPC::LI, 1, TrueValue).addSImm(1); |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1310 | MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB); |
| 1311 | MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB); |
| 1312 | BuildMI(BB, PPCOpcode, 2).addReg(PPC::CR0).addMBB(sinkMBB); |
| 1313 | F->getBasicBlockList().insert(It, copy0MBB); |
| 1314 | F->getBasicBlockList().insert(It, sinkMBB); |
Misha Brukman | 425ff24 | 2004-07-01 21:34:10 +0000 | [diff] [blame] | 1315 | // Update machine-CFG edges |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1316 | BB->addSuccessor(copy0MBB); |
Misha Brukman | 425ff24 | 2004-07-01 21:34:10 +0000 | [diff] [blame] | 1317 | BB->addSuccessor(sinkMBB); |
| 1318 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1319 | // copy0MBB: |
| 1320 | // %FalseValue = li 0 |
| 1321 | // fallthrough |
| 1322 | BB = copy0MBB; |
| 1323 | unsigned FalseValue = makeAnotherReg(I.getType()); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1324 | BuildMI(BB, PPC::LI, 1, FalseValue).addSImm(0); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1325 | // Update machine-CFG edges |
| 1326 | BB->addSuccessor(sinkMBB); |
| 1327 | |
Misha Brukman | 425ff24 | 2004-07-01 21:34:10 +0000 | [diff] [blame] | 1328 | // sinkMBB: |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1329 | // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ] |
Misha Brukman | 425ff24 | 2004-07-01 21:34:10 +0000 | [diff] [blame] | 1330 | // ... |
| 1331 | BB = sinkMBB; |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1332 | BuildMI(BB, PPC::PHI, 4, DestReg).addReg(FalseValue) |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1333 | .addMBB(copy0MBB).addReg(TrueValue).addMBB(thisMBB); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1334 | } |
| 1335 | |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1336 | void PPC32ISel::visitSelectInst(SelectInst &SI) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1337 | unsigned DestReg = getReg(SI); |
| 1338 | MachineBasicBlock::iterator MII = BB->end(); |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1339 | emitSelectOperation(BB, MII, SI.getCondition(), SI.getTrueValue(), |
| 1340 | SI.getFalseValue(), DestReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1341 | } |
| 1342 | |
| 1343 | /// emitSelect - Common code shared between visitSelectInst and the constant |
| 1344 | /// expression support. |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1345 | void PPC32ISel::emitSelectOperation(MachineBasicBlock *MBB, |
| 1346 | MachineBasicBlock::iterator IP, |
| 1347 | Value *Cond, Value *TrueVal, |
| 1348 | Value *FalseVal, unsigned DestReg) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1349 | unsigned SelectClass = getClassB(TrueVal->getType()); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1350 | unsigned Opcode; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1351 | |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1352 | // See if we can fold the setcc into the select instruction, or if we have |
| 1353 | // to get the register of the Cond value |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1354 | if (SetCondInst *SCI = canFoldSetCCIntoBranchOrSelect(Cond)) { |
| 1355 | // We successfully folded the setcc into the select instruction. |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1356 | unsigned OpNum = getSetCCNumber(SCI->getOpcode()); |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 1357 | if (OpNum >= 2 && OpNum <= 5) { |
| 1358 | unsigned SetCondClass = getClassB(SCI->getOperand(0)->getType()); |
| 1359 | if ((SetCondClass == cFP32 || SetCondClass == cFP64) && |
| 1360 | (SelectClass == cFP32 || SelectClass == cFP64)) { |
| 1361 | unsigned CondReg = getReg(SCI->getOperand(0), MBB, IP); |
| 1362 | unsigned TrueReg = getReg(TrueVal, MBB, IP); |
| 1363 | unsigned FalseReg = getReg(FalseVal, MBB, IP); |
| 1364 | // if the comparison of the floating point value used to for the select |
| 1365 | // is against 0, then we can emit an fsel without subtraction. |
| 1366 | ConstantFP *Op1C = dyn_cast<ConstantFP>(SCI->getOperand(1)); |
| 1367 | if (Op1C && (Op1C->isExactlyValue(-0.0) || Op1C->isExactlyValue(0.0))) { |
| 1368 | switch(OpNum) { |
| 1369 | case 2: // LT |
| 1370 | BuildMI(*MBB, IP, PPC::FSEL, 3, DestReg).addReg(CondReg) |
| 1371 | .addReg(FalseReg).addReg(TrueReg); |
| 1372 | break; |
| 1373 | case 3: // GE == !LT |
| 1374 | BuildMI(*MBB, IP, PPC::FSEL, 3, DestReg).addReg(CondReg) |
| 1375 | .addReg(TrueReg).addReg(FalseReg); |
| 1376 | break; |
| 1377 | case 4: { // GT |
| 1378 | unsigned NegatedReg = makeAnotherReg(SCI->getOperand(0)->getType()); |
| 1379 | BuildMI(*MBB, IP, PPC::FNEG, 1, NegatedReg).addReg(CondReg); |
| 1380 | BuildMI(*MBB, IP, PPC::FSEL, 3, DestReg).addReg(NegatedReg) |
| 1381 | .addReg(FalseReg).addReg(TrueReg); |
| 1382 | } |
| 1383 | break; |
| 1384 | case 5: { // LE == !GT |
| 1385 | unsigned NegatedReg = makeAnotherReg(SCI->getOperand(0)->getType()); |
| 1386 | BuildMI(*MBB, IP, PPC::FNEG, 1, NegatedReg).addReg(CondReg); |
| 1387 | BuildMI(*MBB, IP, PPC::FSEL, 3, DestReg).addReg(NegatedReg) |
| 1388 | .addReg(TrueReg).addReg(FalseReg); |
| 1389 | } |
| 1390 | break; |
| 1391 | default: |
| 1392 | assert(0 && "Invalid SetCC opcode to fsel"); |
| 1393 | abort(); |
| 1394 | break; |
| 1395 | } |
| 1396 | } else { |
| 1397 | unsigned OtherCondReg = getReg(SCI->getOperand(1), MBB, IP); |
| 1398 | unsigned SelectReg = makeAnotherReg(SCI->getOperand(0)->getType()); |
| 1399 | switch(OpNum) { |
| 1400 | case 2: // LT |
| 1401 | BuildMI(*MBB, IP, PPC::FSUB, 2, SelectReg).addReg(CondReg) |
| 1402 | .addReg(OtherCondReg); |
| 1403 | BuildMI(*MBB, IP, PPC::FSEL, 3, DestReg).addReg(SelectReg) |
| 1404 | .addReg(FalseReg).addReg(TrueReg); |
| 1405 | break; |
| 1406 | case 3: // GE == !LT |
| 1407 | BuildMI(*MBB, IP, PPC::FSUB, 2, SelectReg).addReg(CondReg) |
| 1408 | .addReg(OtherCondReg); |
| 1409 | BuildMI(*MBB, IP, PPC::FSEL, 3, DestReg).addReg(SelectReg) |
| 1410 | .addReg(TrueReg).addReg(FalseReg); |
| 1411 | break; |
| 1412 | case 4: // GT |
| 1413 | BuildMI(*MBB, IP, PPC::FSUB, 2, SelectReg).addReg(OtherCondReg) |
| 1414 | .addReg(CondReg); |
| 1415 | BuildMI(*MBB, IP, PPC::FSEL, 3, DestReg).addReg(SelectReg) |
| 1416 | .addReg(FalseReg).addReg(TrueReg); |
| 1417 | break; |
| 1418 | case 5: // LE == !GT |
| 1419 | BuildMI(*MBB, IP, PPC::FSUB, 2, SelectReg).addReg(OtherCondReg) |
| 1420 | .addReg(CondReg); |
| 1421 | BuildMI(*MBB, IP, PPC::FSEL, 3, DestReg).addReg(SelectReg) |
| 1422 | .addReg(TrueReg).addReg(FalseReg); |
| 1423 | break; |
| 1424 | default: |
| 1425 | assert(0 && "Invalid SetCC opcode to fsel"); |
| 1426 | abort(); |
| 1427 | break; |
| 1428 | } |
| 1429 | } |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 1430 | return; |
| 1431 | } |
| 1432 | } |
Misha Brukman | 4722544 | 2004-07-23 22:35:49 +0000 | [diff] [blame] | 1433 | OpNum = EmitComparison(OpNum, SCI->getOperand(0),SCI->getOperand(1),MBB,IP); |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1434 | Opcode = getPPCOpcodeForSetCCNumber(SCI->getOpcode()); |
| 1435 | } else { |
| 1436 | unsigned CondReg = getReg(Cond, MBB, IP); |
Nate Begeman | ed42853 | 2004-09-04 05:00:00 +0000 | [diff] [blame] | 1437 | BuildMI(*MBB, IP, PPC::CMPWI, 2, PPC::CR0).addReg(CondReg).addSImm(0); |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1438 | Opcode = getPPCOpcodeForSetCCNumber(Instruction::SetNE); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1439 | } |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1440 | |
| 1441 | MachineBasicBlock *thisMBB = BB; |
| 1442 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1443 | ilist<MachineBasicBlock>::iterator It = BB; |
| 1444 | ++It; |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1445 | |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1446 | // thisMBB: |
| 1447 | // ... |
Chris Lattner | 6dec0b0 | 2005-01-01 16:10:12 +0000 | [diff] [blame] | 1448 | // TrueVal = ... |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1449 | // cmpTY cr0, r1, r2 |
Nate Begeman | 1f49e86 | 2004-09-29 05:00:31 +0000 | [diff] [blame] | 1450 | // bCC copy1MBB |
| 1451 | // fallthrough --> copy0MBB |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1452 | MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1453 | MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB); |
Chris Lattner | 35e5c7c | 2005-01-02 23:07:31 +0000 | [diff] [blame] | 1454 | unsigned TrueValue = getReg(TrueVal); |
Chris Lattner | 6dec0b0 | 2005-01-01 16:10:12 +0000 | [diff] [blame] | 1455 | BuildMI(BB, Opcode, 2).addReg(PPC::CR0).addMBB(sinkMBB); |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1456 | F->getBasicBlockList().insert(It, copy0MBB); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1457 | F->getBasicBlockList().insert(It, sinkMBB); |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1458 | // Update machine-CFG edges |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1459 | BB->addSuccessor(copy0MBB); |
Chris Lattner | 6dec0b0 | 2005-01-01 16:10:12 +0000 | [diff] [blame] | 1460 | BB->addSuccessor(sinkMBB); |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1461 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1462 | // copy0MBB: |
| 1463 | // %FalseValue = ... |
Chris Lattner | 6dec0b0 | 2005-01-01 16:10:12 +0000 | [diff] [blame] | 1464 | // # fallthrough to sinkMBB |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1465 | BB = copy0MBB; |
Chris Lattner | 35e5c7c | 2005-01-02 23:07:31 +0000 | [diff] [blame] | 1466 | unsigned FalseValue = getReg(FalseVal); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1467 | // Update machine-CFG edges |
| 1468 | BB->addSuccessor(sinkMBB); |
| 1469 | |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1470 | // sinkMBB: |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1471 | // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ] |
Misha Brukman | bebde75 | 2004-07-16 21:06:24 +0000 | [diff] [blame] | 1472 | // ... |
| 1473 | BB = sinkMBB; |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1474 | BuildMI(BB, PPC::PHI, 4, DestReg).addReg(FalseValue) |
Chris Lattner | 6dec0b0 | 2005-01-01 16:10:12 +0000 | [diff] [blame] | 1475 | .addMBB(copy0MBB).addReg(TrueValue).addMBB(thisMBB); |
Nate Begeman | a96c4af | 2004-08-21 20:42:14 +0000 | [diff] [blame] | 1476 | |
Chris Lattner | 6dec0b0 | 2005-01-01 16:10:12 +0000 | [diff] [blame] | 1477 | // For a register pair representing a long value, define the top part. |
Nate Begeman | 8d963e6 | 2004-08-11 03:30:55 +0000 | [diff] [blame] | 1478 | if (getClassB(TrueVal->getType()) == cLong) |
Chris Lattner | 6dec0b0 | 2005-01-01 16:10:12 +0000 | [diff] [blame] | 1479 | BuildMI(BB, PPC::PHI, 4, DestReg+1).addReg(FalseValue+1) |
| 1480 | .addMBB(copy0MBB).addReg(TrueValue+1).addMBB(thisMBB); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1481 | } |
| 1482 | |
| 1483 | |
| 1484 | |
| 1485 | /// promote32 - Emit instructions to turn a narrow operand into a 32-bit-wide |
| 1486 | /// operand, in the specified target register. |
| 1487 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1488 | void PPC32ISel::promote32(unsigned targetReg, const ValueRecord &VR) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1489 | bool isUnsigned = VR.Ty->isUnsigned() || VR.Ty == Type::BoolTy; |
| 1490 | |
| 1491 | Value *Val = VR.Val; |
| 1492 | const Type *Ty = VR.Ty; |
| 1493 | if (Val) { |
| 1494 | if (Constant *C = dyn_cast<Constant>(Val)) { |
| 1495 | Val = ConstantExpr::getCast(C, Type::IntTy); |
Chris Lattner | 74a806c | 2004-08-11 07:34:50 +0000 | [diff] [blame] | 1496 | if (isa<ConstantExpr>(Val)) // Could not fold |
| 1497 | Val = C; |
| 1498 | else |
| 1499 | Ty = Type::IntTy; // Folded! |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1500 | } |
| 1501 | |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1502 | // If this is a simple constant, just emit a load directly to avoid the copy |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1503 | if (ConstantInt *CI = dyn_cast<ConstantInt>(Val)) { |
Nate Begeman | 8531f6f | 2004-11-19 02:06:40 +0000 | [diff] [blame] | 1504 | copyConstantToRegister(BB, BB->end(), CI, targetReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1505 | return; |
| 1506 | } |
| 1507 | } |
| 1508 | |
| 1509 | // Make sure we have the register number for this value... |
| 1510 | unsigned Reg = Val ? getReg(Val) : VR.Reg; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1511 | switch (getClassB(Ty)) { |
| 1512 | case cByte: |
| 1513 | // Extend value into target register (8->32) |
Nate Begeman | 1b99fd3 | 2004-09-29 03:45:33 +0000 | [diff] [blame] | 1514 | if (Ty == Type::BoolTy) |
| 1515 | BuildMI(BB, PPC::OR, 2, targetReg).addReg(Reg).addReg(Reg); |
| 1516 | else if (isUnsigned) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1517 | BuildMI(BB, PPC::RLWINM, 4, targetReg).addReg(Reg).addZImm(0) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1518 | .addZImm(24).addZImm(31); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1519 | else |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1520 | BuildMI(BB, PPC::EXTSB, 1, targetReg).addReg(Reg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1521 | break; |
| 1522 | case cShort: |
| 1523 | // Extend value into target register (16->32) |
| 1524 | if (isUnsigned) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1525 | BuildMI(BB, PPC::RLWINM, 4, targetReg).addReg(Reg).addZImm(0) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1526 | .addZImm(16).addZImm(31); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1527 | else |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1528 | BuildMI(BB, PPC::EXTSH, 1, targetReg).addReg(Reg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1529 | break; |
| 1530 | case cInt: |
| 1531 | // Move value into target register (32->32) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1532 | BuildMI(BB, PPC::OR, 2, targetReg).addReg(Reg).addReg(Reg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1533 | break; |
| 1534 | default: |
| 1535 | assert(0 && "Unpromotable operand class in promote32"); |
| 1536 | } |
| 1537 | } |
| 1538 | |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1539 | /// visitReturnInst - implemented with BLR |
| 1540 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1541 | void PPC32ISel::visitReturnInst(ReturnInst &I) { |
Misha Brukman | d47bbf7 | 2004-06-25 19:04:27 +0000 | [diff] [blame] | 1542 | // Only do the processing if this is a non-void return |
| 1543 | if (I.getNumOperands() > 0) { |
| 1544 | Value *RetVal = I.getOperand(0); |
| 1545 | switch (getClassB(RetVal->getType())) { |
| 1546 | case cByte: // integral return values: extend or move into r3 and return |
| 1547 | case cShort: |
| 1548 | case cInt: |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1549 | promote32(PPC::R3, ValueRecord(RetVal)); |
Misha Brukman | d47bbf7 | 2004-06-25 19:04:27 +0000 | [diff] [blame] | 1550 | break; |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1551 | case cFP32: |
| 1552 | case cFP64: { // Floats & Doubles: Return in f1 |
Misha Brukman | d47bbf7 | 2004-06-25 19:04:27 +0000 | [diff] [blame] | 1553 | unsigned RetReg = getReg(RetVal); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1554 | BuildMI(BB, PPC::FMR, 1, PPC::F1).addReg(RetReg); |
Misha Brukman | d47bbf7 | 2004-06-25 19:04:27 +0000 | [diff] [blame] | 1555 | break; |
| 1556 | } |
| 1557 | case cLong: { |
| 1558 | unsigned RetReg = getReg(RetVal); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1559 | BuildMI(BB, PPC::OR, 2, PPC::R3).addReg(RetReg).addReg(RetReg); |
| 1560 | BuildMI(BB, PPC::OR, 2, PPC::R4).addReg(RetReg+1).addReg(RetReg+1); |
Misha Brukman | d47bbf7 | 2004-06-25 19:04:27 +0000 | [diff] [blame] | 1561 | break; |
| 1562 | } |
| 1563 | default: |
| 1564 | visitInstruction(I); |
| 1565 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1566 | } |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1567 | BuildMI(BB, PPC::BLR, 1).addImm(0); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1568 | } |
| 1569 | |
| 1570 | // getBlockAfter - Return the basic block which occurs lexically after the |
| 1571 | // specified one. |
| 1572 | static inline BasicBlock *getBlockAfter(BasicBlock *BB) { |
| 1573 | Function::iterator I = BB; ++I; // Get iterator to next block |
| 1574 | return I != BB->getParent()->end() ? &*I : 0; |
| 1575 | } |
| 1576 | |
| 1577 | /// visitBranchInst - Handle conditional and unconditional branches here. Note |
| 1578 | /// that since code layout is frozen at this point, that if we are trying to |
| 1579 | /// jump to a block that is the immediate successor of the current block, we can |
| 1580 | /// just make a fall-through (but we don't currently). |
| 1581 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1582 | void PPC32ISel::visitBranchInst(BranchInst &BI) { |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1583 | // Update machine-CFG edges |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 1584 | BB->addSuccessor(MBBMap[BI.getSuccessor(0)]); |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1585 | if (BI.isConditional()) |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 1586 | BB->addSuccessor(MBBMap[BI.getSuccessor(1)]); |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1587 | |
| 1588 | BasicBlock *NextBB = getBlockAfter(BI.getParent()); // BB after current one |
Misha Brukman | e9c6551 | 2004-07-06 15:32:44 +0000 | [diff] [blame] | 1589 | |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1590 | if (!BI.isConditional()) { // Unconditional branch? |
Misha Brukman | e9c6551 | 2004-07-06 15:32:44 +0000 | [diff] [blame] | 1591 | if (BI.getSuccessor(0) != NextBB) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1592 | BuildMI(BB, PPC::B, 1).addMBB(MBBMap[BI.getSuccessor(0)]); |
Misha Brukman | fadb82f | 2004-06-24 22:00:15 +0000 | [diff] [blame] | 1593 | return; |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1594 | } |
| 1595 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1596 | // See if we can fold the setcc into the branch itself... |
| 1597 | SetCondInst *SCI = canFoldSetCCIntoBranchOrSelect(BI.getCondition()); |
| 1598 | if (SCI == 0) { |
| 1599 | // Nope, cannot fold setcc into this branch. Emit a branch on a condition |
| 1600 | // computed some other way... |
| 1601 | unsigned condReg = getReg(BI.getCondition()); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1602 | BuildMI(BB, PPC::CMPLI, 3, PPC::CR0).addImm(0).addReg(condReg) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 1603 | .addImm(0); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1604 | if (BI.getSuccessor(1) == NextBB) { |
| 1605 | if (BI.getSuccessor(0) != NextBB) |
Nate Begeman | 439b444 | 2005-04-05 04:22:58 +0000 | [diff] [blame] | 1606 | BuildMI(BB, PPC::COND_BRANCH, 4).addReg(PPC::CR0).addImm(PPC::BNE) |
Misha Brukman | fa20a6d | 2004-07-27 18:35:23 +0000 | [diff] [blame] | 1607 | .addMBB(MBBMap[BI.getSuccessor(0)]) |
| 1608 | .addMBB(MBBMap[BI.getSuccessor(1)]); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1609 | } else { |
Nate Begeman | 439b444 | 2005-04-05 04:22:58 +0000 | [diff] [blame] | 1610 | BuildMI(BB, PPC::COND_BRANCH, 4).addReg(PPC::CR0).addImm(PPC::BEQ) |
Misha Brukman | fa20a6d | 2004-07-27 18:35:23 +0000 | [diff] [blame] | 1611 | .addMBB(MBBMap[BI.getSuccessor(1)]) |
| 1612 | .addMBB(MBBMap[BI.getSuccessor(0)]); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1613 | if (BI.getSuccessor(0) != NextBB) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1614 | BuildMI(BB, PPC::B, 1).addMBB(MBBMap[BI.getSuccessor(0)]); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1615 | } |
| 1616 | return; |
| 1617 | } |
| 1618 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1619 | unsigned OpNum = getSetCCNumber(SCI->getOpcode()); |
Misha Brukman | e9c6551 | 2004-07-06 15:32:44 +0000 | [diff] [blame] | 1620 | unsigned Opcode = getPPCOpcodeForSetCCNumber(SCI->getOpcode()); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1621 | MachineBasicBlock::iterator MII = BB->end(); |
| 1622 | OpNum = EmitComparison(OpNum, SCI->getOperand(0), SCI->getOperand(1), BB,MII); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1623 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1624 | if (BI.getSuccessor(0) != NextBB) { |
Nate Begeman | 439b444 | 2005-04-05 04:22:58 +0000 | [diff] [blame] | 1625 | BuildMI(BB, PPC::COND_BRANCH, 4).addReg(PPC::CR0).addImm(Opcode) |
Misha Brukman | fa20a6d | 2004-07-27 18:35:23 +0000 | [diff] [blame] | 1626 | .addMBB(MBBMap[BI.getSuccessor(0)]) |
| 1627 | .addMBB(MBBMap[BI.getSuccessor(1)]); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1628 | if (BI.getSuccessor(1) != NextBB) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1629 | BuildMI(BB, PPC::B, 1).addMBB(MBBMap[BI.getSuccessor(1)]); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1630 | } else { |
| 1631 | // Change to the inverse condition... |
| 1632 | if (BI.getSuccessor(1) != NextBB) { |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 1633 | Opcode = PPC32InstrInfo::invertPPCBranchOpcode(Opcode); |
Nate Begeman | 439b444 | 2005-04-05 04:22:58 +0000 | [diff] [blame] | 1634 | BuildMI(BB, PPC::COND_BRANCH, 4).addReg(PPC::CR0).addImm(Opcode) |
Misha Brukman | fa20a6d | 2004-07-27 18:35:23 +0000 | [diff] [blame] | 1635 | .addMBB(MBBMap[BI.getSuccessor(1)]) |
| 1636 | .addMBB(MBBMap[BI.getSuccessor(0)]); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1637 | } |
| 1638 | } |
| 1639 | } |
| 1640 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1641 | /// doCall - This emits an abstract call instruction, setting up the arguments |
| 1642 | /// and the return value as appropriate. For the actual function call itself, |
| 1643 | /// it inserts the specified CallMI instruction into the stream. |
| 1644 | /// |
| 1645 | /// FIXME: See Documentation at the following URL for "correct" behavior |
Nate Begeman | c13a7f0 | 2005-03-26 01:28:05 +0000 | [diff] [blame] | 1646 | /// <http://developer.apple.com/documentation/DeveloperTools/Conceptual/MachORuntime/PowerPCConventions/chapter_3_section_5.html> |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1647 | void PPC32ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI, |
| 1648 | const std::vector<ValueRecord> &Args, bool isVarArg) { |
Chris Lattner | 3ea9346 | 2004-08-06 06:58:50 +0000 | [diff] [blame] | 1649 | // Count how many bytes are to be pushed on the stack, including the linkage |
| 1650 | // area, and parameter passing area. |
| 1651 | unsigned NumBytes = 24; |
| 1652 | unsigned ArgOffset = 24; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1653 | |
| 1654 | if (!Args.empty()) { |
| 1655 | for (unsigned i = 0, e = Args.size(); i != e; ++i) |
| 1656 | switch (getClassB(Args[i].Ty)) { |
| 1657 | case cByte: case cShort: case cInt: |
| 1658 | NumBytes += 4; break; |
| 1659 | case cLong: |
| 1660 | NumBytes += 8; break; |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1661 | case cFP32: |
| 1662 | NumBytes += 4; break; |
| 1663 | case cFP64: |
| 1664 | NumBytes += 8; break; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1665 | break; |
| 1666 | default: assert(0 && "Unknown class!"); |
| 1667 | } |
| 1668 | |
Nate Begeman | 865075e | 2004-08-16 01:50:22 +0000 | [diff] [blame] | 1669 | // Just to be safe, we'll always reserve the full 24 bytes of linkage area |
| 1670 | // plus 32 bytes of argument space in case any called code gets funky on us. |
| 1671 | if (NumBytes < 56) NumBytes = 56; |
Chris Lattner | 3ea9346 | 2004-08-06 06:58:50 +0000 | [diff] [blame] | 1672 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1673 | // Adjust the stack pointer for the new arguments... |
Nate Begeman | c13a7f0 | 2005-03-26 01:28:05 +0000 | [diff] [blame] | 1674 | // These operations are automatically eliminated by the prolog/epilog pass |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1675 | BuildMI(BB, PPC::ADJCALLSTACKDOWN, 1).addImm(NumBytes); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1676 | |
| 1677 | // Arguments go on the stack in reverse order, as specified by the ABI. |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1678 | // Offset to the paramater area on the stack is 24. |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 1679 | int GPR_remaining = 8, FPR_remaining = 13; |
Misha Brukman | fc879c3 | 2004-07-08 18:02:38 +0000 | [diff] [blame] | 1680 | unsigned GPR_idx = 0, FPR_idx = 0; |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 1681 | static const unsigned GPR[] = { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1682 | PPC::R3, PPC::R4, PPC::R5, PPC::R6, |
| 1683 | PPC::R7, PPC::R8, PPC::R9, PPC::R10, |
Misha Brukman | 14d8c7a | 2004-06-29 23:45:05 +0000 | [diff] [blame] | 1684 | }; |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 1685 | static const unsigned FPR[] = { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1686 | PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, |
| 1687 | PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, |
| 1688 | PPC::F13 |
Misha Brukman | 14d8c7a | 2004-06-29 23:45:05 +0000 | [diff] [blame] | 1689 | }; |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1690 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1691 | for (unsigned i = 0, e = Args.size(); i != e; ++i) { |
| 1692 | unsigned ArgReg; |
| 1693 | switch (getClassB(Args[i].Ty)) { |
| 1694 | case cByte: |
| 1695 | case cShort: |
| 1696 | // Promote arg to 32 bits wide into a temporary register... |
| 1697 | ArgReg = makeAnotherReg(Type::UIntTy); |
| 1698 | promote32(ArgReg, Args[i]); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1699 | |
| 1700 | // Reg or stack? |
| 1701 | if (GPR_remaining > 0) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1702 | BuildMI(BB, PPC::OR, 2, GPR[GPR_idx]).addReg(ArgReg) |
Misha Brukman | fadb82f | 2004-06-24 22:00:15 +0000 | [diff] [blame] | 1703 | .addReg(ArgReg); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1704 | CallMI->addRegOperand(GPR[GPR_idx], MachineOperand::Use); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 1705 | } |
| 1706 | if (GPR_remaining <= 0 || isVarArg) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1707 | BuildMI(BB, PPC::STW, 3).addReg(ArgReg).addSImm(ArgOffset) |
| 1708 | .addReg(PPC::R1); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1709 | } |
| 1710 | break; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1711 | case cInt: |
| 1712 | ArgReg = Args[i].Val ? getReg(Args[i].Val) : Args[i].Reg; |
| 1713 | |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1714 | // Reg or stack? |
| 1715 | if (GPR_remaining > 0) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1716 | BuildMI(BB, PPC::OR, 2, GPR[GPR_idx]).addReg(ArgReg) |
Misha Brukman | fadb82f | 2004-06-24 22:00:15 +0000 | [diff] [blame] | 1717 | .addReg(ArgReg); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1718 | CallMI->addRegOperand(GPR[GPR_idx], MachineOperand::Use); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 1719 | } |
| 1720 | if (GPR_remaining <= 0 || isVarArg) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1721 | BuildMI(BB, PPC::STW, 3).addReg(ArgReg).addSImm(ArgOffset) |
| 1722 | .addReg(PPC::R1); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1723 | } |
| 1724 | break; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1725 | case cLong: |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1726 | ArgReg = Args[i].Val ? getReg(Args[i].Val) : Args[i].Reg; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1727 | |
Misha Brukman | ec6319a | 2004-07-20 15:51:37 +0000 | [diff] [blame] | 1728 | // Reg or stack? Note that PPC calling conventions state that long args |
| 1729 | // are passed rN = hi, rN+1 = lo, opposite of LLVM. |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1730 | if (GPR_remaining > 1) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1731 | BuildMI(BB, PPC::OR, 2, GPR[GPR_idx]).addReg(ArgReg) |
Misha Brukman | ec6319a | 2004-07-20 15:51:37 +0000 | [diff] [blame] | 1732 | .addReg(ArgReg); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1733 | BuildMI(BB, PPC::OR, 2, GPR[GPR_idx+1]).addReg(ArgReg+1) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 1734 | .addReg(ArgReg+1); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1735 | CallMI->addRegOperand(GPR[GPR_idx], MachineOperand::Use); |
| 1736 | CallMI->addRegOperand(GPR[GPR_idx+1], MachineOperand::Use); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 1737 | } |
| 1738 | if (GPR_remaining <= 1 || isVarArg) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1739 | BuildMI(BB, PPC::STW, 3).addReg(ArgReg).addSImm(ArgOffset) |
| 1740 | .addReg(PPC::R1); |
| 1741 | BuildMI(BB, PPC::STW, 3).addReg(ArgReg+1).addSImm(ArgOffset+4) |
| 1742 | .addReg(PPC::R1); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 1743 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1744 | |
| 1745 | ArgOffset += 4; // 8 byte entry, not 4. |
Misha Brukman | 14d8c7a | 2004-06-29 23:45:05 +0000 | [diff] [blame] | 1746 | GPR_remaining -= 1; // uses up 2 GPRs |
| 1747 | GPR_idx += 1; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1748 | break; |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1749 | case cFP32: |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1750 | ArgReg = Args[i].Val ? getReg(Args[i].Val) : Args[i].Reg; |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1751 | // Reg or stack? |
| 1752 | if (FPR_remaining > 0) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1753 | BuildMI(BB, PPC::FMR, 1, FPR[FPR_idx]).addReg(ArgReg); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1754 | CallMI->addRegOperand(FPR[FPR_idx], MachineOperand::Use); |
| 1755 | FPR_remaining--; |
| 1756 | FPR_idx++; |
| 1757 | |
| 1758 | // If this is a vararg function, and there are GPRs left, also |
| 1759 | // pass the float in an int. Otherwise, put it on the stack. |
| 1760 | if (isVarArg) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1761 | BuildMI(BB, PPC::STFS, 3).addReg(ArgReg).addSImm(ArgOffset) |
| 1762 | .addReg(PPC::R1); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1763 | if (GPR_remaining > 0) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1764 | BuildMI(BB, PPC::LWZ, 2, GPR[GPR_idx]) |
Nate Begeman | 293d88c | 2004-08-13 04:45:14 +0000 | [diff] [blame] | 1765 | .addSImm(ArgOffset).addReg(PPC::R1); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1766 | CallMI->addRegOperand(GPR[GPR_idx], MachineOperand::Use); |
| 1767 | } |
Misha Brukman | 1916bf9 | 2004-06-24 21:56:15 +0000 | [diff] [blame] | 1768 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1769 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1770 | BuildMI(BB, PPC::STFS, 3).addReg(ArgReg).addSImm(ArgOffset) |
| 1771 | .addReg(PPC::R1); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1772 | } |
| 1773 | break; |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1774 | case cFP64: |
| 1775 | ArgReg = Args[i].Val ? getReg(Args[i].Val) : Args[i].Reg; |
| 1776 | // Reg or stack? |
| 1777 | if (FPR_remaining > 0) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1778 | BuildMI(BB, PPC::FMR, 1, FPR[FPR_idx]).addReg(ArgReg); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1779 | CallMI->addRegOperand(FPR[FPR_idx], MachineOperand::Use); |
| 1780 | FPR_remaining--; |
| 1781 | FPR_idx++; |
| 1782 | // For vararg functions, must pass doubles via int regs as well |
| 1783 | if (isVarArg) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1784 | BuildMI(BB, PPC::STFD, 3).addReg(ArgReg).addSImm(ArgOffset) |
| 1785 | .addReg(PPC::R1); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1786 | |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 1787 | // Doubles can be split across reg + stack for varargs |
| 1788 | if (GPR_remaining > 0) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1789 | BuildMI(BB, PPC::LWZ, 2, GPR[GPR_idx]).addSImm(ArgOffset) |
| 1790 | .addReg(PPC::R1); |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 1791 | CallMI->addRegOperand(GPR[GPR_idx], MachineOperand::Use); |
| 1792 | } |
| 1793 | if (GPR_remaining > 1) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1794 | BuildMI(BB, PPC::LWZ, 2, GPR[GPR_idx+1]) |
| 1795 | .addSImm(ArgOffset+4).addReg(PPC::R1); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1796 | CallMI->addRegOperand(GPR[GPR_idx+1], MachineOperand::Use); |
| 1797 | } |
| 1798 | } |
| 1799 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1800 | BuildMI(BB, PPC::STFD, 3).addReg(ArgReg).addSImm(ArgOffset) |
| 1801 | .addReg(PPC::R1); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1802 | } |
| 1803 | // Doubles use 8 bytes, and 2 GPRs worth of param space |
| 1804 | ArgOffset += 4; |
| 1805 | GPR_remaining--; |
| 1806 | GPR_idx++; |
| 1807 | break; |
| 1808 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1809 | default: assert(0 && "Unknown class!"); |
| 1810 | } |
| 1811 | ArgOffset += 4; |
Misha Brukman | 14d8c7a | 2004-06-29 23:45:05 +0000 | [diff] [blame] | 1812 | GPR_remaining--; |
| 1813 | GPR_idx++; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1814 | } |
| 1815 | } else { |
Nate Begeman | 865075e | 2004-08-16 01:50:22 +0000 | [diff] [blame] | 1816 | BuildMI(BB, PPC::ADJCALLSTACKDOWN, 1).addImm(NumBytes); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1817 | } |
Nate Begeman | 43d64ea | 2004-08-15 06:42:28 +0000 | [diff] [blame] | 1818 | |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1819 | BuildMI(BB, PPC::IMPLICIT_DEF, 0, PPC::LR); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1820 | BB->push_back(CallMI); |
Chris Lattner | 3ea9346 | 2004-08-06 06:58:50 +0000 | [diff] [blame] | 1821 | |
| 1822 | // These functions are automatically eliminated by the prolog/epilog pass |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1823 | BuildMI(BB, PPC::ADJCALLSTACKUP, 1).addImm(NumBytes); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1824 | |
| 1825 | // If there is a return value, scavenge the result from the location the call |
| 1826 | // leaves it in... |
| 1827 | // |
| 1828 | if (Ret.Ty != Type::VoidTy) { |
| 1829 | unsigned DestClass = getClassB(Ret.Ty); |
| 1830 | switch (DestClass) { |
| 1831 | case cByte: |
| 1832 | case cShort: |
| 1833 | case cInt: |
| 1834 | // Integral results are in r3 |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1835 | BuildMI(BB, PPC::OR, 2, Ret.Reg).addReg(PPC::R3).addReg(PPC::R3); |
Misha Brukman | e327e49 | 2004-06-24 23:53:24 +0000 | [diff] [blame] | 1836 | break; |
Chris Lattner | 3ea9346 | 2004-08-06 06:58:50 +0000 | [diff] [blame] | 1837 | case cFP32: // Floating-point return values live in f1 |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 1838 | case cFP64: |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1839 | BuildMI(BB, PPC::FMR, 1, Ret.Reg).addReg(PPC::F1); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1840 | break; |
Chris Lattner | 3ea9346 | 2004-08-06 06:58:50 +0000 | [diff] [blame] | 1841 | case cLong: // Long values are in r3:r4 |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1842 | BuildMI(BB, PPC::OR, 2, Ret.Reg).addReg(PPC::R3).addReg(PPC::R3); |
| 1843 | BuildMI(BB, PPC::OR, 2, Ret.Reg+1).addReg(PPC::R4).addReg(PPC::R4); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1844 | break; |
| 1845 | default: assert(0 && "Unknown class!"); |
| 1846 | } |
| 1847 | } |
| 1848 | } |
| 1849 | |
| 1850 | |
| 1851 | /// visitCallInst - Push args on stack and do a procedure call instruction. |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1852 | void PPC32ISel::visitCallInst(CallInst &CI) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1853 | MachineInstr *TheCall; |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 1854 | Function *F = CI.getCalledFunction(); |
| 1855 | if (F) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1856 | // Is it an intrinsic function call? |
| 1857 | if (Intrinsic::ID ID = (Intrinsic::ID)F->getIntrinsicID()) { |
| 1858 | visitIntrinsicCall(ID, CI); // Special intrinsics are not handled here |
| 1859 | return; |
| 1860 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1861 | // Emit a CALL instruction with PC-relative displacement. |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1862 | TheCall = BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(F, true); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1863 | } else { // Emit an indirect call through the CTR |
| 1864 | unsigned Reg = getReg(CI.getCalledValue()); |
Nate Begeman | 43d64ea | 2004-08-15 06:42:28 +0000 | [diff] [blame] | 1865 | BuildMI(BB, PPC::OR, 2, PPC::R12).addReg(Reg).addReg(Reg); |
| 1866 | BuildMI(BB, PPC::MTCTR, 1).addReg(PPC::R12); |
Nate Begeman | 7ca541b | 2005-03-24 23:34:38 +0000 | [diff] [blame] | 1867 | TheCall = BuildMI(PPC::CALLindirect, 3).addZImm(20).addZImm(0) |
Nate Begeman | 43d64ea | 2004-08-15 06:42:28 +0000 | [diff] [blame] | 1868 | .addReg(PPC::R12); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1869 | } |
| 1870 | |
| 1871 | std::vector<ValueRecord> Args; |
| 1872 | for (unsigned i = 1, e = CI.getNumOperands(); i != e; ++i) |
| 1873 | Args.push_back(ValueRecord(CI.getOperand(i))); |
| 1874 | |
| 1875 | unsigned DestReg = CI.getType() != Type::VoidTy ? getReg(CI) : 0; |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 1876 | bool isVarArg = F ? F->getFunctionType()->isVarArg() : true; |
| 1877 | doCall(ValueRecord(DestReg, CI.getType()), TheCall, Args, isVarArg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1878 | } |
| 1879 | |
| 1880 | |
| 1881 | /// dyncastIsNan - Return the operand of an isnan operation if this is an isnan. |
| 1882 | /// |
| 1883 | static Value *dyncastIsNan(Value *V) { |
| 1884 | if (CallInst *CI = dyn_cast<CallInst>(V)) |
| 1885 | if (Function *F = CI->getCalledFunction()) |
Misha Brukman | a2916ce | 2004-06-21 17:58:36 +0000 | [diff] [blame] | 1886 | if (F->getIntrinsicID() == Intrinsic::isunordered) |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1887 | return CI->getOperand(1); |
| 1888 | return 0; |
| 1889 | } |
| 1890 | |
| 1891 | /// isOnlyUsedByUnorderedComparisons - Return true if this value is only used by |
| 1892 | /// or's whos operands are all calls to the isnan predicate. |
| 1893 | static bool isOnlyUsedByUnorderedComparisons(Value *V) { |
| 1894 | assert(dyncastIsNan(V) && "The value isn't an isnan call!"); |
| 1895 | |
| 1896 | // Check all uses, which will be or's of isnans if this predicate is true. |
| 1897 | for (Value::use_iterator UI = V->use_begin(), E = V->use_end(); UI != E;++UI){ |
| 1898 | Instruction *I = cast<Instruction>(*UI); |
| 1899 | if (I->getOpcode() != Instruction::Or) return false; |
| 1900 | if (I->getOperand(0) != V && !dyncastIsNan(I->getOperand(0))) return false; |
| 1901 | if (I->getOperand(1) != V && !dyncastIsNan(I->getOperand(1))) return false; |
| 1902 | } |
| 1903 | |
| 1904 | return true; |
| 1905 | } |
| 1906 | |
| 1907 | /// LowerUnknownIntrinsicFunctionCalls - This performs a prepass over the |
| 1908 | /// function, lowering any calls to unknown intrinsic functions into the |
| 1909 | /// equivalent LLVM code. |
| 1910 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1911 | void PPC32ISel::LowerUnknownIntrinsicFunctionCalls(Function &F) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1912 | for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB) |
| 1913 | for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ) |
| 1914 | if (CallInst *CI = dyn_cast<CallInst>(I++)) |
| 1915 | if (Function *F = CI->getCalledFunction()) |
| 1916 | switch (F->getIntrinsicID()) { |
| 1917 | case Intrinsic::not_intrinsic: |
| 1918 | case Intrinsic::vastart: |
| 1919 | case Intrinsic::vacopy: |
| 1920 | case Intrinsic::vaend: |
| 1921 | case Intrinsic::returnaddress: |
| 1922 | case Intrinsic::frameaddress: |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 1923 | // FIXME: should lower these ourselves |
Misha Brukman | a2916ce | 2004-06-21 17:58:36 +0000 | [diff] [blame] | 1924 | // case Intrinsic::isunordered: |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 1925 | // case Intrinsic::memcpy: -> doCall(). system memcpy almost |
| 1926 | // guaranteed to be faster than anything we generate ourselves |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1927 | // We directly implement these intrinsics |
| 1928 | break; |
| 1929 | case Intrinsic::readio: { |
| 1930 | // On PPC, memory operations are in-order. Lower this intrinsic |
| 1931 | // into a volatile load. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1932 | LoadInst * LI = new LoadInst(CI->getOperand(1), "", true, CI); |
| 1933 | CI->replaceAllUsesWith(LI); |
| 1934 | BB->getInstList().erase(CI); |
| 1935 | break; |
| 1936 | } |
| 1937 | case Intrinsic::writeio: { |
| 1938 | // On PPC, memory operations are in-order. Lower this intrinsic |
| 1939 | // into a volatile store. |
Misha Brukman | 8d442c2 | 2004-07-14 15:29:51 +0000 | [diff] [blame] | 1940 | StoreInst *SI = new StoreInst(CI->getOperand(1), |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1941 | CI->getOperand(2), true, CI); |
Misha Brukman | 8d442c2 | 2004-07-14 15:29:51 +0000 | [diff] [blame] | 1942 | CI->replaceAllUsesWith(SI); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1943 | BB->getInstList().erase(CI); |
| 1944 | break; |
| 1945 | } |
Nate Begeman | 2daec45 | 2005-03-24 20:07:16 +0000 | [diff] [blame] | 1946 | default: { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1947 | // All other intrinsic calls we must lower. |
Nate Begeman | 2daec45 | 2005-03-24 20:07:16 +0000 | [diff] [blame] | 1948 | BasicBlock::iterator me(CI); |
| 1949 | bool atBegin(BB->begin() == me); |
| 1950 | if (!atBegin) |
| 1951 | --me; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1952 | TM.getIntrinsicLowering().LowerIntrinsicCall(CI); |
Nate Begeman | 2daec45 | 2005-03-24 20:07:16 +0000 | [diff] [blame] | 1953 | // Move iterator to instruction after call |
| 1954 | I = atBegin ? BB->begin() : ++me; |
| 1955 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1956 | } |
| 1957 | } |
| 1958 | |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 1959 | void PPC32ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1960 | unsigned TmpReg1, TmpReg2, TmpReg3; |
| 1961 | switch (ID) { |
| 1962 | case Intrinsic::vastart: |
| 1963 | // Get the address of the first vararg value... |
| 1964 | TmpReg1 = getReg(CI); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1965 | addFrameReference(BuildMI(BB, PPC::ADDI, 2, TmpReg1), VarArgsFrameIndex, |
Misha Brukman | ec6319a | 2004-07-20 15:51:37 +0000 | [diff] [blame] | 1966 | 0, false); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1967 | return; |
| 1968 | |
| 1969 | case Intrinsic::vacopy: |
| 1970 | TmpReg1 = getReg(CI); |
| 1971 | TmpReg2 = getReg(CI.getOperand(1)); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1972 | BuildMI(BB, PPC::OR, 2, TmpReg1).addReg(TmpReg2).addReg(TmpReg2); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1973 | return; |
| 1974 | case Intrinsic::vaend: return; |
| 1975 | |
| 1976 | case Intrinsic::returnaddress: |
Misha Brukman | ec6319a | 2004-07-20 15:51:37 +0000 | [diff] [blame] | 1977 | TmpReg1 = getReg(CI); |
| 1978 | if (cast<Constant>(CI.getOperand(1))->isNullValue()) { |
| 1979 | MachineFrameInfo *MFI = F->getFrameInfo(); |
| 1980 | unsigned NumBytes = MFI->getStackSize(); |
| 1981 | |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1982 | BuildMI(BB, PPC::LWZ, 2, TmpReg1).addSImm(NumBytes+8) |
| 1983 | .addReg(PPC::R1); |
Misha Brukman | ec6319a | 2004-07-20 15:51:37 +0000 | [diff] [blame] | 1984 | } else { |
| 1985 | // Values other than zero are not implemented yet. |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1986 | BuildMI(BB, PPC::LI, 1, TmpReg1).addSImm(0); |
Misha Brukman | ec6319a | 2004-07-20 15:51:37 +0000 | [diff] [blame] | 1987 | } |
| 1988 | return; |
| 1989 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1990 | case Intrinsic::frameaddress: |
| 1991 | TmpReg1 = getReg(CI); |
| 1992 | if (cast<Constant>(CI.getOperand(1))->isNullValue()) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1993 | BuildMI(BB, PPC::OR, 2, TmpReg1).addReg(PPC::R1).addReg(PPC::R1); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1994 | } else { |
| 1995 | // Values other than zero are not implemented yet. |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 1996 | BuildMI(BB, PPC::LI, 1, TmpReg1).addSImm(0); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1997 | } |
| 1998 | return; |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 1999 | |
Misha Brukman | a2916ce | 2004-06-21 17:58:36 +0000 | [diff] [blame] | 2000 | #if 0 |
| 2001 | // This may be useful for supporting isunordered |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2002 | case Intrinsic::isnan: |
| 2003 | // If this is only used by 'isunordered' style comparisons, don't emit it. |
| 2004 | if (isOnlyUsedByUnorderedComparisons(&CI)) return; |
| 2005 | TmpReg1 = getReg(CI.getOperand(1)); |
| 2006 | emitUCOM(BB, BB->end(), TmpReg1, TmpReg1); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2007 | TmpReg2 = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2008 | BuildMI(BB, PPC::MFCR, TmpReg2); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2009 | TmpReg3 = getReg(CI); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2010 | BuildMI(BB, PPC::RLWINM, 4, TmpReg3).addReg(TmpReg2).addImm(4).addImm(31).addImm(31); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2011 | return; |
Misha Brukman | a2916ce | 2004-06-21 17:58:36 +0000 | [diff] [blame] | 2012 | #endif |
| 2013 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2014 | default: assert(0 && "Error: unknown intrinsics should have been lowered!"); |
| 2015 | } |
| 2016 | } |
| 2017 | |
| 2018 | /// visitSimpleBinary - Implement simple binary operators for integral types... |
| 2019 | /// OperatorClass is one of: 0 for Add, 1 for Sub, 2 for And, 3 for Or, 4 for |
| 2020 | /// Xor. |
| 2021 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2022 | void PPC32ISel::visitSimpleBinary(BinaryOperator &B, unsigned OperatorClass) { |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2023 | if (std::find(SkipList.begin(), SkipList.end(), &B) != SkipList.end()) |
| 2024 | return; |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2025 | |
| 2026 | unsigned DestReg = getReg(B); |
| 2027 | MachineBasicBlock::iterator MI = BB->end(); |
| 2028 | RlwimiRec RR = InsertMap[&B]; |
| 2029 | if (RR.Target != 0) { |
| 2030 | unsigned TargetReg = getReg(RR.Target, BB, MI); |
| 2031 | unsigned InsertReg = getReg(RR.Insert, BB, MI); |
| 2032 | BuildMI(*BB, MI, PPC::RLWIMI, 5, DestReg).addReg(TargetReg) |
| 2033 | .addReg(InsertReg).addImm(RR.Shift).addImm(RR.MB).addImm(RR.ME); |
| 2034 | return; |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2035 | } |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2036 | |
| 2037 | unsigned Class = getClassB(B.getType()); |
| 2038 | Value *Op0 = B.getOperand(0), *Op1 = B.getOperand(1); |
| 2039 | emitSimpleBinaryOperation(BB, MI, &B, Op0, Op1, OperatorClass, DestReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2040 | } |
| 2041 | |
| 2042 | /// emitBinaryFPOperation - This method handles emission of floating point |
| 2043 | /// Add (0), Sub (1), Mul (2), and Div (3) operations. |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2044 | void PPC32ISel::emitBinaryFPOperation(MachineBasicBlock *BB, |
| 2045 | MachineBasicBlock::iterator IP, |
| 2046 | Value *Op0, Value *Op1, |
| 2047 | unsigned OperatorClass, unsigned DestReg){ |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2048 | |
Nate Begeman | 6d1e2df | 2004-08-14 22:11:38 +0000 | [diff] [blame] | 2049 | static const unsigned OpcodeTab[][4] = { |
| 2050 | { PPC::FADDS, PPC::FSUBS, PPC::FMULS, PPC::FDIVS }, // Float |
| 2051 | { PPC::FADD, PPC::FSUB, PPC::FMUL, PPC::FDIV }, // Double |
| 2052 | }; |
| 2053 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2054 | // Special case: R1 = op <const fp>, R2 |
Misha Brukman | a596f8c | 2004-07-13 15:35:45 +0000 | [diff] [blame] | 2055 | if (ConstantFP *Op0C = dyn_cast<ConstantFP>(Op0)) |
| 2056 | if (Op0C->isExactlyValue(-0.0) && OperatorClass == 1) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2057 | // -0.0 - X === -X |
| 2058 | unsigned op1Reg = getReg(Op1, BB, IP); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2059 | BuildMI(*BB, IP, PPC::FNEG, 1, DestReg).addReg(op1Reg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2060 | return; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2061 | } |
| 2062 | |
Nate Begeman | 81d265d | 2004-08-19 05:20:54 +0000 | [diff] [blame] | 2063 | unsigned Opcode = OpcodeTab[Op0->getType() == Type::DoubleTy][OperatorClass]; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2064 | unsigned Op0r = getReg(Op0, BB, IP); |
| 2065 | unsigned Op1r = getReg(Op1, BB, IP); |
| 2066 | BuildMI(*BB, IP, Opcode, 2, DestReg).addReg(Op0r).addReg(Op1r); |
| 2067 | } |
| 2068 | |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2069 | // ExactLog2 - This function solves for (Val == 1 << (N-1)) and returns N. It |
| 2070 | // returns zero when the input is not exactly a power of two. |
| 2071 | static unsigned ExactLog2(unsigned Val) { |
| 2072 | if (Val == 0 || (Val & (Val-1))) return 0; |
| 2073 | unsigned Count = 0; |
| 2074 | while (Val != 1) { |
| 2075 | Val >>= 1; |
| 2076 | ++Count; |
| 2077 | } |
| 2078 | return Count; |
| 2079 | } |
| 2080 | |
Nate Begeman | bdf6984 | 2004-10-08 02:49:24 +0000 | [diff] [blame] | 2081 | // isRunOfOnes - returns true if Val consists of one contiguous run of 1's with |
| 2082 | // any number of 0's on either side. the 1's are allowed to wrap from LSB to |
| 2083 | // MSB. so 0x000FFF0, 0x0000FFFF, and 0xFF0000FF are all runs. 0x0F0F0000 is |
| 2084 | // not, since all 1's are not contiguous. |
| 2085 | static bool isRunOfOnes(unsigned Val, unsigned &MB, unsigned &ME) { |
| 2086 | bool isRun = true; |
| 2087 | MB = 0; |
| 2088 | ME = 0; |
| 2089 | |
| 2090 | // look for first set bit |
| 2091 | int i = 0; |
| 2092 | for (; i < 32; i++) { |
| 2093 | if ((Val & (1 << (31 - i))) != 0) { |
| 2094 | MB = i; |
| 2095 | ME = i; |
| 2096 | break; |
| 2097 | } |
| 2098 | } |
| 2099 | |
| 2100 | // look for last set bit |
| 2101 | for (; i < 32; i++) { |
| 2102 | if ((Val & (1 << (31 - i))) == 0) |
| 2103 | break; |
| 2104 | ME = i; |
| 2105 | } |
| 2106 | |
| 2107 | // look for next set bit |
| 2108 | for (; i < 32; i++) { |
| 2109 | if ((Val & (1 << (31 - i))) != 0) |
| 2110 | break; |
| 2111 | } |
| 2112 | |
| 2113 | // if we exhausted all the bits, we found a match at this point for 0*1*0* |
| 2114 | if (i == 32) |
| 2115 | return true; |
| 2116 | |
| 2117 | // since we just encountered more 1's, if it doesn't wrap around to the |
| 2118 | // most significant bit of the word, then we did not find a match to 1*0*1* so |
| 2119 | // exit. |
| 2120 | if (MB != 0) |
| 2121 | return false; |
| 2122 | |
| 2123 | // look for last set bit |
| 2124 | for (MB = i; i < 32; i++) { |
| 2125 | if ((Val & (1 << (31 - i))) == 0) |
| 2126 | break; |
| 2127 | } |
| 2128 | |
| 2129 | // if we exhausted all the bits, then we found a match for 1*0*1*, otherwise, |
| 2130 | // the value is not a run of ones. |
| 2131 | if (i == 32) |
| 2132 | return true; |
| 2133 | return false; |
| 2134 | } |
| 2135 | |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2136 | /// isInsertAndHalf - Helper function for emitBitfieldInsert. Returns true if |
| 2137 | /// OpUser has one use, is used by an or instruction, and is itself an and whose |
| 2138 | /// second operand is a constant int. Optionally, set OrI to the Or instruction |
| 2139 | /// that is the sole user of OpUser, and Op1User to the other operand of the Or |
| 2140 | /// instruction. |
| 2141 | static bool isInsertAndHalf(User *OpUser, Instruction **Op1User, |
| 2142 | Instruction **OrI, unsigned &Mask) { |
| 2143 | // If this instruction doesn't have one use, then return false. |
| 2144 | if (!OpUser->hasOneUse()) |
| 2145 | return false; |
| 2146 | |
| 2147 | Mask = 0xFFFFFFFF; |
| 2148 | if (BinaryOperator *BO = dyn_cast<BinaryOperator>(OpUser)) |
| 2149 | if (BO->getOpcode() == Instruction::And) { |
| 2150 | Value *AndUse = *(OpUser->use_begin()); |
| 2151 | if (BinaryOperator *Or = dyn_cast<BinaryOperator>(AndUse)) { |
| 2152 | if (Or->getOpcode() == Instruction::Or) { |
| 2153 | if (ConstantInt *CI = dyn_cast<ConstantInt>(OpUser->getOperand(1))) { |
| 2154 | if (OrI) *OrI = Or; |
| 2155 | if (Op1User) { |
| 2156 | if (Or->getOperand(0) == OpUser) |
| 2157 | *Op1User = dyn_cast<Instruction>(Or->getOperand(1)); |
| 2158 | else |
| 2159 | *Op1User = dyn_cast<Instruction>(Or->getOperand(0)); |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2160 | } |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2161 | Mask &= CI->getRawValue(); |
| 2162 | return true; |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2163 | } |
| 2164 | } |
| 2165 | } |
| 2166 | } |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2167 | return false; |
| 2168 | } |
| 2169 | |
| 2170 | /// isInsertShiftHalf - Helper function for emitBitfieldInsert. Returns true if |
| 2171 | /// OpUser has one use, is used by an or instruction, and is itself a shift |
| 2172 | /// instruction that is either used directly by the or instruction, or is used |
| 2173 | /// by an and instruction whose second operand is a constant int, and which is |
| 2174 | /// used by the or instruction. |
| 2175 | static bool isInsertShiftHalf(User *OpUser, Instruction **Op1User, |
| 2176 | Instruction **OrI, Instruction **OptAndI, |
| 2177 | unsigned &Shift, unsigned &Mask) { |
| 2178 | // If this instruction doesn't have one use, then return false. |
| 2179 | if (!OpUser->hasOneUse()) |
| 2180 | return false; |
| 2181 | |
| 2182 | Mask = 0xFFFFFFFF; |
| 2183 | if (ShiftInst *SI = dyn_cast<ShiftInst>(OpUser)) { |
| 2184 | if (ConstantInt *CI = dyn_cast<ConstantInt>(SI->getOperand(1))) { |
| 2185 | Shift = CI->getRawValue(); |
| 2186 | if (SI->getOpcode() == Instruction::Shl) |
| 2187 | Mask <<= Shift; |
| 2188 | else if (!SI->getOperand(0)->getType()->isSigned()) { |
| 2189 | Mask >>= Shift; |
| 2190 | Shift = 32 - Shift; |
| 2191 | } |
| 2192 | |
| 2193 | // Now check to see if the shift instruction is used by an or. |
| 2194 | Value *ShiftUse = *(OpUser->use_begin()); |
| 2195 | Value *OptAndICopy = 0; |
| 2196 | if (BinaryOperator *BO = dyn_cast<BinaryOperator>(ShiftUse)) { |
| 2197 | if (BO->getOpcode() == Instruction::And && BO->hasOneUse()) { |
| 2198 | if (ConstantInt *ACI = dyn_cast<ConstantInt>(BO->getOperand(1))) { |
| 2199 | if (OptAndI) *OptAndI = BO; |
| 2200 | OptAndICopy = BO; |
| 2201 | Mask &= ACI->getRawValue(); |
| 2202 | BO = dyn_cast<BinaryOperator>(*(BO->use_begin())); |
| 2203 | } |
| 2204 | } |
| 2205 | if (BO && BO->getOpcode() == Instruction::Or) { |
| 2206 | if (OrI) *OrI = BO; |
| 2207 | if (Op1User) { |
| 2208 | if (BO->getOperand(0) == OpUser || BO->getOperand(0) == OptAndICopy) |
| 2209 | *Op1User = dyn_cast<Instruction>(BO->getOperand(1)); |
| 2210 | else |
| 2211 | *Op1User = dyn_cast<Instruction>(BO->getOperand(0)); |
| 2212 | } |
| 2213 | return true; |
| 2214 | } |
| 2215 | } |
| 2216 | } |
| 2217 | } |
| 2218 | return false; |
| 2219 | } |
| 2220 | |
| 2221 | /// emitBitfieldInsert - turn a shift used only by an and with immediate into |
| 2222 | /// the rotate left word immediate then mask insert (rlwimi) instruction. |
| 2223 | /// Patterns matched: |
| 2224 | /// 1. or shl, and 5. or (shl-and), and 9. or and, and |
| 2225 | /// 2. or and, shl 6. or and, (shl-and) |
| 2226 | /// 3. or shr, and 7. or (shr-and), and |
| 2227 | /// 4. or and, shr 8. or and, (shr-and) |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 2228 | bool PPC32ISel::emitBitfieldInsert(User *OpUser, unsigned DestReg) { |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2229 | // Instructions to skip if we match any of the patterns |
| 2230 | Instruction *Op0User, *Op1User = 0, *OptAndI = 0, *OrI = 0; |
| 2231 | unsigned TgtMask, InsMask, Amount = 0; |
| 2232 | bool matched = false; |
| 2233 | |
| 2234 | // We require OpUser to be an instruction to continue |
| 2235 | Op0User = dyn_cast<Instruction>(OpUser); |
| 2236 | if (0 == Op0User) |
| 2237 | return false; |
| 2238 | |
| 2239 | // Look for cases 2, 4, 6, 8, and 9 |
| 2240 | if (isInsertAndHalf(Op0User, &Op1User, &OrI, TgtMask)) |
| 2241 | if (Op1User) |
| 2242 | if (isInsertAndHalf(Op1User, 0, 0, InsMask)) |
| 2243 | matched = true; |
| 2244 | else if (isInsertShiftHalf(Op1User, 0, 0, &OptAndI, Amount, InsMask)) |
| 2245 | matched = true; |
| 2246 | |
| 2247 | // Look for cases 1, 3, 5, and 7. Force the shift argument to be the one |
| 2248 | // inserted into the target, since rlwimi can only rotate the value inserted, |
| 2249 | // not the value being inserted into. |
| 2250 | if (matched == false) |
| 2251 | if (isInsertShiftHalf(Op0User, &Op1User, &OrI, &OptAndI, Amount, InsMask)) |
| 2252 | if (Op1User && isInsertAndHalf(Op1User, 0, 0, TgtMask)) { |
| 2253 | std::swap(Op0User, Op1User); |
| 2254 | matched = true; |
| 2255 | } |
| 2256 | |
| 2257 | // We didn't succeed in matching one of the patterns, so return false |
| 2258 | if (matched == false) |
| 2259 | return false; |
| 2260 | |
| 2261 | // If the masks xor to -1, and the insert mask is a run of ones, then we have |
| 2262 | // succeeded in matching one of the cases for generating rlwimi. Update the |
| 2263 | // skip lists and users of the Instruction::Or. |
| 2264 | unsigned MB, ME; |
| 2265 | if (((TgtMask ^ InsMask) == 0xFFFFFFFF) && isRunOfOnes(InsMask, MB, ME)) { |
| 2266 | SkipList.push_back(Op0User); |
| 2267 | SkipList.push_back(Op1User); |
| 2268 | SkipList.push_back(OptAndI); |
| 2269 | InsertMap[OrI] = RlwimiRec(Op0User->getOperand(0), Op1User->getOperand(0), |
| 2270 | Amount, MB, ME); |
| 2271 | return true; |
| 2272 | } |
| 2273 | return false; |
| 2274 | } |
| 2275 | |
| 2276 | /// emitBitfieldExtract - turn a shift used only by an and with immediate into the |
| 2277 | /// rotate left word immediate then and with mask (rlwinm) instruction. |
| 2278 | bool PPC32ISel::emitBitfieldExtract(MachineBasicBlock *MBB, |
| 2279 | MachineBasicBlock::iterator IP, |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 2280 | User *OpUser, unsigned DestReg) { |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2281 | return false; |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 2282 | /* |
| 2283 | // Instructions to skip if we match any of the patterns |
| 2284 | Instruction *Op0User, *Op1User = 0; |
| 2285 | unsigned ShiftMask, AndMask, Amount = 0; |
| 2286 | bool matched = false; |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2287 | |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 2288 | // We require OpUser to be an instruction to continue |
| 2289 | Op0User = dyn_cast<Instruction>(OpUser); |
| 2290 | if (0 == Op0User) |
| 2291 | return false; |
| 2292 | |
| 2293 | if (isExtractShiftHalf) |
| 2294 | if (isExtractAndHalf) |
| 2295 | matched = true; |
| 2296 | |
| 2297 | if (matched == false && isExtractAndHalf) |
| 2298 | if (isExtractShiftHalf) |
| 2299 | matched = true; |
| 2300 | |
| 2301 | if (matched == false) |
| 2302 | return false; |
| 2303 | |
| 2304 | if (isRunOfOnes(Imm, MB, ME)) { |
| 2305 | unsigned SrcReg = getReg(Op, MBB, IP); |
| 2306 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg).addImm(Rotate) |
| 2307 | .addImm(MB).addImm(ME); |
| 2308 | Op1User->replaceAllUsesWith(Op0User); |
| 2309 | SkipList.push_back(BO); |
| 2310 | return true; |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2311 | } |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 2312 | */ |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2313 | } |
| 2314 | |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2315 | /// emitBinaryConstOperation - Implement simple binary operators for integral |
| 2316 | /// types with a constant operand. Opcode is one of: 0 for Add, 1 for Sub, |
| 2317 | /// 2 for And, 3 for Or, 4 for Xor, and 5 for Subtract-From. |
| 2318 | /// |
| 2319 | void PPC32ISel::emitBinaryConstOperation(MachineBasicBlock *MBB, |
| 2320 | MachineBasicBlock::iterator IP, |
| 2321 | unsigned Op0Reg, ConstantInt *Op1, |
| 2322 | unsigned Opcode, unsigned DestReg) { |
| 2323 | static const unsigned OpTab[] = { |
| 2324 | PPC::ADD, PPC::SUB, PPC::AND, PPC::OR, PPC::XOR, PPC::SUBF |
| 2325 | }; |
| 2326 | static const unsigned ImmOpTab[2][6] = { |
| 2327 | { PPC::ADDI, PPC::ADDI, PPC::ANDIo, PPC::ORI, PPC::XORI, PPC::SUBFIC }, |
| 2328 | { PPC::ADDIS, PPC::ADDIS, PPC::ANDISo, PPC::ORIS, PPC::XORIS, PPC::SUBFIC } |
| 2329 | }; |
| 2330 | |
Chris Lattner | 0284628 | 2004-11-30 07:30:20 +0000 | [diff] [blame] | 2331 | // Handle subtract now by inverting the constant value: X-4 == X+(-4) |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2332 | if (Opcode == 1) { |
Chris Lattner | 0284628 | 2004-11-30 07:30:20 +0000 | [diff] [blame] | 2333 | Op1 = cast<ConstantInt>(ConstantExpr::getNeg(Op1)); |
| 2334 | Opcode = 0; |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2335 | } |
| 2336 | |
| 2337 | // xor X, -1 -> not X |
Chris Lattner | 0284628 | 2004-11-30 07:30:20 +0000 | [diff] [blame] | 2338 | if (Opcode == 4 && Op1->isAllOnesValue()) { |
| 2339 | BuildMI(*MBB, IP, PPC::NOR, 2, DestReg).addReg(Op0Reg).addReg(Op0Reg); |
| 2340 | return; |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2341 | } |
Nate Begeman | bdf6984 | 2004-10-08 02:49:24 +0000 | [diff] [blame] | 2342 | |
Chris Lattner | 0284628 | 2004-11-30 07:30:20 +0000 | [diff] [blame] | 2343 | if (Opcode == 2 && !Op1->isNullValue()) { |
| 2344 | unsigned MB, ME, mask = Op1->getRawValue(); |
Nate Begeman | bdf6984 | 2004-10-08 02:49:24 +0000 | [diff] [blame] | 2345 | if (isRunOfOnes(mask, MB, ME)) { |
Nate Begeman | bdf6984 | 2004-10-08 02:49:24 +0000 | [diff] [blame] | 2346 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(Op0Reg).addImm(0) |
| 2347 | .addImm(MB).addImm(ME); |
| 2348 | return; |
| 2349 | } |
| 2350 | } |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2351 | |
Nate Begeman | e0c83a8 | 2004-10-15 00:50:19 +0000 | [diff] [blame] | 2352 | // PowerPC 16 bit signed immediates are sign extended before use by the |
| 2353 | // instruction. Therefore, we can only split up an add of a reg with a 32 bit |
| 2354 | // immediate into addis and addi if the sign bit of the low 16 bits is cleared |
| 2355 | // so that for register A, const imm X, we don't end up with |
| 2356 | // A + XXXX0000 + FFFFXXXX. |
| 2357 | bool WontSignExtend = (0 == (Op1->getRawValue() & 0x8000)); |
| 2358 | |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2359 | // For Add, Sub, and SubF the instruction takes a signed immediate. For And, |
| 2360 | // Or, and Xor, the instruction takes an unsigned immediate. There is no |
| 2361 | // shifted immediate form of SubF so disallow its opcode for those constants. |
Chris Lattner | 0284628 | 2004-11-30 07:30:20 +0000 | [diff] [blame] | 2362 | if (canUseAsImmediateForOpcode(Op1, Opcode, false)) { |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2363 | if (Opcode < 2 || Opcode == 5) |
| 2364 | BuildMI(*MBB, IP, ImmOpTab[0][Opcode], 2, DestReg).addReg(Op0Reg) |
| 2365 | .addSImm(Op1->getRawValue()); |
| 2366 | else |
| 2367 | BuildMI(*MBB, IP, ImmOpTab[0][Opcode], 2, DestReg).addReg(Op0Reg) |
| 2368 | .addZImm(Op1->getRawValue()); |
Chris Lattner | 0284628 | 2004-11-30 07:30:20 +0000 | [diff] [blame] | 2369 | } else if (canUseAsImmediateForOpcode(Op1, Opcode, true) && (Opcode < 5)) { |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2370 | if (Opcode < 2) |
| 2371 | BuildMI(*MBB, IP, ImmOpTab[1][Opcode], 2, DestReg).addReg(Op0Reg) |
| 2372 | .addSImm(Op1->getRawValue() >> 16); |
| 2373 | else |
| 2374 | BuildMI(*MBB, IP, ImmOpTab[1][Opcode], 2, DestReg).addReg(Op0Reg) |
| 2375 | .addZImm(Op1->getRawValue() >> 16); |
Nate Begeman | e0c83a8 | 2004-10-15 00:50:19 +0000 | [diff] [blame] | 2376 | } else if ((Opcode < 2 && WontSignExtend) || Opcode == 3 || Opcode == 4) { |
| 2377 | unsigned TmpReg = makeAnotherReg(Op1->getType()); |
Nate Begeman | e0c83a8 | 2004-10-15 00:50:19 +0000 | [diff] [blame] | 2378 | if (Opcode < 2) { |
| 2379 | BuildMI(*MBB, IP, ImmOpTab[1][Opcode], 2, TmpReg).addReg(Op0Reg) |
| 2380 | .addSImm(Op1->getRawValue() >> 16); |
| 2381 | BuildMI(*MBB, IP, ImmOpTab[0][Opcode], 2, DestReg).addReg(TmpReg) |
| 2382 | .addSImm(Op1->getRawValue()); |
| 2383 | } else { |
| 2384 | BuildMI(*MBB, IP, ImmOpTab[1][Opcode], 2, TmpReg).addReg(Op0Reg) |
| 2385 | .addZImm(Op1->getRawValue() >> 16); |
| 2386 | BuildMI(*MBB, IP, ImmOpTab[0][Opcode], 2, DestReg).addReg(TmpReg) |
| 2387 | .addZImm(Op1->getRawValue()); |
| 2388 | } |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2389 | } else { |
| 2390 | unsigned Op1Reg = getReg(Op1, MBB, IP); |
| 2391 | BuildMI(*MBB, IP, OpTab[Opcode], 2, DestReg).addReg(Op0Reg).addReg(Op1Reg); |
| 2392 | } |
| 2393 | } |
| 2394 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2395 | /// emitSimpleBinaryOperation - Implement simple binary operators for integral |
| 2396 | /// types... OperatorClass is one of: 0 for Add, 1 for Sub, 2 for And, 3 for |
| 2397 | /// Or, 4 for Xor. |
| 2398 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2399 | void PPC32ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB, |
| 2400 | MachineBasicBlock::iterator IP, |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2401 | BinaryOperator *BO, |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2402 | Value *Op0, Value *Op1, |
| 2403 | unsigned OperatorClass, |
| 2404 | unsigned DestReg) { |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2405 | // Arithmetic and Bitwise operators |
Misha Brukman | 911afde | 2004-06-25 14:50:41 +0000 | [diff] [blame] | 2406 | static const unsigned OpcodeTab[] = { |
Nate Begeman | f70b576 | 2005-03-28 23:08:54 +0000 | [diff] [blame] | 2407 | PPC::ADD, PPC::SUBF, PPC::AND, PPC::OR, PPC::XOR |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2408 | }; |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2409 | static const unsigned LongOpTab[2][5] = { |
Nate Begeman | ca12a2b | 2005-03-28 22:28:37 +0000 | [diff] [blame] | 2410 | { PPC::ADDC, PPC::SUBFC, PPC::AND, PPC::OR, PPC::XOR }, |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2411 | { PPC::ADDE, PPC::SUBFE, PPC::AND, PPC::OR, PPC::XOR } |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2412 | }; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2413 | |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2414 | unsigned Class = getClassB(Op0->getType()); |
| 2415 | |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 2416 | if (Class == cFP32 || Class == cFP64) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2417 | assert(OperatorClass < 2 && "No logical ops for FP!"); |
| 2418 | emitBinaryFPOperation(MBB, IP, Op0, Op1, OperatorClass, DestReg); |
| 2419 | return; |
| 2420 | } |
| 2421 | |
| 2422 | if (Op0->getType() == Type::BoolTy) { |
| 2423 | if (OperatorClass == 3) |
| 2424 | // If this is an or of two isnan's, emit an FP comparison directly instead |
| 2425 | // of or'ing two isnan's together. |
| 2426 | if (Value *LHS = dyncastIsNan(Op0)) |
| 2427 | if (Value *RHS = dyncastIsNan(Op1)) { |
| 2428 | unsigned Op0Reg = getReg(RHS, MBB, IP), Op1Reg = getReg(LHS, MBB, IP); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2429 | unsigned TmpReg = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2430 | emitUCOM(MBB, IP, Op0Reg, Op1Reg); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2431 | BuildMI(*MBB, IP, PPC::MFCR, TmpReg); |
| 2432 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(TmpReg).addImm(4) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2433 | .addImm(31).addImm(31); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2434 | return; |
| 2435 | } |
| 2436 | } |
| 2437 | |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 2438 | // Special case: op <const int>, Reg |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2439 | if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0)) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2440 | if (Class != cLong) { |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2441 | unsigned Opcode = (OperatorClass == 1) ? 5 : OperatorClass; |
| 2442 | unsigned Op1r = getReg(Op1, MBB, IP); |
| 2443 | emitBinaryConstOperation(MBB, IP, Op1r, CI, Opcode, DestReg); |
| 2444 | return; |
| 2445 | } |
| 2446 | // Special case: op Reg, <const int> |
| 2447 | if (ConstantInt *CI = dyn_cast<ConstantInt>(Op1)) |
| 2448 | if (Class != cLong) { |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 2449 | if (emitBitfieldInsert(BO, DestReg)) |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2450 | return; |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2451 | |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2452 | unsigned Op0r = getReg(Op0, MBB, IP); |
| 2453 | emitBinaryConstOperation(MBB, IP, Op0r, CI, OperatorClass, DestReg); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2454 | return; |
| 2455 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2456 | |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 2457 | // We couldn't generate an immediate variant of the op, load both halves into |
| 2458 | // registers and emit the appropriate opcode. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2459 | unsigned Op0r = getReg(Op0, MBB, IP); |
| 2460 | unsigned Op1r = getReg(Op1, MBB, IP); |
| 2461 | |
Nate Begeman | f70b576 | 2005-03-28 23:08:54 +0000 | [diff] [blame] | 2462 | // Subtracts have their operands swapped |
| 2463 | if (OperatorClass == 1) { |
| 2464 | if (Class != cLong) { |
| 2465 | BuildMI(*MBB, IP, PPC::SUBF, 2, DestReg).addReg(Op1r).addReg(Op0r); |
| 2466 | } else { |
| 2467 | BuildMI(*MBB, IP, PPC::SUBFC, 2, DestReg+1).addReg(Op1r+1).addReg(Op0r+1); |
| 2468 | BuildMI(*MBB, IP, PPC::SUBFE, 2, DestReg).addReg(Op1r).addReg(Op0r); |
| 2469 | } |
| 2470 | return; |
| 2471 | } |
| 2472 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2473 | if (Class != cLong) { |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2474 | unsigned Opcode = OpcodeTab[OperatorClass]; |
| 2475 | BuildMI(*MBB, IP, Opcode, 2, DestReg).addReg(Op0r).addReg(Op1r); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2476 | } else { |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2477 | BuildMI(*MBB, IP, LongOpTab[0][OperatorClass], 2, DestReg+1).addReg(Op0r+1) |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 2478 | .addReg(Op1r+1); |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2479 | BuildMI(*MBB, IP, LongOpTab[1][OperatorClass], 2, DestReg).addReg(Op0r) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2480 | .addReg(Op1r); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2481 | } |
| 2482 | return; |
| 2483 | } |
| 2484 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2485 | /// doMultiply - Emit appropriate instructions to multiply together the |
| 2486 | /// Values Op0 and Op1, and put the result in DestReg. |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2487 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2488 | void PPC32ISel::doMultiply(MachineBasicBlock *MBB, |
| 2489 | MachineBasicBlock::iterator IP, |
| 2490 | unsigned DestReg, Value *Op0, Value *Op1) { |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2491 | unsigned Class0 = getClass(Op0->getType()); |
| 2492 | unsigned Class1 = getClass(Op1->getType()); |
| 2493 | |
| 2494 | unsigned Op0r = getReg(Op0, MBB, IP); |
| 2495 | unsigned Op1r = getReg(Op1, MBB, IP); |
| 2496 | |
| 2497 | // 64 x 64 -> 64 |
| 2498 | if (Class0 == cLong && Class1 == cLong) { |
| 2499 | unsigned Tmp1 = makeAnotherReg(Type::IntTy); |
| 2500 | unsigned Tmp2 = makeAnotherReg(Type::IntTy); |
| 2501 | unsigned Tmp3 = makeAnotherReg(Type::IntTy); |
| 2502 | unsigned Tmp4 = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2503 | BuildMI(*MBB, IP, PPC::MULHWU, 2, Tmp1).addReg(Op0r+1).addReg(Op1r+1); |
| 2504 | BuildMI(*MBB, IP, PPC::MULLW, 2, DestReg+1).addReg(Op0r+1).addReg(Op1r+1); |
| 2505 | BuildMI(*MBB, IP, PPC::MULLW, 2, Tmp2).addReg(Op0r+1).addReg(Op1r); |
| 2506 | BuildMI(*MBB, IP, PPC::ADD, 2, Tmp3).addReg(Tmp1).addReg(Tmp2); |
| 2507 | BuildMI(*MBB, IP, PPC::MULLW, 2, Tmp4).addReg(Op0r).addReg(Op1r+1); |
| 2508 | BuildMI(*MBB, IP, PPC::ADD, 2, DestReg).addReg(Tmp3).addReg(Tmp4); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2509 | return; |
| 2510 | } |
| 2511 | |
| 2512 | // 64 x 32 or less, promote 32 to 64 and do a 64 x 64 |
| 2513 | if (Class0 == cLong && Class1 <= cInt) { |
| 2514 | unsigned Tmp0 = makeAnotherReg(Type::IntTy); |
| 2515 | unsigned Tmp1 = makeAnotherReg(Type::IntTy); |
| 2516 | unsigned Tmp2 = makeAnotherReg(Type::IntTy); |
| 2517 | unsigned Tmp3 = makeAnotherReg(Type::IntTy); |
| 2518 | unsigned Tmp4 = makeAnotherReg(Type::IntTy); |
| 2519 | if (Op1->getType()->isSigned()) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2520 | BuildMI(*MBB, IP, PPC::SRAWI, 2, Tmp0).addReg(Op1r).addImm(31); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2521 | else |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2522 | BuildMI(*MBB, IP, PPC::LI, 2, Tmp0).addSImm(0); |
| 2523 | BuildMI(*MBB, IP, PPC::MULHWU, 2, Tmp1).addReg(Op0r+1).addReg(Op1r); |
| 2524 | BuildMI(*MBB, IP, PPC::MULLW, 2, DestReg+1).addReg(Op0r+1).addReg(Op1r); |
| 2525 | BuildMI(*MBB, IP, PPC::MULLW, 2, Tmp2).addReg(Op0r+1).addReg(Tmp0); |
| 2526 | BuildMI(*MBB, IP, PPC::ADD, 2, Tmp3).addReg(Tmp1).addReg(Tmp2); |
| 2527 | BuildMI(*MBB, IP, PPC::MULLW, 2, Tmp4).addReg(Op0r).addReg(Op1r); |
| 2528 | BuildMI(*MBB, IP, PPC::ADD, 2, DestReg).addReg(Tmp3).addReg(Tmp4); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2529 | return; |
| 2530 | } |
| 2531 | |
| 2532 | // 32 x 32 -> 32 |
| 2533 | if (Class0 <= cInt && Class1 <= cInt) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2534 | BuildMI(*MBB, IP, PPC::MULLW, 2, DestReg).addReg(Op0r).addReg(Op1r); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2535 | return; |
| 2536 | } |
| 2537 | |
| 2538 | assert(0 && "doMultiply cannot operate on unknown type!"); |
| 2539 | } |
| 2540 | |
| 2541 | /// doMultiplyConst - This method will multiply the value in Op0 by the |
| 2542 | /// value of the ContantInt *CI |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2543 | void PPC32ISel::doMultiplyConst(MachineBasicBlock *MBB, |
| 2544 | MachineBasicBlock::iterator IP, |
| 2545 | unsigned DestReg, Value *Op0, ConstantInt *CI) { |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2546 | unsigned Class = getClass(Op0->getType()); |
| 2547 | |
| 2548 | // Mul op0, 0 ==> 0 |
| 2549 | if (CI->isNullValue()) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2550 | BuildMI(*MBB, IP, PPC::LI, 1, DestReg).addSImm(0); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2551 | if (Class == cLong) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2552 | BuildMI(*MBB, IP, PPC::LI, 1, DestReg+1).addSImm(0); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2553 | return; |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2554 | } |
| 2555 | |
| 2556 | // Mul op0, 1 ==> op0 |
| 2557 | if (CI->equalsInt(1)) { |
| 2558 | unsigned Op0r = getReg(Op0, MBB, IP); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2559 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(Op0r).addReg(Op0r); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2560 | if (Class == cLong) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2561 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1).addReg(Op0r+1).addReg(Op0r+1); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2562 | return; |
| 2563 | } |
| 2564 | |
| 2565 | // If the element size is exactly a power of 2, use a shift to get it. |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2566 | if (unsigned Shift = ExactLog2(CI->getRawValue())) { |
| 2567 | ConstantUInt *ShiftCI = ConstantUInt::get(Type::UByteTy, Shift); |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 2568 | emitShiftOperation(MBB, IP, Op0, ShiftCI, true, Op0->getType(), 0, DestReg); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2569 | return; |
| 2570 | } |
| 2571 | |
| 2572 | // If 32 bits or less and immediate is in right range, emit mul by immediate |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 2573 | if (Class == cByte || Class == cShort || Class == cInt) { |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2574 | if (canUseAsImmediateForOpcode(CI, 0, false)) { |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2575 | unsigned Op0r = getReg(Op0, MBB, IP); |
| 2576 | unsigned imm = CI->getRawValue() & 0xFFFF; |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2577 | BuildMI(*MBB, IP, PPC::MULLI, 2, DestReg).addReg(Op0r).addSImm(imm); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2578 | return; |
| 2579 | } |
| 2580 | } |
| 2581 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2582 | doMultiply(MBB, IP, DestReg, Op0, CI); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2583 | } |
| 2584 | |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2585 | void PPC32ISel::visitMul(BinaryOperator &I) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2586 | unsigned ResultReg = getReg(I); |
| 2587 | |
| 2588 | Value *Op0 = I.getOperand(0); |
| 2589 | Value *Op1 = I.getOperand(1); |
| 2590 | |
| 2591 | MachineBasicBlock::iterator IP = BB->end(); |
| 2592 | emitMultiply(BB, IP, Op0, Op1, ResultReg); |
| 2593 | } |
| 2594 | |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2595 | void PPC32ISel::emitMultiply(MachineBasicBlock *MBB, |
| 2596 | MachineBasicBlock::iterator IP, |
| 2597 | Value *Op0, Value *Op1, unsigned DestReg) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2598 | TypeClass Class = getClass(Op0->getType()); |
| 2599 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2600 | switch (Class) { |
| 2601 | case cByte: |
| 2602 | case cShort: |
| 2603 | case cInt: |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2604 | case cLong: |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2605 | if (ConstantInt *CI = dyn_cast<ConstantInt>(Op1)) { |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2606 | doMultiplyConst(MBB, IP, DestReg, Op0, CI); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2607 | } else { |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2608 | doMultiply(MBB, IP, DestReg, Op0, Op1); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2609 | } |
| 2610 | return; |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 2611 | case cFP32: |
| 2612 | case cFP64: |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2613 | emitBinaryFPOperation(MBB, IP, Op0, Op1, 2, DestReg); |
| 2614 | return; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2615 | break; |
| 2616 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2617 | } |
| 2618 | |
| 2619 | |
| 2620 | /// visitDivRem - Handle division and remainder instructions... these |
| 2621 | /// instruction both require the same instructions to be generated, they just |
| 2622 | /// select the result from a different register. Note that both of these |
| 2623 | /// instructions work differently for signed and unsigned operands. |
| 2624 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2625 | void PPC32ISel::visitDivRem(BinaryOperator &I) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2626 | unsigned ResultReg = getReg(I); |
| 2627 | Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); |
| 2628 | |
| 2629 | MachineBasicBlock::iterator IP = BB->end(); |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2630 | emitDivRemOperation(BB, IP, Op0, Op1, I.getOpcode() == Instruction::Div, |
| 2631 | ResultReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2632 | } |
| 2633 | |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2634 | void PPC32ISel::emitDivRemOperation(MachineBasicBlock *MBB, |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2635 | MachineBasicBlock::iterator IP, |
| 2636 | Value *Op0, Value *Op1, bool isDiv, |
| 2637 | unsigned ResultReg) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2638 | const Type *Ty = Op0->getType(); |
| 2639 | unsigned Class = getClass(Ty); |
| 2640 | switch (Class) { |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 2641 | case cFP32: |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2642 | if (isDiv) { |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 2643 | // Floating point divide... |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2644 | emitBinaryFPOperation(MBB, IP, Op0, Op1, 3, ResultReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2645 | return; |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 2646 | } else { |
| 2647 | // Floating point remainder via fmodf(float x, float y); |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2648 | unsigned Op0Reg = getReg(Op0, MBB, IP); |
| 2649 | unsigned Op1Reg = getReg(Op1, MBB, IP); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 2650 | MachineInstr *TheCall = |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2651 | BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(fmodfFn, true); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 2652 | std::vector<ValueRecord> Args; |
| 2653 | Args.push_back(ValueRecord(Op0Reg, Type::FloatTy)); |
| 2654 | Args.push_back(ValueRecord(Op1Reg, Type::FloatTy)); |
| 2655 | doCall(ValueRecord(ResultReg, Type::FloatTy), TheCall, Args, false); |
| 2656 | } |
| 2657 | return; |
| 2658 | case cFP64: |
| 2659 | if (isDiv) { |
| 2660 | // Floating point divide... |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2661 | emitBinaryFPOperation(MBB, IP, Op0, Op1, 3, ResultReg); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 2662 | return; |
| 2663 | } else { |
| 2664 | // Floating point remainder via fmod(double x, double y); |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2665 | unsigned Op0Reg = getReg(Op0, MBB, IP); |
| 2666 | unsigned Op1Reg = getReg(Op1, MBB, IP); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2667 | MachineInstr *TheCall = |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2668 | BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(fmodFn, true); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2669 | std::vector<ValueRecord> Args; |
| 2670 | Args.push_back(ValueRecord(Op0Reg, Type::DoubleTy)); |
| 2671 | Args.push_back(ValueRecord(Op1Reg, Type::DoubleTy)); |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 2672 | doCall(ValueRecord(ResultReg, Type::DoubleTy), TheCall, Args, false); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2673 | } |
| 2674 | return; |
| 2675 | case cLong: { |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 2676 | static Function* const Funcs[] = |
Misha Brukman | 0aa97c6 | 2004-07-08 18:27:59 +0000 | [diff] [blame] | 2677 | { __moddi3Fn, __divdi3Fn, __umoddi3Fn, __udivdi3Fn }; |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2678 | unsigned Op0Reg = getReg(Op0, MBB, IP); |
| 2679 | unsigned Op1Reg = getReg(Op1, MBB, IP); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2680 | unsigned NameIdx = Ty->isUnsigned()*2 + isDiv; |
| 2681 | MachineInstr *TheCall = |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2682 | BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(Funcs[NameIdx], true); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2683 | |
| 2684 | std::vector<ValueRecord> Args; |
| 2685 | Args.push_back(ValueRecord(Op0Reg, Type::LongTy)); |
| 2686 | Args.push_back(ValueRecord(Op1Reg, Type::LongTy)); |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 2687 | doCall(ValueRecord(ResultReg, Type::LongTy), TheCall, Args, false); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2688 | return; |
| 2689 | } |
| 2690 | case cByte: case cShort: case cInt: |
| 2691 | break; // Small integrals, handled below... |
| 2692 | default: assert(0 && "Unknown class!"); |
| 2693 | } |
| 2694 | |
| 2695 | // Special case signed division by power of 2. |
| 2696 | if (isDiv) |
| 2697 | if (ConstantSInt *CI = dyn_cast<ConstantSInt>(Op1)) { |
| 2698 | assert(Class != cLong && "This doesn't handle 64-bit divides!"); |
| 2699 | int V = CI->getValue(); |
| 2700 | |
| 2701 | if (V == 1) { // X /s 1 => X |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2702 | unsigned Op0Reg = getReg(Op0, MBB, IP); |
| 2703 | BuildMI(*MBB, IP, PPC::OR, 2, ResultReg).addReg(Op0Reg).addReg(Op0Reg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2704 | return; |
| 2705 | } |
| 2706 | |
| 2707 | if (V == -1) { // X /s -1 => -X |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2708 | unsigned Op0Reg = getReg(Op0, MBB, IP); |
| 2709 | BuildMI(*MBB, IP, PPC::NEG, 1, ResultReg).addReg(Op0Reg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2710 | return; |
| 2711 | } |
| 2712 | |
Misha Brukman | ec6319a | 2004-07-20 15:51:37 +0000 | [diff] [blame] | 2713 | unsigned log2V = ExactLog2(V); |
| 2714 | if (log2V != 0 && Ty->isSigned()) { |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2715 | unsigned Op0Reg = getReg(Op0, MBB, IP); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2716 | unsigned TmpReg = makeAnotherReg(Op0->getType()); |
Misha Brukman | ec6319a | 2004-07-20 15:51:37 +0000 | [diff] [blame] | 2717 | |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2718 | BuildMI(*MBB, IP, PPC::SRAWI, 2, TmpReg).addReg(Op0Reg).addImm(log2V); |
| 2719 | BuildMI(*MBB, IP, PPC::ADDZE, 1, ResultReg).addReg(TmpReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2720 | return; |
| 2721 | } |
| 2722 | } |
| 2723 | |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2724 | unsigned Op0Reg = getReg(Op0, MBB, IP); |
| 2725 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2726 | if (isDiv) { |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2727 | unsigned Op1Reg = getReg(Op1, MBB, IP); |
| 2728 | unsigned Opcode = Ty->isSigned() ? PPC::DIVW : PPC::DIVWU; |
| 2729 | BuildMI(*MBB, IP, Opcode, 2, ResultReg).addReg(Op0Reg).addReg(Op1Reg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2730 | } else { // Remainder |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2731 | // FIXME: don't load the CI part of a CI divide twice |
| 2732 | ConstantInt *CI = dyn_cast<ConstantInt>(Op1); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2733 | unsigned TmpReg1 = makeAnotherReg(Op0->getType()); |
| 2734 | unsigned TmpReg2 = makeAnotherReg(Op0->getType()); |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2735 | emitDivRemOperation(MBB, IP, Op0, Op1, true, TmpReg1); |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2736 | if (CI && canUseAsImmediateForOpcode(CI, 0, false)) { |
Nate Begeman | 087d5d9 | 2004-10-06 09:53:04 +0000 | [diff] [blame] | 2737 | BuildMI(*MBB, IP, PPC::MULLI, 2, TmpReg2).addReg(TmpReg1) |
| 2738 | .addSImm(CI->getRawValue()); |
| 2739 | } else { |
| 2740 | unsigned Op1Reg = getReg(Op1, MBB, IP); |
| 2741 | BuildMI(*MBB, IP, PPC::MULLW, 2, TmpReg2).addReg(TmpReg1).addReg(Op1Reg); |
| 2742 | } |
| 2743 | BuildMI(*MBB, IP, PPC::SUBF, 2, ResultReg).addReg(TmpReg2).addReg(Op0Reg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2744 | } |
| 2745 | } |
| 2746 | |
| 2747 | |
| 2748 | /// Shift instructions: 'shl', 'sar', 'shr' - Some special cases here |
| 2749 | /// for constant immediate shift values, and for constant immediate |
| 2750 | /// shift values equal to 1. Even the general case is sort of special, |
| 2751 | /// because the shift amount has to be in CL, not just any old register. |
| 2752 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2753 | void PPC32ISel::visitShiftInst(ShiftInst &I) { |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2754 | if (std::find(SkipList.begin(), SkipList.end(), &I) != SkipList.end()) |
| 2755 | return; |
| 2756 | |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 2757 | MachineBasicBlock::iterator IP = BB->end(); |
| 2758 | emitShiftOperation(BB, IP, I.getOperand(0), I.getOperand(1), |
| 2759 | I.getOpcode() == Instruction::Shl, I.getType(), |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 2760 | &I, getReg(I)); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2761 | } |
| 2762 | |
| 2763 | /// emitShiftOperation - Common code shared between visitShiftInst and |
| 2764 | /// constant expression support. |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2765 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2766 | void PPC32ISel::emitShiftOperation(MachineBasicBlock *MBB, |
| 2767 | MachineBasicBlock::iterator IP, |
| 2768 | Value *Op, Value *ShiftAmount, |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 2769 | bool isLeftShift, const Type *ResultTy, |
| 2770 | ShiftInst *SI, unsigned DestReg) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2771 | bool isSigned = ResultTy->isSigned (); |
| 2772 | unsigned Class = getClass (ResultTy); |
| 2773 | |
| 2774 | // Longs, as usual, are handled specially... |
| 2775 | if (Class == cLong) { |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2776 | unsigned SrcReg = getReg (Op, MBB, IP); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2777 | // If we have a constant shift, we can generate much more efficient code |
Nate Begeman | 2d4c98d | 2004-10-16 20:43:38 +0000 | [diff] [blame] | 2778 | // than for a variable shift by using the rlwimi instruction. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2779 | if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(ShiftAmount)) { |
| 2780 | unsigned Amount = CUI->getValue(); |
Chris Lattner | 7747040 | 2004-11-30 06:29:10 +0000 | [diff] [blame] | 2781 | if (Amount == 0) { |
| 2782 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); |
| 2783 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1) |
| 2784 | .addReg(SrcReg+1).addReg(SrcReg+1); |
| 2785 | |
| 2786 | } else if (Amount < 32) { |
Nate Begeman | 2d4c98d | 2004-10-16 20:43:38 +0000 | [diff] [blame] | 2787 | unsigned TempReg = makeAnotherReg(ResultTy); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2788 | if (isLeftShift) { |
Nate Begeman | 2d4c98d | 2004-10-16 20:43:38 +0000 | [diff] [blame] | 2789 | BuildMI(*MBB, IP, PPC::RLWINM, 4, TempReg).addReg(SrcReg) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2790 | .addImm(Amount).addImm(0).addImm(31-Amount); |
Nate Begeman | 2d4c98d | 2004-10-16 20:43:38 +0000 | [diff] [blame] | 2791 | BuildMI(*MBB, IP, PPC::RLWIMI, 5, DestReg).addReg(TempReg) |
| 2792 | .addReg(SrcReg+1).addImm(Amount).addImm(32-Amount).addImm(31); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2793 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg+1).addReg(SrcReg+1) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2794 | .addImm(Amount).addImm(0).addImm(31-Amount); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2795 | } else { |
Nate Begeman | 2d4c98d | 2004-10-16 20:43:38 +0000 | [diff] [blame] | 2796 | BuildMI(*MBB, IP, PPC::RLWINM, 4, TempReg).addReg(SrcReg+1) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2797 | .addImm(32-Amount).addImm(Amount).addImm(31); |
Nate Begeman | 2d4c98d | 2004-10-16 20:43:38 +0000 | [diff] [blame] | 2798 | BuildMI(*MBB, IP, PPC::RLWIMI, 5, DestReg+1).addReg(TempReg) |
| 2799 | .addReg(SrcReg).addImm(32-Amount).addImm(0).addImm(Amount-1); |
Nate Begeman | 020ef42 | 2005-04-06 22:42:08 +0000 | [diff] [blame] | 2800 | if (isSigned) { |
| 2801 | BuildMI(*MBB, IP, PPC::SRAWI, 2, DestReg).addReg(SrcReg) |
| 2802 | .addImm(Amount); |
| 2803 | } else { |
| 2804 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg) |
| 2805 | .addImm(32-Amount).addImm(Amount).addImm(31); |
| 2806 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2807 | } |
| 2808 | } else { // Shifting more than 32 bits |
| 2809 | Amount -= 32; |
| 2810 | if (isLeftShift) { |
| 2811 | if (Amount != 0) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2812 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg+1) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2813 | .addImm(Amount).addImm(0).addImm(31-Amount); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2814 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2815 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(SrcReg+1) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2816 | .addReg(SrcReg+1); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2817 | } |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2818 | BuildMI(*MBB, IP, PPC::LI, 1, DestReg+1).addSImm(0); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2819 | } else { |
| 2820 | if (Amount != 0) { |
| 2821 | if (isSigned) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2822 | BuildMI(*MBB, IP, PPC::SRAWI, 2, DestReg+1).addReg(SrcReg) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2823 | .addImm(Amount); |
| 2824 | else |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2825 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg+1).addReg(SrcReg) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2826 | .addImm(32-Amount).addImm(Amount).addImm(31); |
| 2827 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2828 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1).addReg(SrcReg) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2829 | .addReg(SrcReg); |
| 2830 | } |
Nate Begeman | 020ef42 | 2005-04-06 22:42:08 +0000 | [diff] [blame] | 2831 | if (isSigned) |
| 2832 | BuildMI(*MBB, IP, PPC::SRAWI, 2, DestReg).addReg(SrcReg) |
| 2833 | .addImm(31); |
| 2834 | else |
| 2835 | BuildMI(*MBB, IP,PPC::LI, 1, DestReg).addSImm(0); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2836 | } |
| 2837 | } |
| 2838 | } else { |
| 2839 | unsigned TmpReg1 = makeAnotherReg(Type::IntTy); |
| 2840 | unsigned TmpReg2 = makeAnotherReg(Type::IntTy); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2841 | unsigned TmpReg3 = makeAnotherReg(Type::IntTy); |
| 2842 | unsigned TmpReg4 = makeAnotherReg(Type::IntTy); |
| 2843 | unsigned TmpReg5 = makeAnotherReg(Type::IntTy); |
| 2844 | unsigned TmpReg6 = makeAnotherReg(Type::IntTy); |
| 2845 | unsigned ShiftAmountReg = getReg (ShiftAmount, MBB, IP); |
| 2846 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2847 | if (isLeftShift) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2848 | BuildMI(*MBB, IP, PPC::SUBFIC, 2, TmpReg1).addReg(ShiftAmountReg) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2849 | .addSImm(32); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2850 | BuildMI(*MBB, IP, PPC::SLW, 2, TmpReg2).addReg(SrcReg) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2851 | .addReg(ShiftAmountReg); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2852 | BuildMI(*MBB, IP, PPC::SRW, 2, TmpReg3).addReg(SrcReg+1) |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 2853 | .addReg(TmpReg1); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2854 | BuildMI(*MBB, IP, PPC::OR, 2,TmpReg4).addReg(TmpReg2).addReg(TmpReg3); |
| 2855 | BuildMI(*MBB, IP, PPC::ADDI, 2, TmpReg5).addReg(ShiftAmountReg) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2856 | .addSImm(-32); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2857 | BuildMI(*MBB, IP, PPC::SLW, 2, TmpReg6).addReg(SrcReg+1) |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 2858 | .addReg(TmpReg5); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2859 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(TmpReg4) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2860 | .addReg(TmpReg6); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2861 | BuildMI(*MBB, IP, PPC::SLW, 2, DestReg+1).addReg(SrcReg+1) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2862 | .addReg(ShiftAmountReg); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2863 | } else { |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 2864 | if (isSigned) { // shift right algebraic |
| 2865 | MachineBasicBlock *TmpMBB =new MachineBasicBlock(BB->getBasicBlock()); |
| 2866 | MachineBasicBlock *PhiMBB =new MachineBasicBlock(BB->getBasicBlock()); |
| 2867 | MachineBasicBlock *OldMBB = BB; |
| 2868 | ilist<MachineBasicBlock>::iterator It = BB; ++It; |
| 2869 | F->getBasicBlockList().insert(It, TmpMBB); |
| 2870 | F->getBasicBlockList().insert(It, PhiMBB); |
| 2871 | BB->addSuccessor(TmpMBB); |
| 2872 | BB->addSuccessor(PhiMBB); |
| 2873 | |
| 2874 | BuildMI(*MBB, IP, PPC::SUBFIC, 2, TmpReg1).addReg(ShiftAmountReg) |
| 2875 | .addSImm(32); |
| 2876 | BuildMI(*MBB, IP, PPC::SRW, 2, TmpReg2).addReg(SrcReg+1) |
| 2877 | .addReg(ShiftAmountReg); |
| 2878 | BuildMI(*MBB, IP, PPC::SLW, 2, TmpReg3).addReg(SrcReg) |
| 2879 | .addReg(TmpReg1); |
| 2880 | BuildMI(*MBB, IP, PPC::OR, 2, TmpReg4).addReg(TmpReg2) |
| 2881 | .addReg(TmpReg3); |
| 2882 | BuildMI(*MBB, IP, PPC::ADDICo, 2, TmpReg5).addReg(ShiftAmountReg) |
| 2883 | .addSImm(-32); |
| 2884 | BuildMI(*MBB, IP, PPC::SRAW, 2, TmpReg6).addReg(SrcReg) |
| 2885 | .addReg(TmpReg5); |
| 2886 | BuildMI(*MBB, IP, PPC::SRAW, 2, DestReg).addReg(SrcReg) |
| 2887 | .addReg(ShiftAmountReg); |
| 2888 | BuildMI(*MBB, IP, PPC::BLE, 2).addReg(PPC::CR0).addMBB(PhiMBB); |
| 2889 | |
| 2890 | // OrMBB: |
| 2891 | // Select correct least significant half if the shift amount > 32 |
| 2892 | BB = TmpMBB; |
| 2893 | unsigned OrReg = makeAnotherReg(Type::IntTy); |
Chris Lattner | 35f2bbe | 2004-11-30 06:40:04 +0000 | [diff] [blame] | 2894 | BuildMI(BB, PPC::OR, 2, OrReg).addReg(TmpReg6).addReg(TmpReg6); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 2895 | TmpMBB->addSuccessor(PhiMBB); |
| 2896 | |
| 2897 | BB = PhiMBB; |
| 2898 | BuildMI(BB, PPC::PHI, 4, DestReg+1).addReg(TmpReg4).addMBB(OldMBB) |
| 2899 | .addReg(OrReg).addMBB(TmpMBB); |
| 2900 | } else { // shift right logical |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2901 | BuildMI(*MBB, IP, PPC::SUBFIC, 2, TmpReg1).addReg(ShiftAmountReg) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2902 | .addSImm(32); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2903 | BuildMI(*MBB, IP, PPC::SRW, 2, TmpReg2).addReg(SrcReg+1) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2904 | .addReg(ShiftAmountReg); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2905 | BuildMI(*MBB, IP, PPC::SLW, 2, TmpReg3).addReg(SrcReg) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2906 | .addReg(TmpReg1); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2907 | BuildMI(*MBB, IP, PPC::OR, 2, TmpReg4).addReg(TmpReg2) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2908 | .addReg(TmpReg3); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2909 | BuildMI(*MBB, IP, PPC::ADDI, 2, TmpReg5).addReg(ShiftAmountReg) |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 2910 | .addSImm(-32); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2911 | BuildMI(*MBB, IP, PPC::SRW, 2, TmpReg6).addReg(SrcReg) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2912 | .addReg(TmpReg5); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2913 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1).addReg(TmpReg4) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2914 | .addReg(TmpReg6); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2915 | BuildMI(*MBB, IP, PPC::SRW, 2, DestReg).addReg(SrcReg) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2916 | .addReg(ShiftAmountReg); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2917 | } |
| 2918 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2919 | } |
| 2920 | return; |
| 2921 | } |
| 2922 | |
| 2923 | if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(ShiftAmount)) { |
| 2924 | // The shift amount is constant, guaranteed to be a ubyte. Get its value. |
| 2925 | assert(CUI->getType() == Type::UByteTy && "Shift amount not a ubyte?"); |
| 2926 | unsigned Amount = CUI->getValue(); |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2927 | |
Nate Begeman | 905a291 | 2004-10-24 10:33:30 +0000 | [diff] [blame] | 2928 | // If this is a shift with one use, and that use is an And instruction, |
| 2929 | // then attempt to emit a bitfield operation. |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 2930 | if (SI && emitBitfieldInsert(SI, DestReg)) |
| 2931 | return; |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2932 | |
| 2933 | unsigned SrcReg = getReg (Op, MBB, IP); |
Chris Lattner | e74ed0d | 2004-11-30 06:36:11 +0000 | [diff] [blame] | 2934 | if (Amount == 0) { |
| 2935 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); |
| 2936 | } else if (isLeftShift) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2937 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2938 | .addImm(Amount).addImm(0).addImm(31-Amount); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2939 | } else { |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2940 | if (isSigned) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2941 | BuildMI(*MBB, IP, PPC::SRAWI,2,DestReg).addReg(SrcReg).addImm(Amount); |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2942 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2943 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2944 | .addImm(32-Amount).addImm(Amount).addImm(31); |
| 2945 | } |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2946 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2947 | } else { // The shift amount is non-constant. |
Nate Begeman | 1b75022 | 2004-10-17 05:19:20 +0000 | [diff] [blame] | 2948 | unsigned SrcReg = getReg (Op, MBB, IP); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2949 | unsigned ShiftAmountReg = getReg (ShiftAmount, MBB, IP); |
| 2950 | |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2951 | if (isLeftShift) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2952 | BuildMI(*MBB, IP, PPC::SLW, 2, DestReg).addReg(SrcReg) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2953 | .addReg(ShiftAmountReg); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2954 | } else { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2955 | BuildMI(*MBB, IP, isSigned ? PPC::SRAW : PPC::SRW, 2, DestReg) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 2956 | .addReg(SrcReg).addReg(ShiftAmountReg); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 2957 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2958 | } |
| 2959 | } |
| 2960 | |
Nate Begeman | 0e5e5f5 | 2004-08-22 08:10:15 +0000 | [diff] [blame] | 2961 | /// LoadNeedsSignExtend - On PowerPC, there is no load byte with sign extend. |
| 2962 | /// Therefore, if this is a byte load and the destination type is signed, we |
Nate Begeman | 35b020d | 2004-10-06 11:03:30 +0000 | [diff] [blame] | 2963 | /// would normally need to also emit a sign extend instruction after the load. |
Nate Begeman | 0e5e5f5 | 2004-08-22 08:10:15 +0000 | [diff] [blame] | 2964 | /// However, store instructions don't care whether a signed type was sign |
| 2965 | /// extended across a whole register. Also, a SetCC instruction will emit its |
| 2966 | /// own sign extension to force the value into the appropriate range, so we |
| 2967 | /// need not emit it here. Ideally, this kind of thing wouldn't be necessary |
| 2968 | /// once LLVM's type system is improved. |
| 2969 | static bool LoadNeedsSignExtend(LoadInst &LI) { |
| 2970 | if (cByte == getClassB(LI.getType()) && LI.getType()->isSigned()) { |
| 2971 | bool AllUsesAreStoresOrSetCC = true; |
Nate Begeman | 35b020d | 2004-10-06 11:03:30 +0000 | [diff] [blame] | 2972 | for (Value::use_iterator I = LI.use_begin(), E = LI.use_end(); I != E; ++I){ |
Chris Lattner | 7c348e1 | 2004-10-06 16:28:24 +0000 | [diff] [blame] | 2973 | if (isa<SetCondInst>(*I)) |
Nate Begeman | 35b020d | 2004-10-06 11:03:30 +0000 | [diff] [blame] | 2974 | continue; |
Chris Lattner | 7c348e1 | 2004-10-06 16:28:24 +0000 | [diff] [blame] | 2975 | if (StoreInst *SI = dyn_cast<StoreInst>(*I)) |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 2976 | if (cByte == getClassB(SI->getOperand(0)->getType())) |
Nate Begeman | 35b020d | 2004-10-06 11:03:30 +0000 | [diff] [blame] | 2977 | continue; |
| 2978 | AllUsesAreStoresOrSetCC = false; |
| 2979 | break; |
| 2980 | } |
Nate Begeman | 0e5e5f5 | 2004-08-22 08:10:15 +0000 | [diff] [blame] | 2981 | if (!AllUsesAreStoresOrSetCC) |
| 2982 | return true; |
| 2983 | } |
| 2984 | return false; |
| 2985 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2986 | |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 2987 | /// visitLoadInst - Implement LLVM load instructions. Pretty straightforward |
| 2988 | /// mapping of LLVM classes to PPC load instructions, with the exception of |
| 2989 | /// signed byte loads, which need a sign extension following them. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2990 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 2991 | void PPC32ISel::visitLoadInst(LoadInst &I) { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 2992 | // Immediate opcodes, for reg+imm addressing |
| 2993 | static const unsigned ImmOpcodes[] = { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2994 | PPC::LBZ, PPC::LHZ, PPC::LWZ, |
| 2995 | PPC::LFS, PPC::LFD, PPC::LWZ |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 2996 | }; |
| 2997 | // Indexed opcodes, for reg+reg addressing |
| 2998 | static const unsigned IdxOpcodes[] = { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 2999 | PPC::LBZX, PPC::LHZX, PPC::LWZX, |
| 3000 | PPC::LFSX, PPC::LFDX, PPC::LWZX |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 3001 | }; |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 3002 | |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3003 | unsigned Class = getClassB(I.getType()); |
| 3004 | unsigned ImmOpcode = ImmOpcodes[Class]; |
| 3005 | unsigned IdxOpcode = IdxOpcodes[Class]; |
| 3006 | unsigned DestReg = getReg(I); |
| 3007 | Value *SourceAddr = I.getOperand(0); |
| 3008 | |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3009 | if (Class == cShort && I.getType()->isSigned()) ImmOpcode = PPC::LHA; |
| 3010 | if (Class == cShort && I.getType()->isSigned()) IdxOpcode = PPC::LHAX; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3011 | |
Nate Begeman | 53e4aa5 | 2004-11-24 21:53:14 +0000 | [diff] [blame] | 3012 | // If this is a fixed size alloca, emit a load directly from the stack slot |
| 3013 | // corresponding to it. |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3014 | if (AllocaInst *AI = dyn_castFixedAlloca(SourceAddr)) { |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3015 | unsigned FI = getFixedSizedAllocaFI(AI); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3016 | if (Class == cLong) { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3017 | addFrameReference(BuildMI(BB, ImmOpcode, 2, DestReg), FI); |
| 3018 | addFrameReference(BuildMI(BB, ImmOpcode, 2, DestReg+1), FI, 4); |
Nate Begeman | 0e5e5f5 | 2004-08-22 08:10:15 +0000 | [diff] [blame] | 3019 | } else if (LoadNeedsSignExtend(I)) { |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 3020 | unsigned TmpReg = makeAnotherReg(I.getType()); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3021 | addFrameReference(BuildMI(BB, ImmOpcode, 2, TmpReg), FI); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3022 | BuildMI(BB, PPC::EXTSB, 1, DestReg).addReg(TmpReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3023 | } else { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3024 | addFrameReference(BuildMI(BB, ImmOpcode, 2, DestReg), FI); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3025 | } |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3026 | return; |
| 3027 | } |
| 3028 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3029 | // If the offset fits in 16 bits, we can emit a reg+imm load, otherwise, we |
| 3030 | // use the index from the FoldedGEP struct and use reg+reg addressing. |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3031 | if (GetElementPtrInst *GEPI = canFoldGEPIntoLoadOrStore(SourceAddr)) { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3032 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3033 | // Generate the code for the GEP and get the components of the folded GEP |
| 3034 | emitGEPOperation(BB, BB->end(), GEPI, true); |
| 3035 | unsigned baseReg = GEPMap[GEPI].base; |
| 3036 | unsigned indexReg = GEPMap[GEPI].index; |
| 3037 | ConstantSInt *offset = GEPMap[GEPI].offset; |
| 3038 | |
| 3039 | if (Class != cLong) { |
Nate Begeman | bc3a537 | 2004-11-19 08:01:16 +0000 | [diff] [blame] | 3040 | unsigned TmpReg = LoadNeedsSignExtend(I) ? makeAnotherReg(I.getType()) |
| 3041 | : DestReg; |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3042 | if (indexReg == 0) |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3043 | BuildMI(BB, ImmOpcode, 2, TmpReg).addSImm(offset->getValue()) |
| 3044 | .addReg(baseReg); |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3045 | else |
| 3046 | BuildMI(BB, IdxOpcode, 2, TmpReg).addReg(indexReg).addReg(baseReg); |
| 3047 | if (LoadNeedsSignExtend(I)) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3048 | BuildMI(BB, PPC::EXTSB, 1, DestReg).addReg(TmpReg); |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3049 | } else { |
| 3050 | indexReg = (indexReg != 0) ? indexReg : getReg(offset); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3051 | unsigned indexPlus4 = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3052 | BuildMI(BB, PPC::ADDI, 2, indexPlus4).addReg(indexReg).addSImm(4); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3053 | BuildMI(BB, IdxOpcode, 2, DestReg).addReg(indexReg).addReg(baseReg); |
| 3054 | BuildMI(BB, IdxOpcode, 2, DestReg+1).addReg(indexPlus4).addReg(baseReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3055 | } |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3056 | return; |
| 3057 | } |
| 3058 | |
| 3059 | // The fallback case, where the load was from a source that could not be |
| 3060 | // folded into the load instruction. |
| 3061 | unsigned SrcAddrReg = getReg(SourceAddr); |
| 3062 | |
| 3063 | if (Class == cLong) { |
| 3064 | BuildMI(BB, ImmOpcode, 2, DestReg).addSImm(0).addReg(SrcAddrReg); |
| 3065 | BuildMI(BB, ImmOpcode, 2, DestReg+1).addSImm(4).addReg(SrcAddrReg); |
Nate Begeman | 0e5e5f5 | 2004-08-22 08:10:15 +0000 | [diff] [blame] | 3066 | } else if (LoadNeedsSignExtend(I)) { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3067 | unsigned TmpReg = makeAnotherReg(I.getType()); |
| 3068 | BuildMI(BB, ImmOpcode, 2, TmpReg).addSImm(0).addReg(SrcAddrReg); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3069 | BuildMI(BB, PPC::EXTSB, 1, DestReg).addReg(TmpReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3070 | } else { |
| 3071 | BuildMI(BB, ImmOpcode, 2, DestReg).addSImm(0).addReg(SrcAddrReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3072 | } |
| 3073 | } |
| 3074 | |
| 3075 | /// visitStoreInst - Implement LLVM store instructions |
| 3076 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3077 | void PPC32ISel::visitStoreInst(StoreInst &I) { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3078 | // Immediate opcodes, for reg+imm addressing |
| 3079 | static const unsigned ImmOpcodes[] = { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3080 | PPC::STB, PPC::STH, PPC::STW, |
| 3081 | PPC::STFS, PPC::STFD, PPC::STW |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3082 | }; |
| 3083 | // Indexed opcodes, for reg+reg addressing |
| 3084 | static const unsigned IdxOpcodes[] = { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3085 | PPC::STBX, PPC::STHX, PPC::STWX, |
| 3086 | PPC::STFSX, PPC::STFDX, PPC::STWX |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3087 | }; |
| 3088 | |
| 3089 | Value *SourceAddr = I.getOperand(1); |
| 3090 | const Type *ValTy = I.getOperand(0)->getType(); |
| 3091 | unsigned Class = getClassB(ValTy); |
| 3092 | unsigned ImmOpcode = ImmOpcodes[Class]; |
| 3093 | unsigned IdxOpcode = IdxOpcodes[Class]; |
| 3094 | unsigned ValReg = getReg(I.getOperand(0)); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3095 | |
Nate Begeman | 53e4aa5 | 2004-11-24 21:53:14 +0000 | [diff] [blame] | 3096 | // If this is a fixed size alloca, emit a store directly to the stack slot |
| 3097 | // corresponding to it. |
| 3098 | if (AllocaInst *AI = dyn_castFixedAlloca(SourceAddr)) { |
| 3099 | unsigned FI = getFixedSizedAllocaFI(AI); |
| 3100 | addFrameReference(BuildMI(BB, ImmOpcode, 3).addReg(ValReg), FI); |
| 3101 | if (Class == cLong) |
| 3102 | addFrameReference(BuildMI(BB, ImmOpcode, 3).addReg(ValReg+1), FI, 4); |
| 3103 | return; |
| 3104 | } |
| 3105 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3106 | // If the offset fits in 16 bits, we can emit a reg+imm store, otherwise, we |
| 3107 | // use the index from the FoldedGEP struct and use reg+reg addressing. |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3108 | if (GetElementPtrInst *GEPI = canFoldGEPIntoLoadOrStore(SourceAddr)) { |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3109 | // Generate the code for the GEP and get the components of the folded GEP |
| 3110 | emitGEPOperation(BB, BB->end(), GEPI, true); |
| 3111 | unsigned baseReg = GEPMap[GEPI].base; |
| 3112 | unsigned indexReg = GEPMap[GEPI].index; |
| 3113 | ConstantSInt *offset = GEPMap[GEPI].offset; |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3114 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3115 | if (Class != cLong) { |
| 3116 | if (indexReg == 0) |
| 3117 | BuildMI(BB, ImmOpcode, 3).addReg(ValReg).addSImm(offset->getValue()) |
| 3118 | .addReg(baseReg); |
| 3119 | else |
| 3120 | BuildMI(BB, IdxOpcode, 3).addReg(ValReg).addReg(indexReg) |
| 3121 | .addReg(baseReg); |
| 3122 | } else { |
| 3123 | indexReg = (indexReg != 0) ? indexReg : getReg(offset); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3124 | unsigned indexPlus4 = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3125 | BuildMI(BB, PPC::ADDI, 2, indexPlus4).addReg(indexReg).addSImm(4); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3126 | BuildMI(BB, IdxOpcode, 3).addReg(ValReg).addReg(indexReg).addReg(baseReg); |
| 3127 | BuildMI(BB, IdxOpcode, 3).addReg(ValReg+1).addReg(indexPlus4) |
| 3128 | .addReg(baseReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3129 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3130 | return; |
| 3131 | } |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3132 | |
| 3133 | // If the store address wasn't the only use of a GEP, we fall back to the |
| 3134 | // standard path: store the ValReg at the value in AddressReg. |
| 3135 | unsigned AddressReg = getReg(I.getOperand(1)); |
| 3136 | if (Class == cLong) { |
| 3137 | BuildMI(BB, ImmOpcode, 3).addReg(ValReg).addSImm(0).addReg(AddressReg); |
| 3138 | BuildMI(BB, ImmOpcode, 3).addReg(ValReg+1).addSImm(4).addReg(AddressReg); |
| 3139 | return; |
| 3140 | } |
| 3141 | BuildMI(BB, ImmOpcode, 3).addReg(ValReg).addSImm(0).addReg(AddressReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3142 | } |
| 3143 | |
| 3144 | |
| 3145 | /// visitCastInst - Here we have various kinds of copying with or without sign |
| 3146 | /// extension going on. |
| 3147 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3148 | void PPC32ISel::visitCastInst(CastInst &CI) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3149 | Value *Op = CI.getOperand(0); |
| 3150 | |
| 3151 | unsigned SrcClass = getClassB(Op->getType()); |
| 3152 | unsigned DestClass = getClassB(CI.getType()); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3153 | |
Nate Begeman | 676dee6 | 2004-11-08 02:25:40 +0000 | [diff] [blame] | 3154 | // Noop casts are not emitted: getReg will return the source operand as the |
| 3155 | // register to use for any uses of the noop cast. |
| 3156 | if (DestClass == SrcClass) return; |
| 3157 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3158 | // If this is a cast from a 32-bit integer to a Long type, and the only uses |
Nate Begeman | 1e67d4d | 2004-08-19 08:07:50 +0000 | [diff] [blame] | 3159 | // of the cast are GEP instructions, then the cast does not need to be |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3160 | // generated explicitly, it will be folded into the GEP. |
| 3161 | if (DestClass == cLong && SrcClass == cInt) { |
| 3162 | bool AllUsesAreGEPs = true; |
| 3163 | for (Value::use_iterator I = CI.use_begin(), E = CI.use_end(); I != E; ++I) |
| 3164 | if (!isa<GetElementPtrInst>(*I)) { |
| 3165 | AllUsesAreGEPs = false; |
| 3166 | break; |
| 3167 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3168 | if (AllUsesAreGEPs) return; |
| 3169 | } |
Nate Begeman | 1e67d4d | 2004-08-19 08:07:50 +0000 | [diff] [blame] | 3170 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3171 | unsigned DestReg = getReg(CI); |
| 3172 | MachineBasicBlock::iterator MI = BB->end(); |
Nate Begeman | 1e67d4d | 2004-08-19 08:07:50 +0000 | [diff] [blame] | 3173 | |
Nate Begeman | 31dfc52 | 2004-10-23 00:50:23 +0000 | [diff] [blame] | 3174 | // If this is a cast from an integer type to a ubyte, with one use where the |
| 3175 | // use is the shift amount argument of a shift instruction, just emit a move |
| 3176 | // instead (since the shift instruction will only look at the low 5 bits |
| 3177 | // regardless of how it is sign extended) |
| 3178 | if (CI.getType() == Type::UByteTy && SrcClass <= cInt && CI.hasOneUse()) { |
| 3179 | ShiftInst *SI = dyn_cast<ShiftInst>(*(CI.use_begin())); |
| 3180 | if (SI && (SI->getOperand(1) == &CI)) { |
| 3181 | unsigned SrcReg = getReg(Op, BB, MI); |
| 3182 | BuildMI(*BB, MI, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); |
| 3183 | return; |
| 3184 | } |
| 3185 | } |
| 3186 | |
Nate Begeman | 1e67d4d | 2004-08-19 08:07:50 +0000 | [diff] [blame] | 3187 | // If this is a cast from an byte, short, or int to an integer type of equal |
| 3188 | // or lesser width, and all uses of the cast are store instructions then dont |
| 3189 | // emit them, as the store instruction will implicitly not store the zero or |
| 3190 | // sign extended bytes. |
| 3191 | if (SrcClass <= cInt && SrcClass >= DestClass) { |
Nate Begeman | 075cdc6 | 2004-11-07 20:23:42 +0000 | [diff] [blame] | 3192 | bool AllUsesAreStores = true; |
Nate Begeman | 1e67d4d | 2004-08-19 08:07:50 +0000 | [diff] [blame] | 3193 | for (Value::use_iterator I = CI.use_begin(), E = CI.use_end(); I != E; ++I) |
Nate Begeman | 075cdc6 | 2004-11-07 20:23:42 +0000 | [diff] [blame] | 3194 | if (!isa<StoreInst>(*I)) { |
| 3195 | AllUsesAreStores = false; |
Nate Begeman | 1e67d4d | 2004-08-19 08:07:50 +0000 | [diff] [blame] | 3196 | break; |
| 3197 | } |
| 3198 | // Turn this cast directly into a move instruction, which the register |
| 3199 | // allocator will deal with. |
Nate Begeman | 075cdc6 | 2004-11-07 20:23:42 +0000 | [diff] [blame] | 3200 | if (AllUsesAreStores) { |
Nate Begeman | 1e67d4d | 2004-08-19 08:07:50 +0000 | [diff] [blame] | 3201 | unsigned SrcReg = getReg(Op, BB, MI); |
| 3202 | BuildMI(*BB, MI, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); |
| 3203 | return; |
| 3204 | } |
| 3205 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3206 | emitCastOperation(BB, MI, Op, CI.getType(), DestReg); |
| 3207 | } |
| 3208 | |
| 3209 | /// emitCastOperation - Common code shared between visitCastInst and constant |
| 3210 | /// expression cast support. |
| 3211 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3212 | void PPC32ISel::emitCastOperation(MachineBasicBlock *MBB, |
| 3213 | MachineBasicBlock::iterator IP, |
| 3214 | Value *Src, const Type *DestTy, |
| 3215 | unsigned DestReg) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3216 | const Type *SrcTy = Src->getType(); |
| 3217 | unsigned SrcClass = getClassB(SrcTy); |
| 3218 | unsigned DestClass = getClassB(DestTy); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3219 | unsigned SrcReg = getReg(Src, MBB, IP); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3220 | |
Nate Begeman | 0797d49 | 2004-10-20 21:55:41 +0000 | [diff] [blame] | 3221 | // Implement casts from bool to integer types as a move operation |
| 3222 | if (SrcTy == Type::BoolTy) { |
| 3223 | switch (DestClass) { |
| 3224 | case cByte: |
| 3225 | case cShort: |
| 3226 | case cInt: |
| 3227 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); |
| 3228 | return; |
| 3229 | case cLong: |
| 3230 | BuildMI(*MBB, IP, PPC::LI, 1, DestReg).addImm(0); |
| 3231 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1).addReg(SrcReg).addReg(SrcReg); |
| 3232 | return; |
| 3233 | default: |
| 3234 | break; |
| 3235 | } |
| 3236 | } |
| 3237 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3238 | // Implement casts to bool by using compare on the operand followed by set if |
| 3239 | // not zero on the result. |
| 3240 | if (DestTy == Type::BoolTy) { |
| 3241 | switch (SrcClass) { |
| 3242 | case cByte: |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3243 | case cShort: |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3244 | case cInt: { |
| 3245 | unsigned TmpReg = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3246 | BuildMI(*MBB, IP, PPC::ADDIC, 2, TmpReg).addReg(SrcReg).addSImm(-1); |
| 3247 | BuildMI(*MBB, IP, PPC::SUBFE, 2, DestReg).addReg(TmpReg).addReg(SrcReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3248 | break; |
| 3249 | } |
| 3250 | case cLong: { |
| 3251 | unsigned TmpReg = makeAnotherReg(Type::IntTy); |
| 3252 | unsigned SrcReg2 = makeAnotherReg(Type::IntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3253 | BuildMI(*MBB, IP, PPC::OR, 2, SrcReg2).addReg(SrcReg).addReg(SrcReg+1); |
| 3254 | BuildMI(*MBB, IP, PPC::ADDIC, 2, TmpReg).addReg(SrcReg2).addSImm(-1); |
| 3255 | BuildMI(*MBB, IP, PPC::SUBFE, 2, DestReg).addReg(TmpReg) |
Misha Brukman | bf417a6 | 2004-07-20 20:43:05 +0000 | [diff] [blame] | 3256 | .addReg(SrcReg2); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3257 | break; |
| 3258 | } |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3259 | case cFP32: |
| 3260 | case cFP64: |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3261 | unsigned TmpReg = makeAnotherReg(Type::IntTy); |
| 3262 | unsigned ConstZero = getReg(ConstantFP::get(Type::DoubleTy, 0.0), BB, IP); |
| 3263 | BuildMI(*MBB, IP, PPC::FCMPU, PPC::CR7).addReg(SrcReg).addReg(ConstZero); |
| 3264 | BuildMI(*MBB, IP, PPC::MFCR, TmpReg); |
| 3265 | BuildMI(*MBB, IP, PPC::RLWINM, DestReg).addReg(TmpReg).addImm(31) |
| 3266 | .addImm(31).addImm(31); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3267 | } |
| 3268 | return; |
| 3269 | } |
| 3270 | |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3271 | // Handle cast of Float -> Double |
| 3272 | if (SrcClass == cFP32 && DestClass == cFP64) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3273 | BuildMI(*MBB, IP, PPC::FMR, 1, DestReg).addReg(SrcReg); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3274 | return; |
| 3275 | } |
| 3276 | |
| 3277 | // Handle cast of Double -> Float |
| 3278 | if (SrcClass == cFP64 && DestClass == cFP32) { |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3279 | BuildMI(*MBB, IP, PPC::FRSP, 1, DestReg).addReg(SrcReg); |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3280 | return; |
| 3281 | } |
| 3282 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3283 | // Handle casts from integer to floating point now... |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3284 | if (DestClass == cFP32 || DestClass == cFP64) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3285 | |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3286 | // Emit a library call for long to float conversion |
| 3287 | if (SrcClass == cLong) { |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3288 | Function *floatFn = (DestClass == cFP32) ? __floatdisfFn : __floatdidfFn; |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3289 | if (SrcTy->isSigned()) { |
| 3290 | std::vector<ValueRecord> Args; |
| 3291 | Args.push_back(ValueRecord(SrcReg, SrcTy)); |
| 3292 | MachineInstr *TheCall = |
| 3293 | BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(floatFn, true); |
| 3294 | doCall(ValueRecord(DestReg, DestTy), TheCall, Args, false); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3295 | } else { |
| 3296 | std::vector<ValueRecord> CmpArgs, ClrArgs, SetArgs; |
| 3297 | unsigned ZeroLong = getReg(ConstantUInt::get(SrcTy, 0)); |
| 3298 | unsigned CondReg = makeAnotherReg(Type::IntTy); |
| 3299 | |
| 3300 | // Update machine-CFG edges |
| 3301 | MachineBasicBlock *ClrMBB = new MachineBasicBlock(BB->getBasicBlock()); |
| 3302 | MachineBasicBlock *SetMBB = new MachineBasicBlock(BB->getBasicBlock()); |
| 3303 | MachineBasicBlock *PhiMBB = new MachineBasicBlock(BB->getBasicBlock()); |
| 3304 | MachineBasicBlock *OldMBB = BB; |
| 3305 | ilist<MachineBasicBlock>::iterator It = BB; ++It; |
| 3306 | F->getBasicBlockList().insert(It, ClrMBB); |
| 3307 | F->getBasicBlockList().insert(It, SetMBB); |
| 3308 | F->getBasicBlockList().insert(It, PhiMBB); |
| 3309 | BB->addSuccessor(ClrMBB); |
| 3310 | BB->addSuccessor(SetMBB); |
| 3311 | |
| 3312 | CmpArgs.push_back(ValueRecord(SrcReg, SrcTy)); |
| 3313 | CmpArgs.push_back(ValueRecord(ZeroLong, SrcTy)); |
| 3314 | MachineInstr *TheCall = |
| 3315 | BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(__cmpdi2Fn, true); |
| 3316 | doCall(ValueRecord(CondReg, Type::IntTy), TheCall, CmpArgs, false); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3317 | BuildMI(*MBB, IP, PPC::CMPWI, 2, PPC::CR0).addReg(CondReg).addSImm(0); |
| 3318 | BuildMI(*MBB, IP, PPC::BLE, 2).addReg(PPC::CR0).addMBB(SetMBB); |
| 3319 | |
| 3320 | // ClrMBB |
| 3321 | BB = ClrMBB; |
| 3322 | unsigned ClrReg = makeAnotherReg(DestTy); |
| 3323 | ClrArgs.push_back(ValueRecord(SrcReg, SrcTy)); |
| 3324 | TheCall = BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(floatFn, true); |
| 3325 | doCall(ValueRecord(ClrReg, DestTy), TheCall, ClrArgs, false); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3326 | BuildMI(BB, PPC::B, 1).addMBB(PhiMBB); |
| 3327 | BB->addSuccessor(PhiMBB); |
| 3328 | |
| 3329 | // SetMBB |
| 3330 | BB = SetMBB; |
| 3331 | unsigned SetReg = makeAnotherReg(DestTy); |
| 3332 | unsigned CallReg = makeAnotherReg(DestTy); |
| 3333 | unsigned ShiftedReg = makeAnotherReg(SrcTy); |
| 3334 | ConstantSInt *Const1 = ConstantSInt::get(Type::IntTy, 1); |
Nate Begeman | 9b508c3 | 2004-10-26 03:48:25 +0000 | [diff] [blame] | 3335 | emitShiftOperation(BB, BB->end(), Src, Const1, false, SrcTy, 0, |
| 3336 | ShiftedReg); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3337 | SetArgs.push_back(ValueRecord(ShiftedReg, SrcTy)); |
| 3338 | TheCall = BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(floatFn, true); |
| 3339 | doCall(ValueRecord(CallReg, DestTy), TheCall, SetArgs, false); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3340 | unsigned SetOpcode = (DestClass == cFP32) ? PPC::FADDS : PPC::FADD; |
| 3341 | BuildMI(BB, SetOpcode, 2, SetReg).addReg(CallReg).addReg(CallReg); |
| 3342 | BB->addSuccessor(PhiMBB); |
| 3343 | |
| 3344 | // PhiMBB |
| 3345 | BB = PhiMBB; |
| 3346 | BuildMI(BB, PPC::PHI, 4, DestReg).addReg(ClrReg).addMBB(ClrMBB) |
| 3347 | .addReg(SetReg).addMBB(SetMBB); |
| 3348 | } |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3349 | return; |
| 3350 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3351 | |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3352 | // Make sure we're dealing with a full 32 bits |
Nate Begeman | 8531f6f | 2004-11-19 02:06:40 +0000 | [diff] [blame] | 3353 | if (SrcClass < cInt) { |
| 3354 | unsigned TmpReg = makeAnotherReg(Type::IntTy); |
| 3355 | promote32(TmpReg, ValueRecord(SrcReg, SrcTy)); |
| 3356 | SrcReg = TmpReg; |
| 3357 | } |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3358 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3359 | // Spill the integer to memory and reload it from there. |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3360 | // Also spill room for a special conversion constant |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3361 | int ValueFrameIdx = |
| 3362 | F->getFrameInfo()->CreateStackObject(Type::DoubleTy, TM.getTargetData()); |
| 3363 | |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3364 | unsigned constantHi = makeAnotherReg(Type::IntTy); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3365 | unsigned TempF = makeAnotherReg(Type::DoubleTy); |
| 3366 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3367 | if (!SrcTy->isSigned()) { |
Nate Begeman | 81d265d | 2004-08-19 05:20:54 +0000 | [diff] [blame] | 3368 | ConstantFP *CFP = ConstantFP::get(Type::DoubleTy, 0x1.000000p52); |
| 3369 | unsigned ConstF = getReg(CFP, BB, IP); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3370 | BuildMI(*MBB, IP, PPC::LIS, 1, constantHi).addSImm(0x4330); |
| 3371 | addFrameReference(BuildMI(*MBB, IP, PPC::STW, 3).addReg(constantHi), |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 3372 | ValueFrameIdx); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3373 | addFrameReference(BuildMI(*MBB, IP, PPC::STW, 3).addReg(SrcReg), |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 3374 | ValueFrameIdx, 4); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3375 | addFrameReference(BuildMI(*MBB, IP, PPC::LFD, 2, TempF), ValueFrameIdx); |
| 3376 | BuildMI(*MBB, IP, PPC::FSUB, 2, DestReg).addReg(TempF).addReg(ConstF); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3377 | } else { |
Nate Begeman | 81d265d | 2004-08-19 05:20:54 +0000 | [diff] [blame] | 3378 | ConstantFP *CFP = ConstantFP::get(Type::DoubleTy, 0x1.000008p52); |
| 3379 | unsigned ConstF = getReg(CFP, BB, IP); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3380 | unsigned TempLo = makeAnotherReg(Type::IntTy); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3381 | BuildMI(*MBB, IP, PPC::LIS, 1, constantHi).addSImm(0x4330); |
| 3382 | addFrameReference(BuildMI(*MBB, IP, PPC::STW, 3).addReg(constantHi), |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 3383 | ValueFrameIdx); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3384 | BuildMI(*MBB, IP, PPC::XORIS, 2, TempLo).addReg(SrcReg).addImm(0x8000); |
| 3385 | addFrameReference(BuildMI(*MBB, IP, PPC::STW, 3).addReg(TempLo), |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 3386 | ValueFrameIdx, 4); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3387 | addFrameReference(BuildMI(*MBB, IP, PPC::LFD, 2, TempF), ValueFrameIdx); |
| 3388 | BuildMI(*MBB, IP, PPC::FSUB, 2, DestReg).addReg(TempF).addReg(ConstF); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3389 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3390 | return; |
| 3391 | } |
| 3392 | |
| 3393 | // Handle casts from floating point to integer now... |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3394 | if (SrcClass == cFP32 || SrcClass == cFP64) { |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 3395 | static Function* const Funcs[] = |
| 3396 | { __fixsfdiFn, __fixdfdiFn, __fixunssfdiFn, __fixunsdfdiFn }; |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3397 | // emit library call |
| 3398 | if (DestClass == cLong) { |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 3399 | bool isDouble = SrcClass == cFP64; |
| 3400 | unsigned nameIndex = 2 * DestTy->isSigned() + isDouble; |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3401 | std::vector<ValueRecord> Args; |
| 3402 | Args.push_back(ValueRecord(SrcReg, SrcTy)); |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 3403 | Function *floatFn = Funcs[nameIndex]; |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 3404 | MachineInstr *TheCall = |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3405 | BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(floatFn, true); |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 3406 | doCall(ValueRecord(DestReg, DestTy), TheCall, Args, false); |
Misha Brukman | 422791f | 2004-06-21 17:41:12 +0000 | [diff] [blame] | 3407 | return; |
| 3408 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3409 | |
| 3410 | int ValueFrameIdx = |
Nate Begeman | 43d64ea | 2004-08-15 06:42:28 +0000 | [diff] [blame] | 3411 | F->getFrameInfo()->CreateStackObject(Type::DoubleTy, TM.getTargetData()); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3412 | |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3413 | if (DestTy->isSigned()) { |
Misha Brukman | 4c14f33 | 2004-07-23 01:11:19 +0000 | [diff] [blame] | 3414 | unsigned TempReg = makeAnotherReg(Type::DoubleTy); |
| 3415 | |
| 3416 | // Convert to integer in the FP reg and store it to a stack slot |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3417 | BuildMI(*MBB, IP, PPC::FCTIWZ, 1, TempReg).addReg(SrcReg); |
| 3418 | addFrameReference(BuildMI(*MBB, IP, PPC::STFD, 3) |
Misha Brukman | 4c14f33 | 2004-07-23 01:11:19 +0000 | [diff] [blame] | 3419 | .addReg(TempReg), ValueFrameIdx); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3420 | |
| 3421 | // There is no load signed byte opcode, so we must emit a sign extend for |
| 3422 | // that particular size. Make sure to source the new integer from the |
| 3423 | // correct offset. |
Misha Brukman | 4c14f33 | 2004-07-23 01:11:19 +0000 | [diff] [blame] | 3424 | if (DestClass == cByte) { |
| 3425 | unsigned TempReg2 = makeAnotherReg(DestTy); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3426 | addFrameReference(BuildMI(*MBB, IP, PPC::LBZ, 2, TempReg2), |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3427 | ValueFrameIdx, 7); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3428 | BuildMI(*MBB, IP, PPC::EXTSB, 1, DestReg).addReg(TempReg2); |
Misha Brukman | 4c14f33 | 2004-07-23 01:11:19 +0000 | [diff] [blame] | 3429 | } else { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3430 | int offset = (DestClass == cShort) ? 6 : 4; |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3431 | unsigned LoadOp = (DestClass == cShort) ? PPC::LHA : PPC::LWZ; |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3432 | addFrameReference(BuildMI(*MBB, IP, LoadOp, 2, DestReg), |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3433 | ValueFrameIdx, offset); |
Misha Brukman | 4c14f33 | 2004-07-23 01:11:19 +0000 | [diff] [blame] | 3434 | } |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3435 | } else { |
Misha Brukman | b160d1f | 2004-07-23 20:32:59 +0000 | [diff] [blame] | 3436 | unsigned Zero = getReg(ConstantFP::get(Type::DoubleTy, 0.0f)); |
| 3437 | double maxInt = (1LL << 32) - 1; |
| 3438 | unsigned MaxInt = getReg(ConstantFP::get(Type::DoubleTy, maxInt)); |
| 3439 | double border = 1LL << 31; |
| 3440 | unsigned Border = getReg(ConstantFP::get(Type::DoubleTy, border)); |
| 3441 | unsigned UseZero = makeAnotherReg(Type::DoubleTy); |
| 3442 | unsigned UseMaxInt = makeAnotherReg(Type::DoubleTy); |
| 3443 | unsigned UseChoice = makeAnotherReg(Type::DoubleTy); |
| 3444 | unsigned TmpReg = makeAnotherReg(Type::DoubleTy); |
| 3445 | unsigned TmpReg2 = makeAnotherReg(Type::DoubleTy); |
| 3446 | unsigned ConvReg = makeAnotherReg(Type::DoubleTy); |
| 3447 | unsigned IntTmp = makeAnotherReg(Type::IntTy); |
| 3448 | unsigned XorReg = makeAnotherReg(Type::IntTy); |
| 3449 | int FrameIdx = |
| 3450 | F->getFrameInfo()->CreateStackObject(SrcTy, TM.getTargetData()); |
| 3451 | // Update machine-CFG edges |
| 3452 | MachineBasicBlock *XorMBB = new MachineBasicBlock(BB->getBasicBlock()); |
| 3453 | MachineBasicBlock *PhiMBB = new MachineBasicBlock(BB->getBasicBlock()); |
| 3454 | MachineBasicBlock *OldMBB = BB; |
| 3455 | ilist<MachineBasicBlock>::iterator It = BB; ++It; |
| 3456 | F->getBasicBlockList().insert(It, XorMBB); |
| 3457 | F->getBasicBlockList().insert(It, PhiMBB); |
| 3458 | BB->addSuccessor(XorMBB); |
| 3459 | BB->addSuccessor(PhiMBB); |
| 3460 | |
| 3461 | // Convert from floating point to unsigned 32-bit value |
| 3462 | // Use 0 if incoming value is < 0.0 |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3463 | BuildMI(*MBB, IP, PPC::FSEL, 3, UseZero).addReg(SrcReg).addReg(SrcReg) |
Misha Brukman | b160d1f | 2004-07-23 20:32:59 +0000 | [diff] [blame] | 3464 | .addReg(Zero); |
| 3465 | // Use 2**32 - 1 if incoming value is >= 2**32 |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3466 | BuildMI(*MBB, IP, PPC::FSUB, 2, UseMaxInt).addReg(MaxInt).addReg(SrcReg); |
| 3467 | BuildMI(*MBB, IP, PPC::FSEL, 3, UseChoice).addReg(UseMaxInt) |
Misha Brukman | b160d1f | 2004-07-23 20:32:59 +0000 | [diff] [blame] | 3468 | .addReg(UseZero).addReg(MaxInt); |
| 3469 | // Subtract 2**31 |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3470 | BuildMI(*MBB, IP, PPC::FSUB, 2, TmpReg).addReg(UseChoice).addReg(Border); |
Misha Brukman | b160d1f | 2004-07-23 20:32:59 +0000 | [diff] [blame] | 3471 | // Use difference if >= 2**31 |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3472 | BuildMI(*MBB, IP, PPC::FCMPU, 2, PPC::CR0).addReg(UseChoice) |
Misha Brukman | b160d1f | 2004-07-23 20:32:59 +0000 | [diff] [blame] | 3473 | .addReg(Border); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3474 | BuildMI(*MBB, IP, PPC::FSEL, 3, TmpReg2).addReg(TmpReg).addReg(TmpReg) |
Misha Brukman | b160d1f | 2004-07-23 20:32:59 +0000 | [diff] [blame] | 3475 | .addReg(UseChoice); |
| 3476 | // Convert to integer |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3477 | BuildMI(*MBB, IP, PPC::FCTIWZ, 1, ConvReg).addReg(TmpReg2); |
| 3478 | addFrameReference(BuildMI(*MBB, IP, PPC::STFD, 3).addReg(ConvReg), |
Misha Brukman | b160d1f | 2004-07-23 20:32:59 +0000 | [diff] [blame] | 3479 | FrameIdx); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3480 | if (DestClass == cByte) { |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3481 | addFrameReference(BuildMI(*MBB, IP, PPC::LBZ, 2, DestReg), |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3482 | FrameIdx, 7); |
| 3483 | } else if (DestClass == cShort) { |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3484 | addFrameReference(BuildMI(*MBB, IP, PPC::LHZ, 2, DestReg), |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3485 | FrameIdx, 6); |
| 3486 | } if (DestClass == cInt) { |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3487 | addFrameReference(BuildMI(*MBB, IP, PPC::LWZ, 2, IntTmp), |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3488 | FrameIdx, 4); |
Nate Begeman | f2f0781 | 2004-08-29 08:19:32 +0000 | [diff] [blame] | 3489 | BuildMI(*MBB, IP, PPC::BLT, 2).addReg(PPC::CR0).addMBB(PhiMBB); |
| 3490 | BuildMI(*MBB, IP, PPC::B, 1).addMBB(XorMBB); |
Misha Brukman | b160d1f | 2004-07-23 20:32:59 +0000 | [diff] [blame] | 3491 | |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3492 | // XorMBB: |
| 3493 | // add 2**31 if input was >= 2**31 |
| 3494 | BB = XorMBB; |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3495 | BuildMI(BB, PPC::XORIS, 2, XorReg).addReg(IntTmp).addImm(0x8000); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3496 | XorMBB->addSuccessor(PhiMBB); |
Misha Brukman | b160d1f | 2004-07-23 20:32:59 +0000 | [diff] [blame] | 3497 | |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3498 | // PhiMBB: |
| 3499 | // DestReg = phi [ IntTmp, OldMBB ], [ XorReg, XorMBB ] |
| 3500 | BB = PhiMBB; |
Misha Brukman | d2cbb87 | 2004-08-19 21:00:12 +0000 | [diff] [blame] | 3501 | BuildMI(BB, PPC::PHI, 4, DestReg).addReg(IntTmp).addMBB(OldMBB) |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3502 | .addReg(XorReg).addMBB(XorMBB); |
| 3503 | } |
| 3504 | } |
| 3505 | return; |
| 3506 | } |
| 3507 | |
| 3508 | // Check our invariants |
| 3509 | assert((SrcClass <= cInt || SrcClass == cLong) && |
| 3510 | "Unhandled source class for cast operation!"); |
| 3511 | assert((DestClass <= cInt || DestClass == cLong) && |
| 3512 | "Unhandled destination class for cast operation!"); |
| 3513 | |
| 3514 | bool sourceUnsigned = SrcTy->isUnsigned() || SrcTy == Type::BoolTy; |
| 3515 | bool destUnsigned = DestTy->isUnsigned(); |
| 3516 | |
| 3517 | // Unsigned -> Unsigned, clear if larger, |
| 3518 | if (sourceUnsigned && destUnsigned) { |
| 3519 | // handle long dest class now to keep switch clean |
| 3520 | if (DestClass == cLong) { |
Nate Begeman | 8531f6f | 2004-11-19 02:06:40 +0000 | [diff] [blame] | 3521 | BuildMI(*MBB, IP, PPC::LI, 1, DestReg).addSImm(0); |
| 3522 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1).addReg(SrcReg) |
| 3523 | .addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3524 | return; |
| 3525 | } |
| 3526 | |
| 3527 | // handle u{ byte, short, int } x u{ byte, short, int } |
| 3528 | unsigned clearBits = (SrcClass == cByte || DestClass == cByte) ? 24 : 16; |
| 3529 | switch (SrcClass) { |
| 3530 | case cByte: |
| 3531 | case cShort: |
Nate Begeman | 8531f6f | 2004-11-19 02:06:40 +0000 | [diff] [blame] | 3532 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg) |
| 3533 | .addImm(0).addImm(clearBits).addImm(31); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3534 | break; |
| 3535 | case cLong: |
| 3536 | ++SrcReg; |
| 3537 | // Fall through |
| 3538 | case cInt: |
Nate Begeman | 8531f6f | 2004-11-19 02:06:40 +0000 | [diff] [blame] | 3539 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg) |
| 3540 | .addImm(0).addImm(clearBits).addImm(31); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3541 | break; |
| 3542 | } |
| 3543 | return; |
| 3544 | } |
| 3545 | |
| 3546 | // Signed -> Signed |
| 3547 | if (!sourceUnsigned && !destUnsigned) { |
| 3548 | // handle long dest class now to keep switch clean |
| 3549 | if (DestClass == cLong) { |
Nate Begeman | 8531f6f | 2004-11-19 02:06:40 +0000 | [diff] [blame] | 3550 | BuildMI(*MBB, IP, PPC::SRAWI, 2, DestReg).addReg(SrcReg).addImm(31); |
| 3551 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1).addReg(SrcReg) |
| 3552 | .addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3553 | return; |
| 3554 | } |
| 3555 | |
| 3556 | // handle { byte, short, int } x { byte, short, int } |
| 3557 | switch (SrcClass) { |
| 3558 | case cByte: |
Nate Begeman | 0113638 | 2004-11-18 04:56:53 +0000 | [diff] [blame] | 3559 | BuildMI(*MBB, IP, PPC::EXTSB, 1, DestReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3560 | break; |
| 3561 | case cShort: |
| 3562 | if (DestClass == cByte) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3563 | BuildMI(*MBB, IP, PPC::EXTSB, 1, DestReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3564 | else |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3565 | BuildMI(*MBB, IP, PPC::EXTSH, 1, DestReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3566 | break; |
| 3567 | case cLong: |
| 3568 | ++SrcReg; |
| 3569 | // Fall through |
| 3570 | case cInt: |
| 3571 | if (DestClass == cByte) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3572 | BuildMI(*MBB, IP, PPC::EXTSB, 1, DestReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3573 | else if (DestClass == cShort) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3574 | BuildMI(*MBB, IP, PPC::EXTSH, 1, DestReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3575 | else |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3576 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3577 | break; |
| 3578 | } |
| 3579 | return; |
| 3580 | } |
| 3581 | |
| 3582 | // Unsigned -> Signed |
| 3583 | if (sourceUnsigned && !destUnsigned) { |
| 3584 | // handle long dest class now to keep switch clean |
| 3585 | if (DestClass == cLong) { |
Nate Begeman | 8531f6f | 2004-11-19 02:06:40 +0000 | [diff] [blame] | 3586 | BuildMI(*MBB, IP, PPC::LI, 1, DestReg).addSImm(0); |
| 3587 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1).addReg(SrcReg) |
| 3588 | .addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3589 | return; |
| 3590 | } |
| 3591 | |
| 3592 | // handle u{ byte, short, int } -> { byte, short, int } |
| 3593 | switch (SrcClass) { |
| 3594 | case cByte: |
Nate Begeman | 0113638 | 2004-11-18 04:56:53 +0000 | [diff] [blame] | 3595 | // uByte 255 -> signed short/int == 255 |
| 3596 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg).addImm(0) |
| 3597 | .addImm(24).addImm(31); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3598 | break; |
| 3599 | case cShort: |
| 3600 | if (DestClass == cByte) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3601 | BuildMI(*MBB, IP, PPC::EXTSB, 1, DestReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3602 | else |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3603 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg).addImm(0) |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3604 | .addImm(16).addImm(31); |
| 3605 | break; |
| 3606 | case cLong: |
| 3607 | ++SrcReg; |
| 3608 | // Fall through |
| 3609 | case cInt: |
| 3610 | if (DestClass == cByte) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3611 | BuildMI(*MBB, IP, PPC::EXTSB, 1, DestReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3612 | else if (DestClass == cShort) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3613 | BuildMI(*MBB, IP, PPC::EXTSH, 1, DestReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3614 | else |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3615 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3616 | break; |
| 3617 | } |
| 3618 | return; |
| 3619 | } |
| 3620 | |
| 3621 | // Signed -> Unsigned |
| 3622 | if (!sourceUnsigned && destUnsigned) { |
| 3623 | // handle long dest class now to keep switch clean |
| 3624 | if (DestClass == cLong) { |
Nate Begeman | 8531f6f | 2004-11-19 02:06:40 +0000 | [diff] [blame] | 3625 | BuildMI(*MBB, IP, PPC::SRAWI, 2, DestReg).addReg(SrcReg).addImm(31); |
| 3626 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1).addReg(SrcReg) |
| 3627 | .addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3628 | return; |
| 3629 | } |
| 3630 | |
| 3631 | // handle { byte, short, int } -> u{ byte, short, int } |
| 3632 | unsigned clearBits = (DestClass == cByte) ? 24 : 16; |
| 3633 | switch (SrcClass) { |
| 3634 | case cByte: |
Nate Begeman | 0113638 | 2004-11-18 04:56:53 +0000 | [diff] [blame] | 3635 | BuildMI(*MBB, IP, PPC::EXTSB, 1, DestReg).addReg(SrcReg); |
| 3636 | break; |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3637 | case cShort: |
Nate Begeman | 0113638 | 2004-11-18 04:56:53 +0000 | [diff] [blame] | 3638 | if (DestClass == cByte) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3639 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg) |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3640 | .addImm(0).addImm(clearBits).addImm(31); |
| 3641 | else |
Nate Begeman | 0113638 | 2004-11-18 04:56:53 +0000 | [diff] [blame] | 3642 | BuildMI(*MBB, IP, PPC::EXTSH, 1, DestReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3643 | break; |
| 3644 | case cLong: |
| 3645 | ++SrcReg; |
| 3646 | // Fall through |
| 3647 | case cInt: |
| 3648 | if (DestClass == cInt) |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3649 | BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3650 | else |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3651 | BuildMI(*MBB, IP, PPC::RLWINM, 4, DestReg).addReg(SrcReg) |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3652 | .addImm(0).addImm(clearBits).addImm(31); |
| 3653 | break; |
Misha Brukman | 7e898c3 | 2004-07-20 00:41:46 +0000 | [diff] [blame] | 3654 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3655 | return; |
| 3656 | } |
| 3657 | |
| 3658 | // Anything we haven't handled already, we can't (yet) handle at all. |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3659 | std::cerr << "Unhandled cast from " << SrcTy->getDescription() |
| 3660 | << "to " << DestTy->getDescription() << '\n'; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3661 | abort(); |
| 3662 | } |
| 3663 | |
| 3664 | /// visitVANextInst - Implement the va_next instruction... |
| 3665 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3666 | void PPC32ISel::visitVANextInst(VANextInst &I) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3667 | unsigned VAList = getReg(I.getOperand(0)); |
| 3668 | unsigned DestReg = getReg(I); |
| 3669 | |
| 3670 | unsigned Size; |
Misha Brukman | 358829f | 2004-06-21 17:25:55 +0000 | [diff] [blame] | 3671 | switch (I.getArgType()->getTypeID()) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3672 | default: |
| 3673 | std::cerr << I; |
| 3674 | assert(0 && "Error: bad type for va_next instruction!"); |
| 3675 | return; |
| 3676 | case Type::PointerTyID: |
| 3677 | case Type::UIntTyID: |
| 3678 | case Type::IntTyID: |
| 3679 | Size = 4; |
| 3680 | break; |
| 3681 | case Type::ULongTyID: |
| 3682 | case Type::LongTyID: |
| 3683 | case Type::DoubleTyID: |
| 3684 | Size = 8; |
| 3685 | break; |
| 3686 | } |
| 3687 | |
| 3688 | // Increment the VAList pointer... |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3689 | BuildMI(BB, PPC::ADDI, 2, DestReg).addReg(VAList).addSImm(Size); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3690 | } |
| 3691 | |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3692 | void PPC32ISel::visitVAArgInst(VAArgInst &I) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3693 | unsigned VAList = getReg(I.getOperand(0)); |
| 3694 | unsigned DestReg = getReg(I); |
| 3695 | |
Misha Brukman | 358829f | 2004-06-21 17:25:55 +0000 | [diff] [blame] | 3696 | switch (I.getType()->getTypeID()) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3697 | default: |
| 3698 | std::cerr << I; |
| 3699 | assert(0 && "Error: bad type for va_next instruction!"); |
| 3700 | return; |
| 3701 | case Type::PointerTyID: |
| 3702 | case Type::UIntTyID: |
| 3703 | case Type::IntTyID: |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3704 | BuildMI(BB, PPC::LWZ, 2, DestReg).addSImm(0).addReg(VAList); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3705 | break; |
| 3706 | case Type::ULongTyID: |
| 3707 | case Type::LongTyID: |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3708 | BuildMI(BB, PPC::LWZ, 2, DestReg).addSImm(0).addReg(VAList); |
| 3709 | BuildMI(BB, PPC::LWZ, 2, DestReg+1).addSImm(4).addReg(VAList); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3710 | break; |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3711 | case Type::FloatTyID: |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3712 | BuildMI(BB, PPC::LFS, 2, DestReg).addSImm(0).addReg(VAList); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3713 | break; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3714 | case Type::DoubleTyID: |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3715 | BuildMI(BB, PPC::LFD, 2, DestReg).addSImm(0).addReg(VAList); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3716 | break; |
| 3717 | } |
| 3718 | } |
| 3719 | |
| 3720 | /// visitGetElementPtrInst - instruction-select GEP instructions |
| 3721 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3722 | void PPC32ISel::visitGetElementPtrInst(GetElementPtrInst &I) { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3723 | if (canFoldGEPIntoLoadOrStore(&I)) |
| 3724 | return; |
| 3725 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3726 | emitGEPOperation(BB, BB->end(), &I, false); |
| 3727 | } |
| 3728 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 3729 | /// emitGEPOperation - Common code shared between visitGetElementPtrInst and |
| 3730 | /// constant expression GEP support. |
| 3731 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3732 | void PPC32ISel::emitGEPOperation(MachineBasicBlock *MBB, |
| 3733 | MachineBasicBlock::iterator IP, |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3734 | GetElementPtrInst *GEPI, bool GEPIsFolded) { |
| 3735 | // If we've already emitted this particular GEP, just return to avoid |
| 3736 | // multiple definitions of the base register. |
Nate Begeman | a41fc77 | 2004-09-29 02:35:05 +0000 | [diff] [blame] | 3737 | if (GEPIsFolded && (GEPMap[GEPI].base != 0)) |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3738 | return; |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3739 | |
| 3740 | Value *Src = GEPI->getOperand(0); |
| 3741 | User::op_iterator IdxBegin = GEPI->op_begin()+1; |
| 3742 | User::op_iterator IdxEnd = GEPI->op_end(); |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 3743 | const TargetData &TD = TM.getTargetData(); |
| 3744 | const Type *Ty = Src->getType(); |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3745 | int64_t constValue = 0; |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3746 | |
| 3747 | // Record the operations to emit the GEP in a vector so that we can emit them |
| 3748 | // after having analyzed the entire instruction. |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3749 | std::vector<CollapsedGepOp> ops; |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3750 | |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 3751 | // GEPs have zero or more indices; we must perform a struct access |
| 3752 | // or array access for each one. |
| 3753 | for (GetElementPtrInst::op_iterator oi = IdxBegin, oe = IdxEnd; oi != oe; |
| 3754 | ++oi) { |
| 3755 | Value *idx = *oi; |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 3756 | if (const StructType *StTy = dyn_cast<StructType>(Ty)) { |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 3757 | // It's a struct access. idx is the index into the structure, |
| 3758 | // which names the field. Use the TargetData structure to |
| 3759 | // pick out what the layout of the structure is in memory. |
| 3760 | // Use the (constant) structure index's value to find the |
| 3761 | // right byte offset from the StructLayout class's list of |
| 3762 | // structure member offsets. |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 3763 | unsigned fieldIndex = cast<ConstantUInt>(idx)->getValue(); |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3764 | |
| 3765 | // StructType member offsets are always constant values. Add it to the |
| 3766 | // running total. |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3767 | constValue += TD.getStructLayout(StTy)->MemberOffsets[fieldIndex]; |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3768 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3769 | // The next type is the member of the structure selected by the index. |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3770 | Ty = StTy->getElementType (fieldIndex); |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3771 | } else if (const SequentialType *SqTy = dyn_cast<SequentialType>(Ty)) { |
Misha Brukman | 313efcb | 2004-07-09 15:45:07 +0000 | [diff] [blame] | 3772 | // Many GEP instructions use a [cast (int/uint) to LongTy] as their |
| 3773 | // operand. Handle this case directly now... |
| 3774 | if (CastInst *CI = dyn_cast<CastInst>(idx)) |
| 3775 | if (CI->getOperand(0)->getType() == Type::IntTy || |
| 3776 | CI->getOperand(0)->getType() == Type::UIntTy) |
| 3777 | idx = CI->getOperand(0); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 3778 | |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3779 | // It's an array or pointer access: [ArraySize x ElementType]. |
| 3780 | // We want to add basePtrReg to (idxReg * sizeof ElementType). First, we |
| 3781 | // must find the size of the pointed-to type (Not coincidentally, the next |
| 3782 | // type is the type of the elements in the array). |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 3783 | Ty = SqTy->getElementType(); |
Misha Brukman | 2ed17ca | 2004-07-22 15:58:04 +0000 | [diff] [blame] | 3784 | unsigned elementSize = TD.getTypeSize(Ty); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 3785 | |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3786 | if (ConstantInt *C = dyn_cast<ConstantInt>(idx)) { |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3787 | if (ConstantSInt *CS = dyn_cast<ConstantSInt>(C)) |
| 3788 | constValue += CS->getValue() * elementSize; |
| 3789 | else if (ConstantUInt *CU = dyn_cast<ConstantUInt>(C)) |
| 3790 | constValue += CU->getValue() * elementSize; |
| 3791 | else |
| 3792 | assert(0 && "Invalid ConstantInt GEP index type!"); |
| 3793 | } else { |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3794 | // Push current gep state to this point as an add and multiply |
| 3795 | ops.push_back(CollapsedGepOp( |
| 3796 | ConstantSInt::get(Type::IntTy, constValue), |
| 3797 | idx, ConstantUInt::get(Type::UIntTy, elementSize))); |
| 3798 | |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3799 | constValue = 0; |
Misha Brukman | 313efcb | 2004-07-09 15:45:07 +0000 | [diff] [blame] | 3800 | } |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3801 | } |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3802 | } |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3803 | // Emit instructions for all the collapsed ops |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3804 | unsigned indexReg = 0; |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3805 | for(std::vector<CollapsedGepOp>::iterator cgo_i = ops.begin(), |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3806 | cgo_e = ops.end(); cgo_i != cgo_e; ++cgo_i) { |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3807 | CollapsedGepOp& cgo = *cgo_i; |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3808 | |
Nate Begeman | 8531f6f | 2004-11-19 02:06:40 +0000 | [diff] [blame] | 3809 | // Avoid emitting known move instructions here for the register allocator |
| 3810 | // to deal with later. val * 1 == val. val + 0 == val. |
| 3811 | unsigned TmpReg1; |
| 3812 | if (cgo.size->getValue() == 1) { |
| 3813 | TmpReg1 = getReg(cgo.index, MBB, IP); |
| 3814 | } else { |
| 3815 | TmpReg1 = makeAnotherReg(Type::IntTy); |
| 3816 | doMultiplyConst(MBB, IP, TmpReg1, cgo.index, cgo.size); |
| 3817 | } |
| 3818 | |
| 3819 | unsigned TmpReg2; |
| 3820 | if (cgo.offset->isNullValue()) { |
| 3821 | TmpReg2 = TmpReg1; |
| 3822 | } else { |
| 3823 | TmpReg2 = makeAnotherReg(Type::IntTy); |
| 3824 | emitBinaryConstOperation(MBB, IP, TmpReg1, cgo.offset, 0, TmpReg2); |
| 3825 | } |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3826 | |
| 3827 | if (indexReg == 0) |
| 3828 | indexReg = TmpReg2; |
| 3829 | else { |
| 3830 | unsigned TmpReg3 = makeAnotherReg(Type::IntTy); |
| 3831 | BuildMI(*MBB, IP, PPC::ADD, 2, TmpReg3).addReg(indexReg).addReg(TmpReg2); |
| 3832 | indexReg = TmpReg3; |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3833 | } |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 3834 | } |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3835 | |
| 3836 | // We now have a base register, an index register, and possibly a constant |
| 3837 | // remainder. If the GEP is going to be folded, we try to generate the |
| 3838 | // optimal addressing mode. |
Misha Brukman | e2eceb5 | 2004-07-23 16:08:20 +0000 | [diff] [blame] | 3839 | ConstantSInt *remainder = ConstantSInt::get(Type::IntTy, constValue); |
| 3840 | |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3841 | // If we are emitting this during a fold, copy the current base register to |
| 3842 | // the target, and save the current constant offset so the folding load or |
| 3843 | // store can try and use it as an immediate. |
| 3844 | if (GEPIsFolded) { |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3845 | if (indexReg == 0) { |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 3846 | if (!canUseAsImmediateForOpcode(remainder, 0, false)) { |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3847 | indexReg = getReg(remainder, MBB, IP); |
| 3848 | remainder = 0; |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 3849 | } |
Nate Begeman | bc3a537 | 2004-11-19 08:01:16 +0000 | [diff] [blame] | 3850 | } else if (!remainder->isNullValue()) { |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3851 | unsigned TmpReg = makeAnotherReg(Type::IntTy); |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 3852 | emitBinaryConstOperation(MBB, IP, indexReg, remainder, 0, TmpReg); |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3853 | indexReg = TmpReg; |
| 3854 | remainder = 0; |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 3855 | } |
Nate Begeman | db869aa | 2004-11-18 07:22:46 +0000 | [diff] [blame] | 3856 | unsigned basePtrReg = getReg(Src, MBB, IP); |
| 3857 | GEPMap[GEPI] = FoldedGEP(basePtrReg, indexReg, remainder); |
Misha Brukman | b097f21 | 2004-07-26 18:13:24 +0000 | [diff] [blame] | 3858 | return; |
| 3859 | } |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 3860 | |
Nate Begeman | 645495d | 2004-09-23 05:31:33 +0000 | [diff] [blame] | 3861 | // We're not folding, so collapse the base, index, and any remainder into the |
| 3862 | // destination register. |
Nate Begeman | db869aa | 2004-11-18 07:22:46 +0000 | [diff] [blame] | 3863 | unsigned TargetReg = getReg(GEPI, MBB, IP); |
| 3864 | unsigned basePtrReg = getReg(Src, MBB, IP); |
Nate Begeman | bc3a537 | 2004-11-19 08:01:16 +0000 | [diff] [blame] | 3865 | |
Nate Begeman | 486ebfd | 2004-11-21 05:14:06 +0000 | [diff] [blame] | 3866 | if ((indexReg == 0) && remainder->isNullValue()) { |
| 3867 | BuildMI(*MBB, IP, PPC::OR, 2, TargetReg).addReg(basePtrReg) |
| 3868 | .addReg(basePtrReg); |
| 3869 | return; |
| 3870 | } |
Nate Begeman | bc3a537 | 2004-11-19 08:01:16 +0000 | [diff] [blame] | 3871 | if (!remainder->isNullValue()) { |
| 3872 | unsigned TmpReg = (indexReg == 0) ? TargetReg : makeAnotherReg(Type::IntTy); |
| 3873 | emitBinaryConstOperation(MBB, IP, basePtrReg, remainder, 0, TmpReg); |
Nate Begeman | b64af91 | 2004-08-10 20:42:36 +0000 | [diff] [blame] | 3874 | basePtrReg = TmpReg; |
| 3875 | } |
Nate Begeman | 486ebfd | 2004-11-21 05:14:06 +0000 | [diff] [blame] | 3876 | if (indexReg != 0) |
Nate Begeman | bc3a537 | 2004-11-19 08:01:16 +0000 | [diff] [blame] | 3877 | BuildMI(*MBB, IP, PPC::ADD, 2, TargetReg).addReg(indexReg) |
| 3878 | .addReg(basePtrReg); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3879 | } |
| 3880 | |
| 3881 | /// visitAllocaInst - If this is a fixed size alloca, allocate space from the |
| 3882 | /// frame manager, otherwise do it the hard way. |
| 3883 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3884 | void PPC32ISel::visitAllocaInst(AllocaInst &I) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3885 | // If this is a fixed size alloca in the entry block for the function, we |
| 3886 | // statically stack allocate the space, so we don't need to do anything here. |
| 3887 | // |
| 3888 | if (dyn_castFixedAlloca(&I)) return; |
| 3889 | |
| 3890 | // Find the data size of the alloca inst's getAllocatedType. |
| 3891 | const Type *Ty = I.getAllocatedType(); |
| 3892 | unsigned TySize = TM.getTargetData().getTypeSize(Ty); |
| 3893 | |
| 3894 | // Create a register to hold the temporary result of multiplying the type size |
| 3895 | // constant by the variable amount. |
| 3896 | unsigned TotalSizeReg = makeAnotherReg(Type::UIntTy); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3897 | |
| 3898 | // TotalSizeReg = mul <numelements>, <TypeSize> |
| 3899 | MachineBasicBlock::iterator MBBI = BB->end(); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 3900 | ConstantUInt *CUI = ConstantUInt::get(Type::UIntTy, TySize); |
| 3901 | doMultiplyConst(BB, MBBI, TotalSizeReg, I.getArraySize(), CUI); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3902 | |
| 3903 | // AddedSize = add <TotalSizeReg>, 15 |
| 3904 | unsigned AddedSizeReg = makeAnotherReg(Type::UIntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3905 | BuildMI(BB, PPC::ADDI, 2, AddedSizeReg).addReg(TotalSizeReg).addSImm(15); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3906 | |
| 3907 | // AlignedSize = and <AddedSize>, ~15 |
| 3908 | unsigned AlignedSize = makeAnotherReg(Type::UIntTy); |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3909 | BuildMI(BB, PPC::RLWINM, 4, AlignedSize).addReg(AddedSizeReg).addImm(0) |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 3910 | .addImm(0).addImm(27); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3911 | |
| 3912 | // Subtract size from stack pointer, thereby allocating some space. |
Nate Begeman | f70b576 | 2005-03-28 23:08:54 +0000 | [diff] [blame] | 3913 | BuildMI(BB, PPC::SUBF, 2, PPC::R1).addReg(AlignedSize).addReg(PPC::R1); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3914 | |
| 3915 | // Put a pointer to the space into the result register, by copying |
| 3916 | // the stack pointer. |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3917 | BuildMI(BB, PPC::OR, 2, getReg(I)).addReg(PPC::R1).addReg(PPC::R1); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3918 | |
| 3919 | // Inform the Frame Information that we have just allocated a variable-sized |
| 3920 | // object. |
| 3921 | F->getFrameInfo()->CreateVariableSizedObject(); |
| 3922 | } |
| 3923 | |
| 3924 | /// visitMallocInst - Malloc instructions are code generated into direct calls |
| 3925 | /// to the library malloc. |
| 3926 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3927 | void PPC32ISel::visitMallocInst(MallocInst &I) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3928 | unsigned AllocSize = TM.getTargetData().getTypeSize(I.getAllocatedType()); |
| 3929 | unsigned Arg; |
| 3930 | |
| 3931 | if (ConstantUInt *C = dyn_cast<ConstantUInt>(I.getOperand(0))) { |
| 3932 | Arg = getReg(ConstantUInt::get(Type::UIntTy, C->getValue() * AllocSize)); |
| 3933 | } else { |
| 3934 | Arg = makeAnotherReg(Type::UIntTy); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3935 | MachineBasicBlock::iterator MBBI = BB->end(); |
Misha Brukman | 1013ef5 | 2004-07-21 20:09:08 +0000 | [diff] [blame] | 3936 | ConstantUInt *CUI = ConstantUInt::get(Type::UIntTy, AllocSize); |
| 3937 | doMultiplyConst(BB, MBBI, Arg, I.getOperand(0), CUI); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3938 | } |
| 3939 | |
| 3940 | std::vector<ValueRecord> Args; |
| 3941 | Args.push_back(ValueRecord(Arg, Type::UIntTy)); |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 3942 | MachineInstr *TheCall = |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3943 | BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(mallocFn, true); |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 3944 | doCall(ValueRecord(getReg(I), I.getType()), TheCall, Args, false); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3945 | } |
| 3946 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3947 | /// visitFreeInst - Free instructions are code gen'd to call the free libc |
| 3948 | /// function. |
| 3949 | /// |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3950 | void PPC32ISel::visitFreeInst(FreeInst &I) { |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3951 | std::vector<ValueRecord> Args; |
| 3952 | Args.push_back(ValueRecord(I.getOperand(0))); |
Misha Brukman | 2fec990 | 2004-06-21 20:22:03 +0000 | [diff] [blame] | 3953 | MachineInstr *TheCall = |
Misha Brukman | 5b57081 | 2004-08-10 22:47:03 +0000 | [diff] [blame] | 3954 | BuildMI(PPC::CALLpcrel, 1).addGlobalAddress(freeFn, true); |
Misha Brukman | d18a31d | 2004-07-06 22:51:53 +0000 | [diff] [blame] | 3955 | doCall(ValueRecord(0, Type::VoidTy), TheCall, Args, false); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3956 | } |
| 3957 | |
Misha Brukman | 3d9a6c2 | 2004-08-11 00:09:42 +0000 | [diff] [blame] | 3958 | /// createPPC32ISelSimple - This pass converts an LLVM function into a machine |
| 3959 | /// code representation is a very simple peep-hole fashion. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3960 | /// |
Misha Brukman | 3d9a6c2 | 2004-08-11 00:09:42 +0000 | [diff] [blame] | 3961 | FunctionPass *llvm::createPPC32ISelSimple(TargetMachine &TM) { |
Misha Brukman | a1dca55 | 2004-09-21 18:22:19 +0000 | [diff] [blame] | 3962 | return new PPC32ISel(TM); |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 3963 | } |