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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / f4a93dd70e5f43e54366e184cf8eea8b783a05f8 / . / test / CodeGen / Thumb2 / thumb2-rsb.ll
blob: 15185be9462140639d11fa5c89a0390942fc2145 [file] [log] [blame]
Edward O'Callaghanf4a93dd2009-11-22 15:18:27 +0000[diff] [blame^]1; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
David Goodwin2634e982009-06-26 18:10:30 +0000[diff] [blame]2
Edward O'Callaghanf4a93dd2009-11-22 15:18:27 +0000[diff] [blame^]3define i32 @f1(i32 %a, i32 %b) {
David Goodwin4ff863c2009-06-30 01:02:20 +0000[diff] [blame]4 %tmp = shl i32 %b, 5
5 %tmp1 = sub i32 %tmp, %a
6 ret i32 %tmp1
7}
Edward O'Callaghanf4a93dd2009-11-22 15:18:27 +0000[diff] [blame^]8; CHECK: f1:
9; CHECK: rsb r0, r0, r1, lsl #5
David Goodwin2634e982009-06-26 18:10:30 +0000[diff] [blame]10
Edward O'Callaghanf4a93dd2009-11-22 15:18:27 +0000[diff] [blame^]11define i32 @f2(i32 %a, i32 %b) {
David Goodwin4ff863c2009-06-30 01:02:20 +0000[diff] [blame]12 %tmp = lshr i32 %b, 6
13 %tmp1 = sub i32 %tmp, %a
14 ret i32 %tmp1
15}
Edward O'Callaghanf4a93dd2009-11-22 15:18:27 +0000[diff] [blame^]16; CHECK: f2:
17; CHECK: rsb r0, r0, r1, lsr #6
David Goodwin4ff863c2009-06-30 01:02:20 +0000[diff] [blame]18
Edward O'Callaghanf4a93dd2009-11-22 15:18:27 +0000[diff] [blame^]19define i32 @f3(i32 %a, i32 %b) {
David Goodwin4ff863c2009-06-30 01:02:20 +0000[diff] [blame]20 %tmp = ashr i32 %b, 7
21 %tmp1 = sub i32 %tmp, %a
22 ret i32 %tmp1
23}
Edward O'Callaghanf4a93dd2009-11-22 15:18:27 +0000[diff] [blame^]24; CHECK: f3:
25; CHECK: rsb r0, r0, r1, asr #7
David Goodwin4ff863c2009-06-30 01:02:20 +0000[diff] [blame]26
Edward O'Callaghanf4a93dd2009-11-22 15:18:27 +0000[diff] [blame^]27define i32 @f4(i32 %a, i32 %b) {
David Goodwin4ff863c2009-06-30 01:02:20 +0000[diff] [blame]28 %l8 = shl i32 %a, 24
29 %r8 = lshr i32 %a, 8
30 %tmp = or i32 %l8, %r8
31 %tmp1 = sub i32 %tmp, %a
32 ret i32 %tmp1
David Goodwin2634e982009-06-26 18:10:30 +0000[diff] [blame]33}
Edward O'Callaghanf4a93dd2009-11-22 15:18:27 +0000[diff] [blame^]34; CHECK: f4:
35; CHECK: rsb r0, r0, r0, ror #8