Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 1 | //==-- SystemZISelDAGToDAG.cpp - A dag to dag inst selector for SystemZ ---===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file defines an instruction selector for the SystemZ target. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #include "SystemZ.h" |
| 15 | #include "SystemZISelLowering.h" |
| 16 | #include "SystemZTargetMachine.h" |
| 17 | #include "llvm/DerivedTypes.h" |
| 18 | #include "llvm/Function.h" |
| 19 | #include "llvm/Intrinsics.h" |
| 20 | #include "llvm/CallingConv.h" |
| 21 | #include "llvm/Constants.h" |
| 22 | #include "llvm/CodeGen/MachineFrameInfo.h" |
| 23 | #include "llvm/CodeGen/MachineFunction.h" |
| 24 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
| 25 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
| 26 | #include "llvm/CodeGen/SelectionDAG.h" |
| 27 | #include "llvm/CodeGen/SelectionDAGISel.h" |
| 28 | #include "llvm/Target/TargetLowering.h" |
| 29 | #include "llvm/Support/Compiler.h" |
| 30 | #include "llvm/Support/Debug.h" |
Anton Korobeynikov | 7df8462 | 2009-07-16 14:36:52 +0000 | [diff] [blame] | 31 | #include "llvm/Support/raw_ostream.h" |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 32 | using namespace llvm; |
| 33 | |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 34 | static const unsigned subreg_even32 = 1; |
| 35 | static const unsigned subreg_odd32 = 2; |
| 36 | static const unsigned subreg_even = 3; |
| 37 | static const unsigned subreg_odd = 4; |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 38 | |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 39 | namespace { |
| 40 | /// SystemZRRIAddressMode - This corresponds to rriaddr, but uses SDValue's |
| 41 | /// instead of register numbers for the leaves of the matched tree. |
| 42 | struct SystemZRRIAddressMode { |
| 43 | enum { |
| 44 | RegBase, |
| 45 | FrameIndexBase |
| 46 | } BaseType; |
| 47 | |
| 48 | struct { // This is really a union, discriminated by BaseType! |
| 49 | SDValue Reg; |
| 50 | int FrameIndex; |
| 51 | } Base; |
| 52 | |
| 53 | SDValue IndexReg; |
Anton Korobeynikov | 3240740 | 2009-07-16 13:48:23 +0000 | [diff] [blame] | 54 | int64_t Disp; |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 55 | bool isRI; |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 56 | |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 57 | SystemZRRIAddressMode(bool RI = false) |
| 58 | : BaseType(RegBase), IndexReg(), Disp(0), isRI(RI) { |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 59 | } |
| 60 | |
| 61 | void dump() { |
Chris Lattner | 4437ae2 | 2009-08-23 07:05:07 +0000 | [diff] [blame] | 62 | errs() << "SystemZRRIAddressMode " << this << '\n'; |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 63 | if (BaseType == RegBase) { |
Chris Lattner | 4437ae2 | 2009-08-23 07:05:07 +0000 | [diff] [blame] | 64 | errs() << "Base.Reg "; |
| 65 | if (Base.Reg.getNode() != 0) |
| 66 | Base.Reg.getNode()->dump(); |
| 67 | else |
| 68 | errs() << "nul"; |
| 69 | errs() << '\n'; |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 70 | } else { |
Chris Lattner | 4437ae2 | 2009-08-23 07:05:07 +0000 | [diff] [blame] | 71 | errs() << " Base.FrameIndex " << Base.FrameIndex << '\n'; |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 72 | } |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 73 | if (!isRI) { |
Chris Lattner | 4437ae2 | 2009-08-23 07:05:07 +0000 | [diff] [blame] | 74 | errs() << "IndexReg "; |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 75 | if (IndexReg.getNode() != 0) IndexReg.getNode()->dump(); |
Chris Lattner | 4437ae2 | 2009-08-23 07:05:07 +0000 | [diff] [blame] | 76 | else errs() << "nul"; |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 77 | } |
Chris Lattner | 4437ae2 | 2009-08-23 07:05:07 +0000 | [diff] [blame] | 78 | errs() << " Disp " << Disp << '\n'; |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 79 | } |
| 80 | }; |
| 81 | } |
| 82 | |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 83 | /// SystemZDAGToDAGISel - SystemZ specific code to select SystemZ machine |
| 84 | /// instructions for SelectionDAG operations. |
| 85 | /// |
| 86 | namespace { |
| 87 | class SystemZDAGToDAGISel : public SelectionDAGISel { |
| 88 | SystemZTargetLowering &Lowering; |
| 89 | const SystemZSubtarget &Subtarget; |
| 90 | |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 91 | void getAddressOperandsRI(const SystemZRRIAddressMode &AM, |
| 92 | SDValue &Base, SDValue &Disp); |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 93 | void getAddressOperands(const SystemZRRIAddressMode &AM, |
| 94 | SDValue &Base, SDValue &Disp, |
| 95 | SDValue &Index); |
| 96 | |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 97 | public: |
| 98 | SystemZDAGToDAGISel(SystemZTargetMachine &TM, CodeGenOpt::Level OptLevel) |
| 99 | : SelectionDAGISel(TM, OptLevel), |
| 100 | Lowering(*TM.getTargetLowering()), |
| 101 | Subtarget(*TM.getSubtargetImpl()) { } |
| 102 | |
| 103 | virtual void InstructionSelect(); |
| 104 | |
| 105 | virtual const char *getPassName() const { |
| 106 | return "SystemZ DAG->DAG Pattern Instruction Selection"; |
| 107 | } |
| 108 | |
Anton Korobeynikov | b6831cb | 2009-07-16 14:26:38 +0000 | [diff] [blame] | 109 | /// getI8Imm - Return a target constant with the specified value, of type |
| 110 | /// i8. |
| 111 | inline SDValue getI8Imm(uint64_t Imm) { |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 112 | return CurDAG->getTargetConstant(Imm, MVT::i8); |
Anton Korobeynikov | b6831cb | 2009-07-16 14:26:38 +0000 | [diff] [blame] | 113 | } |
| 114 | |
Anton Korobeynikov | 89edcd0 | 2009-07-16 13:33:57 +0000 | [diff] [blame] | 115 | /// getI16Imm - Return a target constant with the specified value, of type |
| 116 | /// i16. |
| 117 | inline SDValue getI16Imm(uint64_t Imm) { |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 118 | return CurDAG->getTargetConstant(Imm, MVT::i16); |
Anton Korobeynikov | 89edcd0 | 2009-07-16 13:33:57 +0000 | [diff] [blame] | 119 | } |
| 120 | |
Anton Korobeynikov | da308c9 | 2009-07-16 13:34:50 +0000 | [diff] [blame] | 121 | /// getI32Imm - Return a target constant with the specified value, of type |
| 122 | /// i32. |
| 123 | inline SDValue getI32Imm(uint64_t Imm) { |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 124 | return CurDAG->getTargetConstant(Imm, MVT::i32); |
Anton Korobeynikov | da308c9 | 2009-07-16 13:34:50 +0000 | [diff] [blame] | 125 | } |
| 126 | |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 127 | // Include the pieces autogenerated from the target description. |
Anton Korobeynikov | 89edcd0 | 2009-07-16 13:33:57 +0000 | [diff] [blame] | 128 | #include "SystemZGenDAGISel.inc" |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 129 | |
| 130 | private: |
Anton Korobeynikov | 014d463 | 2009-07-16 14:13:24 +0000 | [diff] [blame] | 131 | bool SelectAddrRI12Only(SDValue Op, SDValue& Addr, |
| 132 | SDValue &Base, SDValue &Disp); |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 133 | bool SelectAddrRI12(SDValue Op, SDValue& Addr, |
Anton Korobeynikov | 014d463 | 2009-07-16 14:13:24 +0000 | [diff] [blame] | 134 | SDValue &Base, SDValue &Disp, |
| 135 | bool is12BitOnly = false); |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 136 | bool SelectAddrRI(SDValue Op, SDValue& Addr, |
Anton Korobeynikov | 9e4816e | 2009-07-16 13:43:18 +0000 | [diff] [blame] | 137 | SDValue &Base, SDValue &Disp); |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 138 | bool SelectAddrRRI12(SDValue Op, SDValue Addr, |
| 139 | SDValue &Base, SDValue &Disp, SDValue &Index); |
| 140 | bool SelectAddrRRI20(SDValue Op, SDValue Addr, |
| 141 | SDValue &Base, SDValue &Disp, SDValue &Index); |
Anton Korobeynikov | c4368a1 | 2009-07-16 13:48:42 +0000 | [diff] [blame] | 142 | bool SelectLAAddr(SDValue Op, SDValue Addr, |
| 143 | SDValue &Base, SDValue &Disp, SDValue &Index); |
| 144 | |
| 145 | SDNode *Select(SDValue Op); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 146 | |
| 147 | bool TryFoldLoad(SDValue P, SDValue N, |
| 148 | SDValue &Base, SDValue &Disp, SDValue &Index); |
| 149 | |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 150 | bool MatchAddress(SDValue N, SystemZRRIAddressMode &AM, |
| 151 | bool is12Bit, unsigned Depth = 0); |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 152 | bool MatchAddressBase(SDValue N, SystemZRRIAddressMode &AM); |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 153 | bool MatchAddressRI(SDValue N, SystemZRRIAddressMode &AM, |
| 154 | bool is12Bit); |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 155 | |
| 156 | #ifndef NDEBUG |
| 157 | unsigned Indent; |
| 158 | #endif |
| 159 | }; |
| 160 | } // end anonymous namespace |
| 161 | |
| 162 | /// createSystemZISelDag - This pass converts a legalized DAG into a |
| 163 | /// SystemZ-specific DAG, ready for instruction scheduling. |
| 164 | /// |
| 165 | FunctionPass *llvm::createSystemZISelDag(SystemZTargetMachine &TM, |
| 166 | CodeGenOpt::Level OptLevel) { |
| 167 | return new SystemZDAGToDAGISel(TM, OptLevel); |
| 168 | } |
| 169 | |
Anton Korobeynikov | 9e4816e | 2009-07-16 13:43:18 +0000 | [diff] [blame] | 170 | /// isImmSExt20 - This method tests to see if the node is either a 32-bit |
| 171 | /// or 64-bit immediate, and if the value can be accurately represented as a |
| 172 | /// sign extension from a 20-bit value. If so, this returns true and the |
| 173 | /// immediate. |
Anton Korobeynikov | 3240740 | 2009-07-16 13:48:23 +0000 | [diff] [blame] | 174 | static bool isImmSExt20(int64_t Val, int64_t &Imm) { |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 175 | if (Val >= -524288 && Val <= 524287) { |
Anton Korobeynikov | 3240740 | 2009-07-16 13:48:23 +0000 | [diff] [blame] | 176 | Imm = Val; |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 177 | return true; |
| 178 | } |
| 179 | return false; |
| 180 | } |
| 181 | |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 182 | /// isImmZExt12 - This method tests to see if the node is either a 32-bit |
Anton Korobeynikov | 3166a9a | 2009-07-16 14:03:41 +0000 | [diff] [blame] | 183 | /// or 64-bit immediate, and if the value can be accurately represented as a |
| 184 | /// zero extension from a 12-bit value. If so, this returns true and the |
| 185 | /// immediate. |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 186 | static bool isImmZExt12(int64_t Val, int64_t &Imm) { |
| 187 | if (Val >= 0 && Val <= 0xFFF) { |
Anton Korobeynikov | 3166a9a | 2009-07-16 14:03:41 +0000 | [diff] [blame] | 188 | Imm = Val; |
| 189 | return true; |
| 190 | } |
Anton Korobeynikov | 3166a9a | 2009-07-16 14:03:41 +0000 | [diff] [blame] | 191 | return false; |
| 192 | } |
| 193 | |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 194 | /// MatchAddress - Add the specified node to the specified addressing mode, |
| 195 | /// returning true if it cannot be done. This just pattern matches for the |
| 196 | /// addressing mode. |
| 197 | bool SystemZDAGToDAGISel::MatchAddress(SDValue N, SystemZRRIAddressMode &AM, |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 198 | bool is12Bit, unsigned Depth) { |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 199 | DebugLoc dl = N.getDebugLoc(); |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 200 | DEBUG(errs() << "MatchAddress: "; AM.dump()); |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 201 | // Limit recursion. |
| 202 | if (Depth > 5) |
| 203 | return MatchAddressBase(N, AM); |
| 204 | |
Anton Korobeynikov | dc28955 | 2009-07-16 13:44:30 +0000 | [diff] [blame] | 205 | // FIXME: We can perform better here. If we have something like |
| 206 | // (shift (add A, imm), N), we can try to reassociate stuff and fold shift of |
| 207 | // imm into addressing mode. |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 208 | switch (N.getOpcode()) { |
| 209 | default: break; |
| 210 | case ISD::Constant: { |
Anton Korobeynikov | 3240740 | 2009-07-16 13:48:23 +0000 | [diff] [blame] | 211 | int64_t Val = cast<ConstantSDNode>(N)->getSExtValue(); |
Daniel Dunbar | 19c29f5 | 2009-07-17 02:19:26 +0000 | [diff] [blame] | 212 | int64_t Imm = 0; |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 213 | bool Match = (is12Bit ? |
| 214 | isImmZExt12(AM.Disp + Val, Imm) : |
| 215 | isImmSExt20(AM.Disp + Val, Imm)); |
| 216 | if (Match) { |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 217 | AM.Disp = Imm; |
| 218 | return false; |
| 219 | } |
| 220 | break; |
| 221 | } |
| 222 | |
| 223 | case ISD::FrameIndex: |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 224 | if (AM.BaseType == SystemZRRIAddressMode::RegBase && |
| 225 | AM.Base.Reg.getNode() == 0) { |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 226 | AM.BaseType = SystemZRRIAddressMode::FrameIndexBase; |
| 227 | AM.Base.FrameIndex = cast<FrameIndexSDNode>(N)->getIndex(); |
| 228 | return false; |
| 229 | } |
| 230 | break; |
| 231 | |
| 232 | case ISD::SUB: { |
| 233 | // Given A-B, if A can be completely folded into the address and |
| 234 | // the index field with the index field unused, use -B as the index. |
| 235 | // This is a win if a has multiple parts that can be folded into |
| 236 | // the address. Also, this saves a mov if the base register has |
| 237 | // other uses, since it avoids a two-address sub instruction, however |
| 238 | // it costs an additional mov if the index register has other uses. |
| 239 | |
| 240 | // Test if the LHS of the sub can be folded. |
| 241 | SystemZRRIAddressMode Backup = AM; |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 242 | if (MatchAddress(N.getNode()->getOperand(0), AM, is12Bit, Depth+1)) { |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 243 | AM = Backup; |
| 244 | break; |
| 245 | } |
| 246 | // Test if the index field is free for use. |
Anton Korobeynikov | 54681ec | 2009-07-16 14:31:14 +0000 | [diff] [blame] | 247 | if (AM.IndexReg.getNode() || AM.isRI) { |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 248 | AM = Backup; |
| 249 | break; |
| 250 | } |
| 251 | |
| 252 | // If the base is a register with multiple uses, this transformation may |
| 253 | // save a mov. Otherwise it's probably better not to do it. |
| 254 | if (AM.BaseType == SystemZRRIAddressMode::RegBase && |
| 255 | (!AM.Base.Reg.getNode() || AM.Base.Reg.getNode()->hasOneUse())) { |
| 256 | AM = Backup; |
| 257 | break; |
| 258 | } |
| 259 | |
| 260 | // Ok, the transformation is legal and appears profitable. Go for it. |
| 261 | SDValue RHS = N.getNode()->getOperand(1); |
| 262 | SDValue Zero = CurDAG->getConstant(0, N.getValueType()); |
| 263 | SDValue Neg = CurDAG->getNode(ISD::SUB, dl, N.getValueType(), Zero, RHS); |
| 264 | AM.IndexReg = Neg; |
| 265 | |
| 266 | // Insert the new nodes into the topological ordering. |
| 267 | if (Zero.getNode()->getNodeId() == -1 || |
| 268 | Zero.getNode()->getNodeId() > N.getNode()->getNodeId()) { |
| 269 | CurDAG->RepositionNode(N.getNode(), Zero.getNode()); |
| 270 | Zero.getNode()->setNodeId(N.getNode()->getNodeId()); |
| 271 | } |
| 272 | if (Neg.getNode()->getNodeId() == -1 || |
| 273 | Neg.getNode()->getNodeId() > N.getNode()->getNodeId()) { |
| 274 | CurDAG->RepositionNode(N.getNode(), Neg.getNode()); |
| 275 | Neg.getNode()->setNodeId(N.getNode()->getNodeId()); |
| 276 | } |
| 277 | return false; |
| 278 | } |
| 279 | |
| 280 | case ISD::ADD: { |
| 281 | SystemZRRIAddressMode Backup = AM; |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 282 | if (!MatchAddress(N.getNode()->getOperand(0), AM, is12Bit, Depth+1) && |
| 283 | !MatchAddress(N.getNode()->getOperand(1), AM, is12Bit, Depth+1)) |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 284 | return false; |
| 285 | AM = Backup; |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 286 | if (!MatchAddress(N.getNode()->getOperand(1), AM, is12Bit, Depth+1) && |
| 287 | !MatchAddress(N.getNode()->getOperand(0), AM, is12Bit, Depth+1)) |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 288 | return false; |
| 289 | AM = Backup; |
| 290 | |
| 291 | // If we couldn't fold both operands into the address at the same time, |
| 292 | // see if we can just put each operand into a register and fold at least |
| 293 | // the add. |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 294 | if (!AM.isRI && |
| 295 | AM.BaseType == SystemZRRIAddressMode::RegBase && |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 296 | !AM.Base.Reg.getNode() && !AM.IndexReg.getNode()) { |
| 297 | AM.Base.Reg = N.getNode()->getOperand(0); |
| 298 | AM.IndexReg = N.getNode()->getOperand(1); |
| 299 | return false; |
| 300 | } |
| 301 | break; |
| 302 | } |
| 303 | |
| 304 | case ISD::OR: |
| 305 | // Handle "X | C" as "X + C" iff X is known to have C bits clear. |
| 306 | if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) { |
| 307 | SystemZRRIAddressMode Backup = AM; |
Anton Korobeynikov | 3240740 | 2009-07-16 13:48:23 +0000 | [diff] [blame] | 308 | int64_t Offset = CN->getSExtValue(); |
Daniel Dunbar | 19c29f5 | 2009-07-17 02:19:26 +0000 | [diff] [blame] | 309 | int64_t Imm = 0; |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 310 | bool MatchOffset = (is12Bit ? |
| 311 | isImmZExt12(AM.Disp + Offset, Imm) : |
| 312 | isImmSExt20(AM.Disp + Offset, Imm)); |
| 313 | // The resultant disp must fit in 12 or 20-bits. |
| 314 | if (MatchOffset && |
| 315 | // LHS should be an addr mode. |
| 316 | !MatchAddress(N.getOperand(0), AM, is12Bit, Depth+1) && |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 317 | // Check to see if the LHS & C is zero. |
| 318 | CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getAPIntValue())) { |
| 319 | AM.Disp = Imm; |
| 320 | return false; |
| 321 | } |
| 322 | AM = Backup; |
| 323 | } |
| 324 | break; |
| 325 | } |
| 326 | |
| 327 | return MatchAddressBase(N, AM); |
| 328 | } |
| 329 | |
| 330 | /// MatchAddressBase - Helper for MatchAddress. Add the specified node to the |
| 331 | /// specified addressing mode without any further recursion. |
| 332 | bool SystemZDAGToDAGISel::MatchAddressBase(SDValue N, |
| 333 | SystemZRRIAddressMode &AM) { |
| 334 | // Is the base register already occupied? |
| 335 | if (AM.BaseType != SystemZRRIAddressMode::RegBase || AM.Base.Reg.getNode()) { |
Anton Korobeynikov | 4656760 | 2009-07-16 14:10:35 +0000 | [diff] [blame] | 336 | // If so, check to see if the index register is set. |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 337 | if (AM.IndexReg.getNode() == 0 && !AM.isRI) { |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 338 | AM.IndexReg = N; |
| 339 | return false; |
| 340 | } |
| 341 | |
| 342 | // Otherwise, we cannot select it. |
| 343 | return true; |
| 344 | } |
| 345 | |
| 346 | // Default, generate it as a register. |
| 347 | AM.BaseType = SystemZRRIAddressMode::RegBase; |
| 348 | AM.Base.Reg = N; |
| 349 | return false; |
| 350 | } |
| 351 | |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 352 | void SystemZDAGToDAGISel::getAddressOperandsRI(const SystemZRRIAddressMode &AM, |
| 353 | SDValue &Base, SDValue &Disp) { |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 354 | if (AM.BaseType == SystemZRRIAddressMode::RegBase) |
| 355 | Base = AM.Base.Reg; |
| 356 | else |
| 357 | Base = CurDAG->getTargetFrameIndex(AM.Base.FrameIndex, TLI.getPointerTy()); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 358 | Disp = CurDAG->getTargetConstant(AM.Disp, MVT::i64); |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 359 | } |
| 360 | |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 361 | void SystemZDAGToDAGISel::getAddressOperands(const SystemZRRIAddressMode &AM, |
| 362 | SDValue &Base, SDValue &Disp, |
| 363 | SDValue &Index) { |
| 364 | getAddressOperandsRI(AM, Base, Disp); |
| 365 | Index = AM.IndexReg; |
| 366 | } |
| 367 | |
| 368 | /// Returns true if the address can be represented by a base register plus |
| 369 | /// an unsigned 12-bit displacement [r+imm]. |
Anton Korobeynikov | 014d463 | 2009-07-16 14:13:24 +0000 | [diff] [blame] | 370 | bool SystemZDAGToDAGISel::SelectAddrRI12Only(SDValue Op, SDValue& Addr, |
| 371 | SDValue &Base, SDValue &Disp) { |
| 372 | return SelectAddrRI12(Op, Addr, Base, Disp, /*is12BitOnly*/true); |
| 373 | } |
| 374 | |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 375 | bool SystemZDAGToDAGISel::SelectAddrRI12(SDValue Op, SDValue& Addr, |
Anton Korobeynikov | 014d463 | 2009-07-16 14:13:24 +0000 | [diff] [blame] | 376 | SDValue &Base, SDValue &Disp, |
| 377 | bool is12BitOnly) { |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 378 | SystemZRRIAddressMode AM20(/*isRI*/true), AM12(/*isRI*/true); |
| 379 | bool Done = false; |
| 380 | |
| 381 | if (!Addr.hasOneUse()) { |
| 382 | unsigned Opcode = Addr.getOpcode(); |
| 383 | if (Opcode != ISD::Constant && Opcode != ISD::FrameIndex) { |
| 384 | // If we are able to fold N into addressing mode, then we'll allow it even |
| 385 | // if N has multiple uses. In general, addressing computation is used as |
| 386 | // addresses by all of its uses. But watch out for CopyToReg uses, that |
| 387 | // means the address computation is liveout. It will be computed by a LA |
| 388 | // so we want to avoid computing the address twice. |
| 389 | for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), |
| 390 | UE = Addr.getNode()->use_end(); UI != UE; ++UI) { |
| 391 | if (UI->getOpcode() == ISD::CopyToReg) { |
| 392 | MatchAddressBase(Addr, AM12); |
| 393 | Done = true; |
| 394 | break; |
| 395 | } |
| 396 | } |
| 397 | } |
| 398 | } |
| 399 | if (!Done && MatchAddress(Addr, AM12, /* is12Bit */ true)) |
| 400 | return false; |
| 401 | |
| 402 | // Check, whether we can match stuff using 20-bit displacements |
Anton Korobeynikov | 014d463 | 2009-07-16 14:13:24 +0000 | [diff] [blame] | 403 | if (!Done && !is12BitOnly && |
| 404 | !MatchAddress(Addr, AM20, /* is12Bit */ false)) |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 405 | if (AM12.Disp == 0 && AM20.Disp != 0) |
| 406 | return false; |
| 407 | |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 408 | DEBUG(errs() << "MatchAddress (final): "; AM12.dump()); |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 409 | |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 410 | EVT VT = Addr.getValueType(); |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 411 | if (AM12.BaseType == SystemZRRIAddressMode::RegBase) { |
| 412 | if (!AM12.Base.Reg.getNode()) |
| 413 | AM12.Base.Reg = CurDAG->getRegister(0, VT); |
| 414 | } |
| 415 | |
| 416 | assert(AM12.IndexReg.getNode() == 0 && "Invalid reg-imm address mode!"); |
| 417 | |
| 418 | getAddressOperandsRI(AM12, Base, Disp); |
| 419 | |
| 420 | return true; |
| 421 | } |
| 422 | |
| 423 | /// Returns true if the address can be represented by a base register plus |
| 424 | /// a signed 20-bit displacement [r+imm]. |
| 425 | bool SystemZDAGToDAGISel::SelectAddrRI(SDValue Op, SDValue& Addr, |
| 426 | SDValue &Base, SDValue &Disp) { |
| 427 | SystemZRRIAddressMode AM(/*isRI*/true); |
| 428 | bool Done = false; |
| 429 | |
| 430 | if (!Addr.hasOneUse()) { |
| 431 | unsigned Opcode = Addr.getOpcode(); |
| 432 | if (Opcode != ISD::Constant && Opcode != ISD::FrameIndex) { |
| 433 | // If we are able to fold N into addressing mode, then we'll allow it even |
| 434 | // if N has multiple uses. In general, addressing computation is used as |
| 435 | // addresses by all of its uses. But watch out for CopyToReg uses, that |
| 436 | // means the address computation is liveout. It will be computed by a LA |
| 437 | // so we want to avoid computing the address twice. |
| 438 | for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), |
| 439 | UE = Addr.getNode()->use_end(); UI != UE; ++UI) { |
| 440 | if (UI->getOpcode() == ISD::CopyToReg) { |
| 441 | MatchAddressBase(Addr, AM); |
| 442 | Done = true; |
| 443 | break; |
| 444 | } |
| 445 | } |
| 446 | } |
| 447 | } |
| 448 | if (!Done && MatchAddress(Addr, AM, /* is12Bit */ false)) |
| 449 | return false; |
| 450 | |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 451 | DEBUG(errs() << "MatchAddress (final): "; AM.dump()); |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 452 | |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 453 | EVT VT = Addr.getValueType(); |
Anton Korobeynikov | 1ed1e3e | 2009-07-16 14:10:17 +0000 | [diff] [blame] | 454 | if (AM.BaseType == SystemZRRIAddressMode::RegBase) { |
| 455 | if (!AM.Base.Reg.getNode()) |
| 456 | AM.Base.Reg = CurDAG->getRegister(0, VT); |
| 457 | } |
| 458 | |
| 459 | assert(AM.IndexReg.getNode() == 0 && "Invalid reg-imm address mode!"); |
| 460 | |
| 461 | getAddressOperandsRI(AM, Base, Disp); |
| 462 | |
| 463 | return true; |
| 464 | } |
| 465 | |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 466 | /// Returns true if the address can be represented by a base register plus |
| 467 | /// index register plus an unsigned 12-bit displacement [base + idx + imm]. |
| 468 | bool SystemZDAGToDAGISel::SelectAddrRRI12(SDValue Op, SDValue Addr, |
| 469 | SDValue &Base, SDValue &Disp, SDValue &Index) { |
Anton Korobeynikov | 4656760 | 2009-07-16 14:10:35 +0000 | [diff] [blame] | 470 | SystemZRRIAddressMode AM20, AM12; |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 471 | bool Done = false; |
| 472 | |
| 473 | if (!Addr.hasOneUse()) { |
| 474 | unsigned Opcode = Addr.getOpcode(); |
| 475 | if (Opcode != ISD::Constant && Opcode != ISD::FrameIndex) { |
| 476 | // If we are able to fold N into addressing mode, then we'll allow it even |
| 477 | // if N has multiple uses. In general, addressing computation is used as |
| 478 | // addresses by all of its uses. But watch out for CopyToReg uses, that |
| 479 | // means the address computation is liveout. It will be computed by a LA |
| 480 | // so we want to avoid computing the address twice. |
| 481 | for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), |
| 482 | UE = Addr.getNode()->use_end(); UI != UE; ++UI) { |
| 483 | if (UI->getOpcode() == ISD::CopyToReg) { |
| 484 | MatchAddressBase(Addr, AM12); |
| 485 | Done = true; |
| 486 | break; |
| 487 | } |
| 488 | } |
| 489 | } |
| 490 | } |
| 491 | if (!Done && MatchAddress(Addr, AM12, /* is12Bit */ true)) |
| 492 | return false; |
| 493 | |
| 494 | // Check, whether we can match stuff using 20-bit displacements |
| 495 | if (!Done && !MatchAddress(Addr, AM20, /* is12Bit */ false)) |
| 496 | if (AM12.Disp == 0 && AM20.Disp != 0) |
| 497 | return false; |
| 498 | |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 499 | DEBUG(errs() << "MatchAddress (final): "; AM12.dump()); |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 500 | |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 501 | EVT VT = Addr.getValueType(); |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 502 | if (AM12.BaseType == SystemZRRIAddressMode::RegBase) { |
| 503 | if (!AM12.Base.Reg.getNode()) |
| 504 | AM12.Base.Reg = CurDAG->getRegister(0, VT); |
| 505 | } |
| 506 | |
| 507 | if (!AM12.IndexReg.getNode()) |
| 508 | AM12.IndexReg = CurDAG->getRegister(0, VT); |
| 509 | |
| 510 | getAddressOperands(AM12, Base, Disp, Index); |
| 511 | |
| 512 | return true; |
| 513 | } |
| 514 | |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 515 | /// Returns true if the address can be represented by a base register plus |
| 516 | /// index register plus a signed 20-bit displacement [base + idx + imm]. |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 517 | bool SystemZDAGToDAGISel::SelectAddrRRI20(SDValue Op, SDValue Addr, |
Anton Korobeynikov | c4368a1 | 2009-07-16 13:48:42 +0000 | [diff] [blame] | 518 | SDValue &Base, SDValue &Disp, SDValue &Index) { |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 519 | SystemZRRIAddressMode AM; |
| 520 | bool Done = false; |
| 521 | |
Anton Korobeynikov | 711d5b6 | 2009-07-16 13:47:59 +0000 | [diff] [blame] | 522 | if (!Addr.hasOneUse()) { |
| 523 | unsigned Opcode = Addr.getOpcode(); |
| 524 | if (Opcode != ISD::Constant && Opcode != ISD::FrameIndex) { |
| 525 | // If we are able to fold N into addressing mode, then we'll allow it even |
| 526 | // if N has multiple uses. In general, addressing computation is used as |
| 527 | // addresses by all of its uses. But watch out for CopyToReg uses, that |
| 528 | // means the address computation is liveout. It will be computed by a LA |
| 529 | // so we want to avoid computing the address twice. |
| 530 | for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), |
| 531 | UE = Addr.getNode()->use_end(); UI != UE; ++UI) { |
| 532 | if (UI->getOpcode() == ISD::CopyToReg) { |
| 533 | MatchAddressBase(Addr, AM); |
| 534 | Done = true; |
| 535 | break; |
| 536 | } |
| 537 | } |
| 538 | } |
| 539 | } |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 540 | if (!Done && MatchAddress(Addr, AM, /* is12Bit */ false)) |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 541 | return false; |
| 542 | |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 543 | DEBUG(errs() << "MatchAddress (final): "; AM.dump()); |
Anton Korobeynikov | 3240740 | 2009-07-16 13:48:23 +0000 | [diff] [blame] | 544 | |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 545 | EVT VT = Addr.getValueType(); |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 546 | if (AM.BaseType == SystemZRRIAddressMode::RegBase) { |
| 547 | if (!AM.Base.Reg.getNode()) |
| 548 | AM.Base.Reg = CurDAG->getRegister(0, VT); |
| 549 | } |
| 550 | |
| 551 | if (!AM.IndexReg.getNode()) |
| 552 | AM.IndexReg = CurDAG->getRegister(0, VT); |
| 553 | |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 554 | getAddressOperands(AM, Base, Disp, Index); |
Anton Korobeynikov | 3360da9 | 2009-07-16 13:44:00 +0000 | [diff] [blame] | 555 | |
| 556 | return true; |
| 557 | } |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 558 | |
Anton Korobeynikov | 711d5b6 | 2009-07-16 13:47:59 +0000 | [diff] [blame] | 559 | /// SelectLAAddr - it calls SelectAddr and determines if the maximal addressing |
| 560 | /// mode it matches can be cost effectively emitted as an LA/LAY instruction. |
| 561 | bool SystemZDAGToDAGISel::SelectLAAddr(SDValue Op, SDValue Addr, |
Anton Korobeynikov | c4368a1 | 2009-07-16 13:48:42 +0000 | [diff] [blame] | 562 | SDValue &Base, SDValue &Disp, SDValue &Index) { |
Anton Korobeynikov | 711d5b6 | 2009-07-16 13:47:59 +0000 | [diff] [blame] | 563 | SystemZRRIAddressMode AM; |
| 564 | |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 565 | if (MatchAddress(Addr, AM, false)) |
Anton Korobeynikov | 711d5b6 | 2009-07-16 13:47:59 +0000 | [diff] [blame] | 566 | return false; |
| 567 | |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 568 | EVT VT = Addr.getValueType(); |
Anton Korobeynikov | 711d5b6 | 2009-07-16 13:47:59 +0000 | [diff] [blame] | 569 | unsigned Complexity = 0; |
| 570 | if (AM.BaseType == SystemZRRIAddressMode::RegBase) |
| 571 | if (AM.Base.Reg.getNode()) |
| 572 | Complexity = 1; |
| 573 | else |
| 574 | AM.Base.Reg = CurDAG->getRegister(0, VT); |
| 575 | else if (AM.BaseType == SystemZRRIAddressMode::FrameIndexBase) |
| 576 | Complexity = 4; |
| 577 | |
| 578 | if (AM.IndexReg.getNode()) |
| 579 | Complexity += 1; |
| 580 | else |
| 581 | AM.IndexReg = CurDAG->getRegister(0, VT); |
| 582 | |
| 583 | if (AM.Disp && (AM.Base.Reg.getNode() || AM.IndexReg.getNode())) |
| 584 | Complexity += 1; |
| 585 | |
| 586 | if (Complexity > 2) { |
Anton Korobeynikov | 720e3b0 | 2009-07-16 14:09:35 +0000 | [diff] [blame] | 587 | getAddressOperands(AM, Base, Disp, Index); |
Anton Korobeynikov | 711d5b6 | 2009-07-16 13:47:59 +0000 | [diff] [blame] | 588 | return true; |
| 589 | } |
| 590 | |
| 591 | return false; |
| 592 | } |
| 593 | |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 594 | bool SystemZDAGToDAGISel::TryFoldLoad(SDValue P, SDValue N, |
| 595 | SDValue &Base, SDValue &Disp, SDValue &Index) { |
| 596 | if (ISD::isNON_EXTLoad(N.getNode()) && |
| 597 | N.hasOneUse() && |
| 598 | IsLegalAndProfitableToFold(N.getNode(), P.getNode(), P.getNode())) |
| 599 | return SelectAddrRRI20(P, N.getOperand(1), Base, Disp, Index); |
| 600 | return false; |
| 601 | } |
| 602 | |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 603 | /// InstructionSelect - This callback is invoked by |
| 604 | /// SelectionDAGISel when it has created a SelectionDAG for us to codegen. |
| 605 | void SystemZDAGToDAGISel::InstructionSelect() { |
| 606 | DEBUG(BB->dump()); |
| 607 | |
| 608 | // Codegen the basic block. |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 609 | DEBUG(errs() << "===== Instruction selection begins:\n"); |
Daniel Dunbar | 43ed267 | 2009-08-23 08:50:52 +0000 | [diff] [blame] | 610 | DEBUG(Indent = 0); |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 611 | SelectRoot(*CurDAG); |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 612 | DEBUG(errs() << "===== Instruction selection ends:\n"); |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 613 | |
| 614 | CurDAG->RemoveDeadNodes(); |
| 615 | } |
| 616 | |
| 617 | SDNode *SystemZDAGToDAGISel::Select(SDValue Op) { |
| 618 | SDNode *Node = Op.getNode(); |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 619 | EVT NVT = Node->getValueType(0); |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 620 | DebugLoc dl = Op.getDebugLoc(); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 621 | unsigned Opcode = Node->getOpcode(); |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 622 | |
| 623 | // Dump information about the Node being selected |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 624 | DEBUG(errs().indent(Indent) << "Selecting: "; |
| 625 | Node->dump(CurDAG); |
| 626 | errs() << "\n"); |
Daniel Dunbar | 43ed267 | 2009-08-23 08:50:52 +0000 | [diff] [blame] | 627 | DEBUG(Indent += 2); |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 628 | |
| 629 | // If we have a custom node, we already have selected! |
| 630 | if (Node->isMachineOpcode()) { |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 631 | DEBUG(errs().indent(Indent-2) << "== "; |
| 632 | Node->dump(CurDAG); |
| 633 | errs() << "\n"); |
Daniel Dunbar | 43ed267 | 2009-08-23 08:50:52 +0000 | [diff] [blame] | 634 | DEBUG(Indent -= 2); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 635 | return NULL; // Already selected. |
| 636 | } |
| 637 | |
| 638 | switch (Opcode) { |
| 639 | default: break; |
| 640 | case ISD::SDIVREM: { |
Anton Korobeynikov | 09e3900 | 2009-07-16 14:17:52 +0000 | [diff] [blame] | 641 | unsigned Opc, MOpc; |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 642 | SDValue N0 = Node->getOperand(0); |
| 643 | SDValue N1 = Node->getOperand(1); |
| 644 | |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 645 | EVT ResVT; |
Anton Korobeynikov | 09e3900 | 2009-07-16 14:17:52 +0000 | [diff] [blame] | 646 | bool is32Bit = false; |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 647 | switch (NVT.getSimpleVT().SimpleTy) { |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 648 | default: assert(0 && "Unsupported VT!"); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 649 | case MVT::i32: |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 650 | Opc = SystemZ::SDIVREM32r; MOpc = SystemZ::SDIVREM32m; |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 651 | ResVT = MVT::v2i64; |
Anton Korobeynikov | 09e3900 | 2009-07-16 14:17:52 +0000 | [diff] [blame] | 652 | is32Bit = true; |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 653 | break; |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 654 | case MVT::i64: |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 655 | Opc = SystemZ::SDIVREM64r; MOpc = SystemZ::SDIVREM64m; |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 656 | ResVT = MVT::v2i64; |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 657 | break; |
| 658 | } |
| 659 | |
| 660 | SDValue Tmp0, Tmp1, Tmp2; |
| 661 | bool foldedLoad = TryFoldLoad(Op, N1, Tmp0, Tmp1, Tmp2); |
| 662 | |
| 663 | // Prepare the dividend |
Anton Korobeynikov | 09e3900 | 2009-07-16 14:17:52 +0000 | [diff] [blame] | 664 | SDNode *Dividend; |
| 665 | if (is32Bit) |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 666 | Dividend = CurDAG->getTargetNode(SystemZ::MOVSX64rr32, dl, MVT::i64, N0); |
Anton Korobeynikov | 09e3900 | 2009-07-16 14:17:52 +0000 | [diff] [blame] | 667 | else |
| 668 | Dividend = N0.getNode(); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 669 | |
| 670 | // Insert prepared dividend into suitable 'subreg' |
| 671 | SDNode *Tmp = CurDAG->getTargetNode(TargetInstrInfo::IMPLICIT_DEF, |
| 672 | dl, ResVT); |
| 673 | Dividend = |
| 674 | CurDAG->getTargetNode(TargetInstrInfo::INSERT_SUBREG, dl, ResVT, |
| 675 | SDValue(Tmp, 0), SDValue(Dividend, 0), |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 676 | CurDAG->getTargetConstant(subreg_odd, MVT::i32)); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 677 | |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 678 | SDNode *Result; |
| 679 | SDValue DivVal = SDValue(Dividend, 0); |
| 680 | if (foldedLoad) { |
| 681 | SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) }; |
| 682 | Result = CurDAG->getTargetNode(MOpc, dl, ResVT, Ops, array_lengthof(Ops)); |
| 683 | // Update the chain. |
| 684 | ReplaceUses(N1.getValue(1), SDValue(Result, 0)); |
| 685 | } else { |
| 686 | Result = CurDAG->getTargetNode(Opc, dl, ResVT, SDValue(Dividend, 0), N1); |
| 687 | } |
| 688 | |
| 689 | // Copy the division (odd subreg) result, if it is needed. |
| 690 | if (!Op.getValue(0).use_empty()) { |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 691 | unsigned SubRegIdx = (is32Bit ? subreg_odd32 : subreg_odd); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 692 | SDNode *Div = CurDAG->getTargetNode(TargetInstrInfo::EXTRACT_SUBREG, |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 693 | dl, NVT, |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 694 | SDValue(Result, 0), |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 695 | CurDAG->getTargetConstant(SubRegIdx, |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 696 | MVT::i32)); |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 697 | |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 698 | ReplaceUses(Op.getValue(0), SDValue(Div, 0)); |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 699 | DEBUG(errs().indent(Indent-2) << "=> "; |
| 700 | Result->dump(CurDAG); |
| 701 | errs() << "\n"); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 702 | } |
| 703 | |
| 704 | // Copy the remainder (even subreg) result, if it is needed. |
| 705 | if (!Op.getValue(1).use_empty()) { |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 706 | unsigned SubRegIdx = (is32Bit ? subreg_even32 : subreg_even); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 707 | SDNode *Rem = CurDAG->getTargetNode(TargetInstrInfo::EXTRACT_SUBREG, |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 708 | dl, NVT, |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 709 | SDValue(Result, 0), |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 710 | CurDAG->getTargetConstant(SubRegIdx, |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 711 | MVT::i32)); |
Anton Korobeynikov | 09e3900 | 2009-07-16 14:17:52 +0000 | [diff] [blame] | 712 | |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 713 | ReplaceUses(Op.getValue(1), SDValue(Rem, 0)); |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 714 | DEBUG(errs().indent(Indent-2) << "=> "; |
| 715 | Result->dump(CurDAG); |
| 716 | errs() << "\n"); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 717 | } |
| 718 | |
| 719 | #ifndef NDEBUG |
| 720 | Indent -= 2; |
| 721 | #endif |
| 722 | |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 723 | return NULL; |
| 724 | } |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 725 | case ISD::UDIVREM: { |
| 726 | unsigned Opc, MOpc, ClrOpc; |
| 727 | SDValue N0 = Node->getOperand(0); |
| 728 | SDValue N1 = Node->getOperand(1); |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 729 | EVT ResVT; |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 730 | |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 731 | bool is32Bit = false; |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 732 | switch (NVT.getSimpleVT().SimpleTy) { |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 733 | default: assert(0 && "Unsupported VT!"); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 734 | case MVT::i32: |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 735 | Opc = SystemZ::UDIVREM32r; MOpc = SystemZ::UDIVREM32m; |
Anton Korobeynikov | e3a7f7a | 2009-07-16 14:14:54 +0000 | [diff] [blame] | 736 | ClrOpc = SystemZ::MOV64Pr0_even; |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 737 | ResVT = MVT::v2i32; |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 738 | is32Bit = true; |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 739 | break; |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 740 | case MVT::i64: |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 741 | Opc = SystemZ::UDIVREM64r; MOpc = SystemZ::UDIVREM64m; |
Anton Korobeynikov | e3a7f7a | 2009-07-16 14:14:54 +0000 | [diff] [blame] | 742 | ClrOpc = SystemZ::MOV128r0_even; |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 743 | ResVT = MVT::v2i64; |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 744 | break; |
| 745 | } |
| 746 | |
| 747 | SDValue Tmp0, Tmp1, Tmp2; |
| 748 | bool foldedLoad = TryFoldLoad(Op, N1, Tmp0, Tmp1, Tmp2); |
| 749 | |
| 750 | // Prepare the dividend |
| 751 | SDNode *Dividend = N0.getNode(); |
| 752 | |
| 753 | // Insert prepared dividend into suitable 'subreg' |
| 754 | SDNode *Tmp = CurDAG->getTargetNode(TargetInstrInfo::IMPLICIT_DEF, |
| 755 | dl, ResVT); |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 756 | { |
| 757 | unsigned SubRegIdx = (is32Bit ? subreg_odd32 : subreg_odd); |
| 758 | Dividend = |
| 759 | CurDAG->getTargetNode(TargetInstrInfo::INSERT_SUBREG, dl, ResVT, |
| 760 | SDValue(Tmp, 0), SDValue(Dividend, 0), |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 761 | CurDAG->getTargetConstant(SubRegIdx, MVT::i32)); |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 762 | } |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 763 | |
Anton Korobeynikov | e3a7f7a | 2009-07-16 14:14:54 +0000 | [diff] [blame] | 764 | // Zero out even subreg |
| 765 | Dividend = CurDAG->getTargetNode(ClrOpc, dl, ResVT, SDValue(Dividend, 0)); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 766 | |
| 767 | SDValue DivVal = SDValue(Dividend, 0); |
| 768 | SDNode *Result; |
| 769 | if (foldedLoad) { |
| 770 | SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) }; |
| 771 | Result = CurDAG->getTargetNode(MOpc, dl,ResVT, |
| 772 | Ops, array_lengthof(Ops)); |
| 773 | // Update the chain. |
| 774 | ReplaceUses(N1.getValue(1), SDValue(Result, 0)); |
| 775 | } else { |
| 776 | Result = CurDAG->getTargetNode(Opc, dl, ResVT, DivVal, N1); |
| 777 | } |
| 778 | |
| 779 | // Copy the division (odd subreg) result, if it is needed. |
| 780 | if (!Op.getValue(0).use_empty()) { |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 781 | unsigned SubRegIdx = (is32Bit ? subreg_odd32 : subreg_odd); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 782 | SDNode *Div = CurDAG->getTargetNode(TargetInstrInfo::EXTRACT_SUBREG, |
| 783 | dl, NVT, |
| 784 | SDValue(Result, 0), |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 785 | CurDAG->getTargetConstant(SubRegIdx, |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 786 | MVT::i32)); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 787 | ReplaceUses(Op.getValue(0), SDValue(Div, 0)); |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 788 | DEBUG(errs().indent(Indent-2) << "=> "; |
| 789 | Result->dump(CurDAG); |
| 790 | errs() << "\n"); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 791 | } |
| 792 | |
| 793 | // Copy the remainder (even subreg) result, if it is needed. |
| 794 | if (!Op.getValue(1).use_empty()) { |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 795 | unsigned SubRegIdx = (is32Bit ? subreg_even32 : subreg_even); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 796 | SDNode *Rem = CurDAG->getTargetNode(TargetInstrInfo::EXTRACT_SUBREG, |
| 797 | dl, NVT, |
| 798 | SDValue(Result, 0), |
Anton Korobeynikov | 8bd0db7 | 2009-07-16 14:18:17 +0000 | [diff] [blame] | 799 | CurDAG->getTargetConstant(SubRegIdx, |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 800 | MVT::i32)); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 801 | ReplaceUses(Op.getValue(1), SDValue(Rem, 0)); |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 802 | DEBUG(errs().indent(Indent-2) << "=> "; |
| 803 | Result->dump(CurDAG); |
| 804 | errs() << "\n"); |
Anton Korobeynikov | 0a42d2b | 2009-07-16 14:14:33 +0000 | [diff] [blame] | 805 | } |
| 806 | |
| 807 | #ifndef NDEBUG |
| 808 | Indent -= 2; |
| 809 | #endif |
| 810 | |
| 811 | return NULL; |
| 812 | } |
| 813 | } |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 814 | |
| 815 | // Select the default instruction |
| 816 | SDNode *ResNode = SelectCode(Op); |
| 817 | |
Chris Lattner | 893e1c9 | 2009-08-23 06:49:22 +0000 | [diff] [blame] | 818 | DEBUG(errs().indent(Indent-2) << "=> "; |
| 819 | if (ResNode == NULL || ResNode == Op.getNode()) |
| 820 | Op.getNode()->dump(CurDAG); |
| 821 | else |
| 822 | ResNode->dump(CurDAG); |
| 823 | errs() << "\n"; |
| 824 | ); |
Daniel Dunbar | 43ed267 | 2009-08-23 08:50:52 +0000 | [diff] [blame] | 825 | DEBUG(Indent -= 2); |
Anton Korobeynikov | 4403b93 | 2009-07-16 13:27:25 +0000 | [diff] [blame] | 826 | |
| 827 | return ResNode; |
| 828 | } |