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Chris Lattner97f06932009-10-19 20:20:46 +00001//===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===//
2//
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00006// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a printer that converts from our internal representation
11// of machine-dependent LLVM code to GAS-format ARM assembly language.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner95b2c7d2006-12-19 22:59:26 +000015#define DEBUG_TYPE "asm-printer"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000016#include "ARM.h"
Anton Korobeynikov88ce6672009-05-23 19:51:20 +000017#include "ARMBuildAttrs.h"
Evan Chenga8e29892007-01-19 07:51:42 +000018#include "ARMAddressingModes.h"
19#include "ARMConstantPoolValue.h"
Chris Lattnerf447a5f2010-07-19 23:44:46 +000020#include "AsmPrinter/ARMInstPrinter.h"
Chris Lattner97f06932009-10-19 20:20:46 +000021#include "ARMMachineFunctionInfo.h"
22#include "ARMMCInstLower.h"
23#include "ARMTargetMachine.h"
Dale Johannesen3f282aa2010-04-26 20:07:31 +000024#include "llvm/Analysis/DebugInfo.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000025#include "llvm/Constants.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000026#include "llvm/Module.h"
Benjamin Kramere55b15f2009-12-28 12:27:56 +000027#include "llvm/Type.h"
Dan Gohmancf20ac42009-08-13 01:36:44 +000028#include "llvm/Assembly/Writer.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000029#include "llvm/CodeGen/AsmPrinter.h"
Chris Lattnerb0f294c2009-10-19 18:38:33 +000030#include "llvm/CodeGen/MachineModuleInfoImpls.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000031#include "llvm/CodeGen/MachineFunctionPass.h"
Evan Chenga8e29892007-01-19 07:51:42 +000032#include "llvm/CodeGen/MachineJumpTableInfo.h"
Anton Korobeynikov362dd0b2010-02-15 22:37:53 +000033#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
Chris Lattnerb0f294c2009-10-19 18:38:33 +000034#include "llvm/MC/MCAsmInfo.h"
35#include "llvm/MC/MCContext.h"
Bill Wendlingbecd83e2010-03-09 00:40:17 +000036#include "llvm/MC/MCExpr.h"
Chris Lattner97f06932009-10-19 20:20:46 +000037#include "llvm/MC/MCInst.h"
Chris Lattnerf9bdedd2009-08-10 18:15:01 +000038#include "llvm/MC/MCSectionMachO.h"
Chris Lattner6c2f9e12009-08-19 05:49:37 +000039#include "llvm/MC/MCStreamer.h"
Chris Lattner325d3dc2009-09-13 17:14:04 +000040#include "llvm/MC/MCSymbol.h"
Chris Lattnerd62f1b42010-03-12 21:19:23 +000041#include "llvm/Target/Mangler.h"
Rafael Espindolab01c4bb2006-07-27 11:38:51 +000042#include "llvm/Target/TargetData.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000043#include "llvm/Target/TargetMachine.h"
Evan Cheng5be54b02007-01-19 19:25:36 +000044#include "llvm/Target/TargetOptions.h"
Daniel Dunbar51b198a2009-07-15 20:24:03 +000045#include "llvm/Target/TargetRegistry.h"
Evan Chengc324ecb2009-07-24 18:19:46 +000046#include "llvm/ADT/SmallPtrSet.h"
Jim Grosbachc40d9f92009-09-01 18:49:12 +000047#include "llvm/ADT/SmallString.h"
Bob Wilson54c78ef2009-11-06 23:33:28 +000048#include "llvm/ADT/StringExtras.h"
Chris Lattner97f06932009-10-19 20:20:46 +000049#include "llvm/Support/CommandLine.h"
Devang Patel59135f42010-08-04 22:39:39 +000050#include "llvm/Support/Debug.h"
Torok Edwin30464702009-07-08 20:55:50 +000051#include "llvm/Support/ErrorHandling.h"
Chris Lattnerb23569a2010-04-04 08:18:47 +000052#include "llvm/Support/raw_ostream.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000053#include <cctype>
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000054using namespace llvm;
55
Chris Lattner97f06932009-10-19 20:20:46 +000056static cl::opt<bool>
57EnableMCInst("enable-arm-mcinst-printer", cl::Hidden,
58 cl::desc("enable experimental asmprinter gunk in the arm backend"));
59
Jim Grosbach91729002010-07-21 23:03:52 +000060namespace llvm {
61 namespace ARM {
62 enum DW_ISA {
63 DW_ISA_ARM_thumb = 1,
64 DW_ISA_ARM_arm = 2
65 };
66 }
67}
68
Chris Lattner95b2c7d2006-12-19 22:59:26 +000069namespace {
Chris Lattner4a071d62009-10-19 17:59:19 +000070 class ARMAsmPrinter : public AsmPrinter {
Evan Chenga8e29892007-01-19 07:51:42 +000071
72 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
73 /// make the right decision when printing asm code for different targets.
74 const ARMSubtarget *Subtarget;
75
76 /// AFI - Keep a pointer to ARMFunctionInfo for the current
Evan Cheng6d63a722008-09-18 07:27:23 +000077 /// MachineFunction.
Evan Chenga8e29892007-01-19 07:51:42 +000078 ARMFunctionInfo *AFI;
79
Evan Cheng6d63a722008-09-18 07:27:23 +000080 /// MCP - Keep a pointer to constantpool entries of the current
81 /// MachineFunction.
82 const MachineConstantPool *MCP;
83
Bill Wendling57f0db82009-02-24 08:30:20 +000084 public:
Chris Lattnerb23569a2010-04-04 08:18:47 +000085 explicit ARMAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
86 : AsmPrinter(TM, Streamer), AFI(NULL), MCP(NULL) {
Bill Wendling57f0db82009-02-24 08:30:20 +000087 Subtarget = &TM.getSubtarget<ARMSubtarget>();
88 }
89
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000090 virtual const char *getPassName() const {
91 return "ARM Assembly Printer";
92 }
Jim Grosbachb0739b72010-09-02 01:02:06 +000093
Chris Lattner97f06932009-10-19 20:20:46 +000094 void printInstructionThroughMCStreamer(const MachineInstr *MI);
Jim Grosbachb0739b72010-09-02 01:02:06 +000095
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000096
Chris Lattner35c33bd2010-04-04 04:47:45 +000097 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +000098 const char *Modifier = 0);
Chris Lattner35c33bd2010-04-04 04:47:45 +000099 void printSOImmOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
100 void printSOImm2PartOperand(const MachineInstr *MI, int OpNum,
101 raw_ostream &O);
102 void printSORegOperand(const MachineInstr *MI, int OpNum,
103 raw_ostream &O);
104 void printAddrMode2Operand(const MachineInstr *MI, int OpNum,
105 raw_ostream &O);
106 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum,
107 raw_ostream &O);
108 void printAddrMode3Operand(const MachineInstr *MI, int OpNum,
109 raw_ostream &O);
110 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum,
111 raw_ostream &O);
112 void printAddrMode4Operand(const MachineInstr *MI, int OpNum,raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000113 const char *Modifier = 0);
Chris Lattner35c33bd2010-04-04 04:47:45 +0000114 void printAddrMode5Operand(const MachineInstr *MI, int OpNum,raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000115 const char *Modifier = 0);
Chris Lattner35c33bd2010-04-04 04:47:45 +0000116 void printAddrMode6Operand(const MachineInstr *MI, int OpNum,
117 raw_ostream &O);
118 void printAddrMode6OffsetOperand(const MachineInstr *MI, int OpNum,
119 raw_ostream &O);
Evan Cheng055b0312009-06-29 07:51:04 +0000120 void printAddrModePCOperand(const MachineInstr *MI, int OpNum,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000121 raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000122 const char *Modifier = 0);
Bob Wilsoneaf1c982010-08-11 23:10:46 +0000123 void printBitfieldInvMaskImmOperand(const MachineInstr *MI, int OpNum,
124 raw_ostream &O);
Johnny Chen1adc40c2010-08-12 20:46:17 +0000125 void printMemBOption(const MachineInstr *MI, int OpNum,
126 raw_ostream &O);
Bob Wilson22f5dc72010-08-16 18:27:34 +0000127 void printShiftImmOperand(const MachineInstr *MI, int OpNum,
Bob Wilsoneaf1c982010-08-11 23:10:46 +0000128 raw_ostream &O);
Evan Cheng9cb9e672009-06-27 02:26:13 +0000129
Chris Lattner35c33bd2010-04-04 04:47:45 +0000130 void printThumbS4ImmOperand(const MachineInstr *MI, int OpNum,
131 raw_ostream &O);
132 void printThumbITMask(const MachineInstr *MI, int OpNum, raw_ostream &O);
133 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum,
134 raw_ostream &O);
Evan Cheng055b0312009-06-29 07:51:04 +0000135 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000136 raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000137 unsigned Scale);
Chris Lattner35c33bd2010-04-04 04:47:45 +0000138 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum,
139 raw_ostream &O);
140 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum,
141 raw_ostream &O);
142 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum,
143 raw_ostream &O);
144 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum,
145 raw_ostream &O);
Evan Cheng9cb9e672009-06-27 02:26:13 +0000146
Chris Lattner35c33bd2010-04-04 04:47:45 +0000147 void printT2SOOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
148 void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum,
149 raw_ostream &O);
150 void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum,
151 raw_ostream &O);
152 void printT2AddrModeImm8s4Operand(const MachineInstr *MI, int OpNum,
153 raw_ostream &O);
154 void printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, int OpNum,
155 raw_ostream &O);
156 void printT2AddrModeImm8s4OffsetOperand(const MachineInstr *MI, int OpNum,
157 raw_ostream &O) {}
158 void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum,
159 raw_ostream &O);
Evan Cheng9cb9e672009-06-27 02:26:13 +0000160
Chris Lattner35c33bd2010-04-04 04:47:45 +0000161 void printCPSOptionOperand(const MachineInstr *MI, int OpNum,
162 raw_ostream &O) {}
163 void printMSRMaskOperand(const MachineInstr *MI, int OpNum,
164 raw_ostream &O) {}
165 void printNegZeroOperand(const MachineInstr *MI, int OpNum,
166 raw_ostream &O) {}
167 void printPredicateOperand(const MachineInstr *MI, int OpNum,
168 raw_ostream &O);
169 void printMandatoryPredicateOperand(const MachineInstr *MI, int OpNum,
170 raw_ostream &O);
171 void printSBitModifierOperand(const MachineInstr *MI, int OpNum,
172 raw_ostream &O);
173 void printPCLabel(const MachineInstr *MI, int OpNum,
174 raw_ostream &O);
175 void printRegisterList(const MachineInstr *MI, int OpNum,
176 raw_ostream &O);
Evan Cheng055b0312009-06-29 07:51:04 +0000177 void printCPInstOperand(const MachineInstr *MI, int OpNum,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000178 raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000179 const char *Modifier);
Chris Lattner35c33bd2010-04-04 04:47:45 +0000180 void printJTBlockOperand(const MachineInstr *MI, int OpNum,
181 raw_ostream &O);
182 void printJT2BlockOperand(const MachineInstr *MI, int OpNum,
183 raw_ostream &O);
184 void printTBAddrMode(const MachineInstr *MI, int OpNum,
185 raw_ostream &O);
186 void printNoHashImmediate(const MachineInstr *MI, int OpNum,
187 raw_ostream &O);
188 void printVFPf32ImmOperand(const MachineInstr *MI, int OpNum,
189 raw_ostream &O);
190 void printVFPf64ImmOperand(const MachineInstr *MI, int OpNum,
191 raw_ostream &O);
Bob Wilson1a913ed2010-06-11 21:34:50 +0000192 void printNEONModImmOperand(const MachineInstr *MI, int OpNum,
193 raw_ostream &O);
Bob Wilson54c78ef2009-11-06 23:33:28 +0000194
Evan Cheng055b0312009-06-29 07:51:04 +0000195 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
Chris Lattnerc75c0282010-04-04 05:29:35 +0000196 unsigned AsmVariant, const char *ExtraCode,
197 raw_ostream &O);
Evan Cheng055b0312009-06-29 07:51:04 +0000198 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
Bob Wilson224c2442009-05-19 05:53:42 +0000199 unsigned AsmVariant,
Chris Lattnerc75c0282010-04-04 05:29:35 +0000200 const char *ExtraCode, raw_ostream &O);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000201
Chris Lattner35c33bd2010-04-04 04:47:45 +0000202 void printInstruction(const MachineInstr *MI, raw_ostream &O); // autogen
Chris Lattnerd95148f2009-09-13 20:19:22 +0000203 static const char *getRegisterName(unsigned RegNo);
Chris Lattner05af2612009-09-13 20:08:00 +0000204
Chris Lattnera786cea2010-01-28 01:10:34 +0000205 virtual void EmitInstruction(const MachineInstr *MI);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000206 bool runOnMachineFunction(MachineFunction &F);
Jim Grosbachb0739b72010-09-02 01:02:06 +0000207
Chris Lattnera2406192010-01-28 00:19:24 +0000208 virtual void EmitConstantPool() {} // we emit constant pools customly!
Chris Lattner953ebb72010-01-27 23:58:11 +0000209 virtual void EmitFunctionEntryLabel();
Bob Wilson812209a2009-09-30 22:06:26 +0000210 void EmitStartOfAsmFile(Module &M);
Chris Lattner4a071d62009-10-19 17:59:19 +0000211 void EmitEndOfAsmFile(Module &M);
Evan Chenga8e29892007-01-19 07:51:42 +0000212
Devang Patel59135f42010-08-04 22:39:39 +0000213 MachineLocation getDebugValueLocation(const MachineInstr *MI) const {
214 MachineLocation Location;
215 assert (MI->getNumOperands() == 4 && "Invalid no. of machine operands!");
216 // Frame address. Currently handles register +- offset only.
217 if (MI->getOperand(0).isReg() && MI->getOperand(1).isImm())
218 Location.set(MI->getOperand(0).getReg(), MI->getOperand(1).getImm());
219 else {
220 DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n");
221 }
222 return Location;
223 }
224
Jim Grosbach91729002010-07-21 23:03:52 +0000225 virtual unsigned getISAEncoding() {
226 // ARM/Darwin adds ISA to the DWARF info for each function.
227 if (!Subtarget->isTargetDarwin())
228 return 0;
229 return Subtarget->isThumb() ?
230 llvm::ARM::DW_ISA_ARM_thumb : llvm::ARM::DW_ISA_ARM_arm;
231 }
232
Chris Lattner0890cf12010-01-25 19:51:38 +0000233 MCSymbol *GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2,
234 const MachineBasicBlock *MBB) const;
235 MCSymbol *GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const;
Chris Lattnerbfcb0962010-01-25 19:39:52 +0000236
Evan Cheng711b6dc2008-08-08 06:56:16 +0000237 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
238 /// the .s file.
Evan Chenga8e29892007-01-19 07:51:42 +0000239 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
Chris Lattner9d7efd32010-04-04 07:05:53 +0000240 SmallString<128> Str;
241 raw_svector_ostream OS(Str);
242 EmitMachineConstantPoolValue(MCPV, OS);
243 OutStreamer.EmitRawText(OS.str());
244 }
Jim Grosbachb0739b72010-09-02 01:02:06 +0000245
Chris Lattner9d7efd32010-04-04 07:05:53 +0000246 void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV,
247 raw_ostream &O) {
Chris Lattnerea3cb402010-01-20 07:33:29 +0000248 switch (TM.getTargetData()->getTypeAllocSize(MCPV->getType())) {
249 case 1: O << MAI->getData8bitsDirective(0); break;
250 case 2: O << MAI->getData16bitsDirective(0); break;
251 case 4: O << MAI->getData32bitsDirective(0); break;
252 default: assert(0 && "Unknown CPV size");
253 }
Evan Chenga8e29892007-01-19 07:51:42 +0000254
Evan Cheng711b6dc2008-08-08 06:56:16 +0000255 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
Jim Grosbach3fb2b1e2009-09-01 01:57:56 +0000256
257 if (ACPV->isLSDA()) {
Chris Lattner9d7efd32010-04-04 07:05:53 +0000258 O << MAI->getPrivateGlobalPrefix() << "_LSDA_" << getFunctionNumber();
Bob Wilson28989a82009-11-02 16:59:06 +0000259 } else if (ACPV->isBlockAddress()) {
Chris Lattner0752cda2010-04-05 16:32:14 +0000260 O << *GetBlockAddressSymbol(ACPV->getBlockAddress());
Bob Wilson28989a82009-11-02 16:59:06 +0000261 } else if (ACPV->isGlobalValue()) {
Dan Gohman46510a72010-04-15 01:51:59 +0000262 const GlobalValue *GV = ACPV->getGV();
Evan Chenge4e4ed32009-08-28 23:18:09 +0000263 bool isIndirect = Subtarget->isTargetDarwin() &&
Evan Cheng63476a82009-09-03 07:04:02 +0000264 Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel());
Evan Chenge4e4ed32009-08-28 23:18:09 +0000265 if (!isIndirect)
Chris Lattnerd62f1b42010-03-12 21:19:23 +0000266 O << *Mang->getSymbol(GV);
Evan Chenge4e4ed32009-08-28 23:18:09 +0000267 else {
268 // FIXME: Remove this when Darwin transition to @GOT like syntax.
Chris Lattner7a2ba942010-01-16 18:37:32 +0000269 MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
Chris Lattner10b318b2010-01-17 21:43:43 +0000270 O << *Sym;
Jim Grosbachb0739b72010-09-02 01:02:06 +0000271
Chris Lattnerb8f64a72009-10-19 18:49:14 +0000272 MachineModuleInfoMachO &MMIMachO =
273 MMI->getObjFileInfo<MachineModuleInfoMachO>();
Bill Wendlingcebae362010-03-10 22:34:10 +0000274 MachineModuleInfoImpl::StubValueTy &StubSym =
Chris Lattnerb8f64a72009-10-19 18:49:14 +0000275 GV->hasHiddenVisibility() ? MMIMachO.getHiddenGVStubEntry(Sym) :
276 MMIMachO.getGVStubEntry(Sym);
Bill Wendlingcebae362010-03-10 22:34:10 +0000277 if (StubSym.getPointer() == 0)
278 StubSym = MachineModuleInfoImpl::
Chris Lattnerd62f1b42010-03-12 21:19:23 +0000279 StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage());
Evan Chenge4e4ed32009-08-28 23:18:09 +0000280 }
Bob Wilson28989a82009-11-02 16:59:06 +0000281 } else {
282 assert(ACPV->isExtSymbol() && "unrecognized constant pool value");
Chris Lattner10b318b2010-01-17 21:43:43 +0000283 O << *GetExternalSymbolSymbol(ACPV->getSymbol());
Bob Wilson28989a82009-11-02 16:59:06 +0000284 }
Jim Grosbache9952212009-09-04 01:38:51 +0000285
Lauro Ramos Venancio0ae4a332007-04-22 00:04:12 +0000286 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
Lauro Ramos Venancio64f4fa52007-04-27 13:54:47 +0000287 if (ACPV->getPCAdjustment() != 0) {
Chris Lattner33adcfb2009-08-22 21:43:10 +0000288 O << "-(" << MAI->getPrivateGlobalPrefix() << "PC"
Evan Chenge7e0d622009-11-06 22:24:13 +0000289 << getFunctionNumber() << "_" << ACPV->getLabelId()
Lauro Ramos Venancio64f4fa52007-04-27 13:54:47 +0000290 << "+" << (unsigned)ACPV->getPCAdjustment();
291 if (ACPV->mustAddCurrentAddress())
292 O << "-.";
Chris Lattner8b378752010-01-15 23:26:49 +0000293 O << ')';
Lauro Ramos Venancio64f4fa52007-04-27 13:54:47 +0000294 }
Evan Chenga8e29892007-01-19 07:51:42 +0000295 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000296 };
297} // end of anonymous namespace
298
299#include "ARMGenAsmWriter.inc"
300
Chris Lattner953ebb72010-01-27 23:58:11 +0000301void ARMAsmPrinter::EmitFunctionEntryLabel() {
302 if (AFI->isThumbFunction()) {
Chris Lattner9d7efd32010-04-04 07:05:53 +0000303 OutStreamer.EmitRawText(StringRef("\t.code\t16"));
Chris Lattner0752cda2010-04-05 16:32:14 +0000304 if (!Subtarget->isTargetDarwin())
Chris Lattner9d7efd32010-04-04 07:05:53 +0000305 OutStreamer.EmitRawText(StringRef("\t.thumb_func"));
Chris Lattner0752cda2010-04-05 16:32:14 +0000306 else {
307 // This needs to emit to a temporary string to get properly quoted
308 // MCSymbols when they have spaces in them.
309 SmallString<128> Tmp;
310 raw_svector_ostream OS(Tmp);
311 OS << "\t.thumb_func\t" << *CurrentFnSym;
312 OutStreamer.EmitRawText(OS.str());
313 }
Chris Lattner953ebb72010-01-27 23:58:11 +0000314 }
Jim Grosbachb0739b72010-09-02 01:02:06 +0000315
Chris Lattner953ebb72010-01-27 23:58:11 +0000316 OutStreamer.EmitLabel(CurrentFnSym);
317}
318
Evan Chenga8e29892007-01-19 07:51:42 +0000319/// runOnMachineFunction - This uses the printInstruction()
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000320/// method to print assembly for each instruction.
321///
322bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
Evan Chenga8e29892007-01-19 07:51:42 +0000323 AFI = MF.getInfo<ARMFunctionInfo>();
Evan Cheng6d63a722008-09-18 07:27:23 +0000324 MCP = MF.getConstantPool();
Rafael Espindola4b442b52006-05-23 02:48:20 +0000325
Chris Lattnerd49fe1b2010-01-28 01:28:58 +0000326 return AsmPrinter::runOnMachineFunction(MF);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000327}
328
Evan Cheng055b0312009-06-29 07:51:04 +0000329void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000330 raw_ostream &O, const char *Modifier) {
Evan Cheng055b0312009-06-29 07:51:04 +0000331 const MachineOperand &MO = MI->getOperand(OpNum);
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000332 unsigned TF = MO.getTargetFlags();
333
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000334 switch (MO.getType()) {
Chris Lattner8bc86cb2009-10-19 20:59:55 +0000335 default:
336 assert(0 && "<unknown operand type>");
Bob Wilson5bafff32009-06-22 23:27:02 +0000337 case MachineOperand::MO_Register: {
338 unsigned Reg = MO.getReg();
Chris Lattner8bc86cb2009-10-19 20:59:55 +0000339 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
Bob Wilsonde0ae8f2010-09-16 04:55:00 +0000340 if (Modifier && strcmp(Modifier, "lane") == 0) {
Jim Grosbacha4c3c8f2010-09-15 20:26:25 +0000341 unsigned RegNum = getARMRegisterNumbering(Reg);
Chris Lattner9d1c1ad2010-04-04 18:06:11 +0000342 unsigned DReg =
Jakob Stoklund Olesene00fa642010-05-25 00:15:15 +0000343 TM.getRegisterInfo()->getMatchingSuperReg(Reg,
344 RegNum & 1 ? ARM::ssub_1 : ARM::ssub_0, &ARM::DPR_VFP2RegClass);
Chris Lattner8bc86cb2009-10-19 20:59:55 +0000345 O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']';
346 } else {
Anton Korobeynikove8ea0112009-11-07 15:20:32 +0000347 assert(!MO.getSubReg() && "Subregs should be eliminated!");
Chris Lattner8bc86cb2009-10-19 20:59:55 +0000348 O << getRegisterName(Reg);
349 }
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000350 break;
Bob Wilson5bafff32009-06-22 23:27:02 +0000351 }
Evan Chenga8e29892007-01-19 07:51:42 +0000352 case MachineOperand::MO_Immediate: {
Evan Cheng5adb66a2009-09-28 09:14:39 +0000353 int64_t Imm = MO.getImm();
Anton Korobeynikov632606c2009-10-08 20:43:22 +0000354 O << '#';
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000355 if ((Modifier && strcmp(Modifier, "lo16") == 0) ||
356 (TF & ARMII::MO_LO16))
357 O << ":lower16:";
358 else if ((Modifier && strcmp(Modifier, "hi16") == 0) ||
359 (TF & ARMII::MO_HI16))
360 O << ":upper16:";
Anton Korobeynikov632606c2009-10-08 20:43:22 +0000361 O << Imm;
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000362 break;
Evan Chenga8e29892007-01-19 07:51:42 +0000363 }
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000364 case MachineOperand::MO_MachineBasicBlock:
Chris Lattner1b2eb0e2010-03-13 21:04:28 +0000365 O << *MO.getMBB()->getSymbol();
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000366 return;
Rafael Espindola84b19be2006-07-16 01:02:57 +0000367 case MachineOperand::MO_GlobalAddress: {
Evan Chenga8e29892007-01-19 07:51:42 +0000368 bool isCallOp = Modifier && !strcmp(Modifier, "call");
Dan Gohman46510a72010-04-15 01:51:59 +0000369 const GlobalValue *GV = MO.getGlobal();
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000370
371 if ((Modifier && strcmp(Modifier, "lo16") == 0) ||
372 (TF & ARMII::MO_LO16))
373 O << ":lower16:";
374 else if ((Modifier && strcmp(Modifier, "hi16") == 0) ||
375 (TF & ARMII::MO_HI16))
376 O << ":upper16:";
Chris Lattnerd62f1b42010-03-12 21:19:23 +0000377 O << *Mang->getSymbol(GV);
Anton Korobeynikov7751ad92008-11-22 16:15:34 +0000378
Chris Lattner0c08d092010-04-03 22:28:33 +0000379 printOffset(MO.getOffset(), O);
Anton Korobeynikov7751ad92008-11-22 16:15:34 +0000380
Lauro Ramos Venancio0ae4a332007-04-22 00:04:12 +0000381 if (isCallOp && Subtarget->isTargetELF() &&
382 TM.getRelocationModel() == Reloc::PIC_)
383 O << "(PLT)";
Evan Chenga8e29892007-01-19 07:51:42 +0000384 break;
Rafael Espindola84b19be2006-07-16 01:02:57 +0000385 }
Evan Chenga8e29892007-01-19 07:51:42 +0000386 case MachineOperand::MO_ExternalSymbol: {
387 bool isCallOp = Modifier && !strcmp(Modifier, "call");
Chris Lattner10b318b2010-01-17 21:43:43 +0000388 O << *GetExternalSymbolSymbol(MO.getSymbolName());
Jim Grosbachb0739b72010-09-02 01:02:06 +0000389
Lauro Ramos Venancio0ae4a332007-04-22 00:04:12 +0000390 if (isCallOp && Subtarget->isTargetELF() &&
391 TM.getRelocationModel() == Reloc::PIC_)
392 O << "(PLT)";
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000393 break;
Evan Chenga8e29892007-01-19 07:51:42 +0000394 }
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000395 case MachineOperand::MO_ConstantPoolIndex:
Chris Lattner1b46f432010-01-23 07:00:21 +0000396 O << *GetCPISymbol(MO.getIndex());
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000397 break;
Evan Chenga8e29892007-01-19 07:51:42 +0000398 case MachineOperand::MO_JumpTableIndex:
Chris Lattner1b46f432010-01-23 07:00:21 +0000399 O << *GetJTISymbol(MO.getIndex());
Evan Chenga8e29892007-01-19 07:51:42 +0000400 break;
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000401 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000402}
403
Chris Lattner35c33bd2010-04-04 04:47:45 +0000404static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
Chris Lattner33adcfb2009-08-22 21:43:10 +0000405 const MCAsmInfo *MAI) {
Evan Chenge7cbe412009-07-08 21:03:57 +0000406 // Break it up into two parts that make up a shifter immediate.
407 V = ARM_AM::getSOImmVal(V);
408 assert(V != -1 && "Not a valid so_imm value!");
409
Evan Chengc70d1842007-03-20 08:11:30 +0000410 unsigned Imm = ARM_AM::getSOImmValImm(V);
411 unsigned Rot = ARM_AM::getSOImmValRot(V);
Anton Korobeynikov7751ad92008-11-22 16:15:34 +0000412
Evan Chenga8e29892007-01-19 07:51:42 +0000413 // Print low-level immediate formation info, per
414 // A5.1.3: "Data-processing operands - Immediate".
415 if (Rot) {
416 O << "#" << Imm << ", " << Rot;
417 // Pretty printed version.
Evan Cheng39382422009-10-28 01:44:26 +0000418 if (VerboseAsm) {
Chris Lattner35c33bd2010-04-04 04:47:45 +0000419 O << "\t" << MAI->getCommentString() << ' ';
Evan Cheng39382422009-10-28 01:44:26 +0000420 O << (int)ARM_AM::rotr32(Imm, Rot);
421 }
Evan Chenga8e29892007-01-19 07:51:42 +0000422 } else {
423 O << "#" << Imm;
424 }
425}
426
Evan Chengc70d1842007-03-20 08:11:30 +0000427/// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
428/// immediate in bits 0-7.
Chris Lattner35c33bd2010-04-04 04:47:45 +0000429void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum,
430 raw_ostream &O) {
Evan Chengc70d1842007-03-20 08:11:30 +0000431 const MachineOperand &MO = MI->getOperand(OpNum);
Dan Gohmand735b802008-10-03 15:45:36 +0000432 assert(MO.isImm() && "Not a valid so_imm value!");
Chris Lattner3f53c832010-04-04 18:52:31 +0000433 printSOImm(O, MO.getImm(), isVerbose(), MAI);
Evan Chengc70d1842007-03-20 08:11:30 +0000434}
435
Evan Cheng90922132008-11-06 02:25:39 +0000436/// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
437/// followed by an 'orr' to materialize.
Chris Lattner35c33bd2010-04-04 04:47:45 +0000438void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum,
439 raw_ostream &O) {
Evan Chengc70d1842007-03-20 08:11:30 +0000440 const MachineOperand &MO = MI->getOperand(OpNum);
Dan Gohmand735b802008-10-03 15:45:36 +0000441 assert(MO.isImm() && "Not a valid so_imm value!");
Chris Lattner9a1ceae2007-12-30 20:49:49 +0000442 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
443 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
Chris Lattner3f53c832010-04-04 18:52:31 +0000444 printSOImm(O, V1, isVerbose(), MAI);
Evan Cheng5e148a32007-06-05 18:55:18 +0000445 O << "\n\torr";
Chris Lattner35c33bd2010-04-04 04:47:45 +0000446 printPredicateOperand(MI, 2, O);
Evan Cheng162e3092009-10-26 23:45:59 +0000447 O << "\t";
Chris Lattner35c33bd2010-04-04 04:47:45 +0000448 printOperand(MI, 0, O);
Evan Chengc70d1842007-03-20 08:11:30 +0000449 O << ", ";
Chris Lattner35c33bd2010-04-04 04:47:45 +0000450 printOperand(MI, 0, O);
Evan Chengc70d1842007-03-20 08:11:30 +0000451 O << ", ";
Chris Lattner3f53c832010-04-04 18:52:31 +0000452 printSOImm(O, V2, isVerbose(), MAI);
Evan Chengc70d1842007-03-20 08:11:30 +0000453}
454
Evan Chenga8e29892007-01-19 07:51:42 +0000455// so_reg is a 4-operand unit corresponding to register forms of the A5.1
456// "Addressing Mode 1 - Data-processing operands" forms. This includes:
Evan Cheng9cb9e672009-06-27 02:26:13 +0000457// REG 0 0 - e.g. R5
458// REG REG 0,SH_OPC - e.g. R5, ROR R3
Evan Chenga8e29892007-01-19 07:51:42 +0000459// REG 0 IMM,SH_OPC - e.g. R5, LSL #3
Chris Lattner35c33bd2010-04-04 04:47:45 +0000460void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op,
461 raw_ostream &O) {
Evan Chenga8e29892007-01-19 07:51:42 +0000462 const MachineOperand &MO1 = MI->getOperand(Op);
463 const MachineOperand &MO2 = MI->getOperand(Op+1);
464 const MachineOperand &MO3 = MI->getOperand(Op+2);
465
Chris Lattner762ccea2009-09-13 20:31:40 +0000466 O << getRegisterName(MO1.getReg());
Evan Chenga8e29892007-01-19 07:51:42 +0000467
468 // Print the shift opc.
Bob Wilson1d9125a2010-08-05 00:34:42 +0000469 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm());
470 O << ", " << ARM_AM::getShiftOpcStr(ShOpc);
Evan Chenga8e29892007-01-19 07:51:42 +0000471 if (MO2.getReg()) {
Bob Wilson1d9125a2010-08-05 00:34:42 +0000472 O << ' ' << getRegisterName(MO2.getReg());
Evan Chenga8e29892007-01-19 07:51:42 +0000473 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
Bob Wilson1d9125a2010-08-05 00:34:42 +0000474 } else if (ShOpc != ARM_AM::rrx) {
475 O << " #" << ARM_AM::getSORegOffset(MO3.getImm());
Evan Chenga8e29892007-01-19 07:51:42 +0000476 }
477}
478
Chris Lattner35c33bd2010-04-04 04:47:45 +0000479void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op,
480 raw_ostream &O) {
Evan Chenga8e29892007-01-19 07:51:42 +0000481 const MachineOperand &MO1 = MI->getOperand(Op);
482 const MachineOperand &MO2 = MI->getOperand(Op+1);
483 const MachineOperand &MO3 = MI->getOperand(Op+2);
484
Dan Gohmand735b802008-10-03 15:45:36 +0000485 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
Chris Lattner35c33bd2010-04-04 04:47:45 +0000486 printOperand(MI, Op, O);
Evan Chenga8e29892007-01-19 07:51:42 +0000487 return;
488 }
489
Chris Lattner762ccea2009-09-13 20:31:40 +0000490 O << "[" << getRegisterName(MO1.getReg());
Evan Chenga8e29892007-01-19 07:51:42 +0000491
492 if (!MO2.getReg()) {
Johnny Chen9e088762010-03-17 17:52:21 +0000493 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
Evan Chenga8e29892007-01-19 07:51:42 +0000494 O << ", #"
Johnny Chen9e088762010-03-17 17:52:21 +0000495 << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO3.getImm()))
Evan Chenga8e29892007-01-19 07:51:42 +0000496 << ARM_AM::getAM2Offset(MO3.getImm());
497 O << "]";
498 return;
499 }
500
501 O << ", "
Johnny Chen9e088762010-03-17 17:52:21 +0000502 << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO3.getImm()))
Chris Lattner762ccea2009-09-13 20:31:40 +0000503 << getRegisterName(MO2.getReg());
Jim Grosbache9952212009-09-04 01:38:51 +0000504
Evan Chenga8e29892007-01-19 07:51:42 +0000505 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
506 O << ", "
Chris Lattner9a1ceae2007-12-30 20:49:49 +0000507 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
Evan Chenga8e29892007-01-19 07:51:42 +0000508 << " #" << ShImm;
509 O << "]";
510}
511
Chris Lattner35c33bd2010-04-04 04:47:45 +0000512void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op,
513 raw_ostream &O) {
Evan Chenga8e29892007-01-19 07:51:42 +0000514 const MachineOperand &MO1 = MI->getOperand(Op);
515 const MachineOperand &MO2 = MI->getOperand(Op+1);
516
517 if (!MO1.getReg()) {
Evan Chengbdc98692007-05-03 23:30:36 +0000518 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
Evan Chengbdc98692007-05-03 23:30:36 +0000519 O << "#"
Johnny Chen9e088762010-03-17 17:52:21 +0000520 << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO2.getImm()))
Evan Chengbdc98692007-05-03 23:30:36 +0000521 << ImmOffs;
Evan Chenga8e29892007-01-19 07:51:42 +0000522 return;
523 }
524
Johnny Chen9e088762010-03-17 17:52:21 +0000525 O << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO2.getImm()))
Chris Lattner762ccea2009-09-13 20:31:40 +0000526 << getRegisterName(MO1.getReg());
Jim Grosbache9952212009-09-04 01:38:51 +0000527
Evan Chenga8e29892007-01-19 07:51:42 +0000528 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
529 O << ", "
Chris Lattner9a1ceae2007-12-30 20:49:49 +0000530 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
Evan Chenga8e29892007-01-19 07:51:42 +0000531 << " #" << ShImm;
532}
533
Chris Lattner35c33bd2010-04-04 04:47:45 +0000534void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op,
535 raw_ostream &O) {
Evan Chenga8e29892007-01-19 07:51:42 +0000536 const MachineOperand &MO1 = MI->getOperand(Op);
537 const MachineOperand &MO2 = MI->getOperand(Op+1);
538 const MachineOperand &MO3 = MI->getOperand(Op+2);
Jim Grosbache9952212009-09-04 01:38:51 +0000539
Dan Gohman6f0d0242008-02-10 18:45:23 +0000540 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
Chris Lattner762ccea2009-09-13 20:31:40 +0000541 O << "[" << getRegisterName(MO1.getReg());
Evan Chenga8e29892007-01-19 07:51:42 +0000542
543 if (MO2.getReg()) {
544 O << ", "
545 << (char)ARM_AM::getAM3Op(MO3.getImm())
Chris Lattner762ccea2009-09-13 20:31:40 +0000546 << getRegisterName(MO2.getReg())
Evan Chenga8e29892007-01-19 07:51:42 +0000547 << "]";
548 return;
549 }
Jim Grosbache9952212009-09-04 01:38:51 +0000550
Evan Chenga8e29892007-01-19 07:51:42 +0000551 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
552 O << ", #"
Johnny Chen9e088762010-03-17 17:52:21 +0000553 << ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO3.getImm()))
Evan Chenga8e29892007-01-19 07:51:42 +0000554 << ImmOffs;
555 O << "]";
556}
557
Chris Lattner35c33bd2010-04-04 04:47:45 +0000558void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op,
559 raw_ostream &O){
Evan Chenga8e29892007-01-19 07:51:42 +0000560 const MachineOperand &MO1 = MI->getOperand(Op);
561 const MachineOperand &MO2 = MI->getOperand(Op+1);
562
563 if (MO1.getReg()) {
564 O << (char)ARM_AM::getAM3Op(MO2.getImm())
Chris Lattner762ccea2009-09-13 20:31:40 +0000565 << getRegisterName(MO1.getReg());
Evan Chenga8e29892007-01-19 07:51:42 +0000566 return;
567 }
568
569 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
570 O << "#"
Johnny Chen9e088762010-03-17 17:52:21 +0000571 << ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO2.getImm()))
Evan Chenga8e29892007-01-19 07:51:42 +0000572 << ImmOffs;
573}
Jim Grosbache9952212009-09-04 01:38:51 +0000574
Evan Chenga8e29892007-01-19 07:51:42 +0000575void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000576 raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000577 const char *Modifier) {
Evan Chenga8e29892007-01-19 07:51:42 +0000578 const MachineOperand &MO2 = MI->getOperand(Op+1);
579 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
580 if (Modifier && strcmp(Modifier, "submode") == 0) {
Bob Wilsonea7f22c2010-03-16 16:19:07 +0000581 O << ARM_AM::getAMSubModeStr(Mode);
Evan Chengd77c7ab2009-08-07 21:19:10 +0000582 } else if (Modifier && strcmp(Modifier, "wide") == 0) {
583 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
584 if (Mode == ARM_AM::ia)
585 O << ".w";
Evan Chenga8e29892007-01-19 07:51:42 +0000586 } else {
Chris Lattner35c33bd2010-04-04 04:47:45 +0000587 printOperand(MI, Op, O);
Evan Chenga8e29892007-01-19 07:51:42 +0000588 }
589}
590
591void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000592 raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000593 const char *Modifier) {
594 const MachineOperand &MO1 = MI->getOperand(Op);
595 const MachineOperand &MO2 = MI->getOperand(Op+1);
596
Dan Gohmand735b802008-10-03 15:45:36 +0000597 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
Chris Lattner35c33bd2010-04-04 04:47:45 +0000598 printOperand(MI, Op, O);
Evan Chenga8e29892007-01-19 07:51:42 +0000599 return;
600 }
Jim Grosbache9952212009-09-04 01:38:51 +0000601
Dan Gohman6f0d0242008-02-10 18:45:23 +0000602 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
Evan Chenga8e29892007-01-19 07:51:42 +0000603
Chris Lattner762ccea2009-09-13 20:31:40 +0000604 O << "[" << getRegisterName(MO1.getReg());
Jim Grosbache9952212009-09-04 01:38:51 +0000605
Evan Chenga8e29892007-01-19 07:51:42 +0000606 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
607 O << ", #"
Johnny Chen9e088762010-03-17 17:52:21 +0000608 << ARM_AM::getAddrOpcStr(ARM_AM::getAM5Op(MO2.getImm()))
Evan Chenga8e29892007-01-19 07:51:42 +0000609 << ImmOffs*4;
610 }
611 O << "]";
612}
613
Chris Lattner35c33bd2010-04-04 04:47:45 +0000614void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op,
615 raw_ostream &O) {
Bob Wilson8b024a52009-07-01 23:16:05 +0000616 const MachineOperand &MO1 = MI->getOperand(Op);
617 const MachineOperand &MO2 = MI->getOperand(Op+1);
Bob Wilson8b024a52009-07-01 23:16:05 +0000618
Jim Grosbach8a5ec862009-11-07 21:25:39 +0000619 O << "[" << getRegisterName(MO1.getReg());
Bob Wilson226036e2010-03-20 22:13:40 +0000620 if (MO2.getImm()) {
Anton Korobeynikovbce3dbd2009-11-17 20:04:59 +0000621 // FIXME: Both darwin as and GNU as violate ARM docs here.
Bob Wilson273ff312010-07-14 23:54:43 +0000622 O << ", :" << (MO2.getImm() << 3);
Jim Grosbach8a5ec862009-11-07 21:25:39 +0000623 }
624 O << "]";
Bob Wilson226036e2010-03-20 22:13:40 +0000625}
Bob Wilsona43e6bf2010-03-16 23:01:13 +0000626
Chris Lattner35c33bd2010-04-04 04:47:45 +0000627void ARMAsmPrinter::printAddrMode6OffsetOperand(const MachineInstr *MI, int Op,
628 raw_ostream &O){
Bob Wilson226036e2010-03-20 22:13:40 +0000629 const MachineOperand &MO = MI->getOperand(Op);
630 if (MO.getReg() == 0)
631 O << "!";
632 else
633 O << ", " << getRegisterName(MO.getReg());
Bob Wilson8b024a52009-07-01 23:16:05 +0000634}
635
Evan Chenga8e29892007-01-19 07:51:42 +0000636void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000637 raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000638 const char *Modifier) {
639 if (Modifier && strcmp(Modifier, "label") == 0) {
Chris Lattner35c33bd2010-04-04 04:47:45 +0000640 printPCLabel(MI, Op+1, O);
Evan Chenga8e29892007-01-19 07:51:42 +0000641 return;
642 }
643
644 const MachineOperand &MO1 = MI->getOperand(Op);
Dan Gohman6f0d0242008-02-10 18:45:23 +0000645 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
Johnny Chen9e088762010-03-17 17:52:21 +0000646 O << "[pc, " << getRegisterName(MO1.getReg()) << "]";
Evan Chenga8e29892007-01-19 07:51:42 +0000647}
648
649void
Chris Lattner35c33bd2010-04-04 04:47:45 +0000650ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op,
651 raw_ostream &O) {
Evan Chengf49810c2009-06-23 17:48:47 +0000652 const MachineOperand &MO = MI->getOperand(Op);
653 uint32_t v = ~MO.getImm();
Evan Cheng9e03cbe2009-06-25 22:04:44 +0000654 int32_t lsb = CountTrailingZeros_32(v);
Nick Lewyckyb825aaa2009-06-24 01:08:42 +0000655 int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
Evan Chengf49810c2009-06-23 17:48:47 +0000656 assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
657 O << "#" << lsb << ", #" << width;
658}
659
Johnny Chen1adc40c2010-08-12 20:46:17 +0000660void
661ARMAsmPrinter::printMemBOption(const MachineInstr *MI, int OpNum,
662 raw_ostream &O) {
663 unsigned val = MI->getOperand(OpNum).getImm();
664 O << ARM_MB::MemBOptToString(val);
665}
666
Bob Wilson22f5dc72010-08-16 18:27:34 +0000667void ARMAsmPrinter::printShiftImmOperand(const MachineInstr *MI, int OpNum,
Bob Wilsoneaf1c982010-08-11 23:10:46 +0000668 raw_ostream &O) {
669 unsigned ShiftOp = MI->getOperand(OpNum).getImm();
670 ARM_AM::ShiftOpc Opc = ARM_AM::getSORegShOp(ShiftOp);
671 switch (Opc) {
672 case ARM_AM::no_shift:
673 return;
674 case ARM_AM::lsl:
675 O << ", lsl #";
676 break;
677 case ARM_AM::asr:
678 O << ", asr #";
679 break;
680 default:
Bob Wilson22f5dc72010-08-16 18:27:34 +0000681 assert(0 && "unexpected shift opcode for shift immediate operand");
Bob Wilsoneaf1c982010-08-11 23:10:46 +0000682 }
683 O << ARM_AM::getSORegOffset(ShiftOp);
684}
685
Evan Cheng055b0312009-06-29 07:51:04 +0000686//===--------------------------------------------------------------------===//
687
Chris Lattner35c33bd2010-04-04 04:47:45 +0000688void ARMAsmPrinter::printThumbS4ImmOperand(const MachineInstr *MI, int Op,
689 raw_ostream &O) {
Evan Cheng2ef9c8a2009-11-19 06:57:41 +0000690 O << "#" << MI->getOperand(Op).getImm() * 4;
691}
692
Evan Chengf49810c2009-06-23 17:48:47 +0000693void
Chris Lattner35c33bd2010-04-04 04:47:45 +0000694ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op,
695 raw_ostream &O) {
Evan Chenge5564742009-07-09 23:43:36 +0000696 // (3 - the number of trailing zeros) is the number of then / else.
697 unsigned Mask = MI->getOperand(Op).getImm();
Johnny Chen9e088762010-03-17 17:52:21 +0000698 unsigned CondBit0 = Mask >> 4 & 1;
Evan Chenge5564742009-07-09 23:43:36 +0000699 unsigned NumTZ = CountTrailingZeros_32(Mask);
700 assert(NumTZ <= 3 && "Invalid IT mask!");
Evan Cheng06e16582009-07-10 01:54:42 +0000701 for (unsigned Pos = 3, e = NumTZ; Pos > e; --Pos) {
Johnny Chen9e088762010-03-17 17:52:21 +0000702 bool T = ((Mask >> Pos) & 1) == CondBit0;
Evan Chenge5564742009-07-09 23:43:36 +0000703 if (T)
704 O << 't';
705 else
706 O << 'e';
707 }
708}
709
710void
Chris Lattner35c33bd2010-04-04 04:47:45 +0000711ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op,
712 raw_ostream &O) {
Evan Chenga8e29892007-01-19 07:51:42 +0000713 const MachineOperand &MO1 = MI->getOperand(Op);
714 const MachineOperand &MO2 = MI->getOperand(Op+1);
Chris Lattner762ccea2009-09-13 20:31:40 +0000715 O << "[" << getRegisterName(MO1.getReg());
716 O << ", " << getRegisterName(MO2.getReg()) << "]";
Evan Chenga8e29892007-01-19 07:51:42 +0000717}
718
719void
720ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000721 raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000722 unsigned Scale) {
723 const MachineOperand &MO1 = MI->getOperand(Op);
Evan Chengcea117d2007-01-30 02:35:32 +0000724 const MachineOperand &MO2 = MI->getOperand(Op+1);
725 const MachineOperand &MO3 = MI->getOperand(Op+2);
Evan Chenga8e29892007-01-19 07:51:42 +0000726
Dan Gohmand735b802008-10-03 15:45:36 +0000727 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
Chris Lattner35c33bd2010-04-04 04:47:45 +0000728 printOperand(MI, Op, O);
Evan Chenga8e29892007-01-19 07:51:42 +0000729 return;
730 }
731
Chris Lattner762ccea2009-09-13 20:31:40 +0000732 O << "[" << getRegisterName(MO1.getReg());
Evan Chengcea117d2007-01-30 02:35:32 +0000733 if (MO3.getReg())
Chris Lattner762ccea2009-09-13 20:31:40 +0000734 O << ", " << getRegisterName(MO3.getReg());
Evan Cheng4b6bbe12009-11-10 19:48:13 +0000735 else if (unsigned ImmOffs = MO2.getImm())
Johnny Chen9e088762010-03-17 17:52:21 +0000736 O << ", #" << ImmOffs * Scale;
Evan Chenga8e29892007-01-19 07:51:42 +0000737 O << "]";
738}
739
740void
Chris Lattner35c33bd2010-04-04 04:47:45 +0000741ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op,
742 raw_ostream &O) {
743 printThumbAddrModeRI5Operand(MI, Op, O, 1);
Evan Chenga8e29892007-01-19 07:51:42 +0000744}
745void
Chris Lattner35c33bd2010-04-04 04:47:45 +0000746ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op,
747 raw_ostream &O) {
748 printThumbAddrModeRI5Operand(MI, Op, O, 2);
Evan Chenga8e29892007-01-19 07:51:42 +0000749}
750void
Chris Lattner35c33bd2010-04-04 04:47:45 +0000751ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op,
752 raw_ostream &O) {
753 printThumbAddrModeRI5Operand(MI, Op, O, 4);
Evan Chenga8e29892007-01-19 07:51:42 +0000754}
755
Chris Lattner35c33bd2010-04-04 04:47:45 +0000756void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op,
757 raw_ostream &O) {
Evan Chenga8e29892007-01-19 07:51:42 +0000758 const MachineOperand &MO1 = MI->getOperand(Op);
759 const MachineOperand &MO2 = MI->getOperand(Op+1);
Chris Lattner762ccea2009-09-13 20:31:40 +0000760 O << "[" << getRegisterName(MO1.getReg());
Evan Chenga8e29892007-01-19 07:51:42 +0000761 if (unsigned ImmOffs = MO2.getImm())
Johnny Chen9e088762010-03-17 17:52:21 +0000762 O << ", #" << ImmOffs*4;
Evan Chenga8e29892007-01-19 07:51:42 +0000763 O << "]";
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000764}
765
Evan Cheng055b0312009-06-29 07:51:04 +0000766//===--------------------------------------------------------------------===//
767
Evan Cheng9cb9e672009-06-27 02:26:13 +0000768// Constant shifts t2_so_reg is a 2-operand unit corresponding to the Thumb2
769// register with shift forms.
770// REG 0 0 - e.g. R5
771// REG IMM, SH_OPC - e.g. R5, LSL #3
Chris Lattner35c33bd2010-04-04 04:47:45 +0000772void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum,
773 raw_ostream &O) {
Evan Cheng9cb9e672009-06-27 02:26:13 +0000774 const MachineOperand &MO1 = MI->getOperand(OpNum);
775 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
776
777 unsigned Reg = MO1.getReg();
778 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
Chris Lattner762ccea2009-09-13 20:31:40 +0000779 O << getRegisterName(Reg);
Evan Cheng9cb9e672009-06-27 02:26:13 +0000780
781 // Print the shift opc.
Evan Cheng9cb9e672009-06-27 02:26:13 +0000782 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
Bob Wilson1d9125a2010-08-05 00:34:42 +0000783 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO2.getImm());
784 O << ", " << ARM_AM::getShiftOpcStr(ShOpc);
785 if (ShOpc != ARM_AM::rrx)
786 O << " #" << ARM_AM::getSORegOffset(MO2.getImm());
Evan Cheng9cb9e672009-06-27 02:26:13 +0000787}
788
Evan Cheng055b0312009-06-29 07:51:04 +0000789void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000790 int OpNum,
791 raw_ostream &O) {
Evan Cheng055b0312009-06-29 07:51:04 +0000792 const MachineOperand &MO1 = MI->getOperand(OpNum);
793 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
Evan Cheng9cb9e672009-06-27 02:26:13 +0000794
Chris Lattner762ccea2009-09-13 20:31:40 +0000795 O << "[" << getRegisterName(MO1.getReg());
Evan Cheng055b0312009-06-29 07:51:04 +0000796
797 unsigned OffImm = MO2.getImm();
798 if (OffImm) // Don't print +0.
Johnny Chen9e088762010-03-17 17:52:21 +0000799 O << ", #" << OffImm;
Evan Cheng055b0312009-06-29 07:51:04 +0000800 O << "]";
801}
802
803void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000804 int OpNum,
805 raw_ostream &O) {
Evan Cheng055b0312009-06-29 07:51:04 +0000806 const MachineOperand &MO1 = MI->getOperand(OpNum);
807 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
808
Chris Lattner762ccea2009-09-13 20:31:40 +0000809 O << "[" << getRegisterName(MO1.getReg());
Evan Cheng055b0312009-06-29 07:51:04 +0000810
811 int32_t OffImm = (int32_t)MO2.getImm();
812 // Don't print +0.
813 if (OffImm < 0)
814 O << ", #-" << -OffImm;
815 else if (OffImm > 0)
Johnny Chen9e088762010-03-17 17:52:21 +0000816 O << ", #" << OffImm;
Evan Cheng055b0312009-06-29 07:51:04 +0000817 O << "]";
818}
819
Evan Cheng5c874172009-07-09 22:21:59 +0000820void ARMAsmPrinter::printT2AddrModeImm8s4Operand(const MachineInstr *MI,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000821 int OpNum,
822 raw_ostream &O) {
Evan Cheng5c874172009-07-09 22:21:59 +0000823 const MachineOperand &MO1 = MI->getOperand(OpNum);
824 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
825
Chris Lattner762ccea2009-09-13 20:31:40 +0000826 O << "[" << getRegisterName(MO1.getReg());
Evan Cheng5c874172009-07-09 22:21:59 +0000827
828 int32_t OffImm = (int32_t)MO2.getImm() / 4;
829 // Don't print +0.
830 if (OffImm < 0)
Evan Chenga64ce452009-11-19 06:31:26 +0000831 O << ", #-" << -OffImm * 4;
Evan Cheng5c874172009-07-09 22:21:59 +0000832 else if (OffImm > 0)
Johnny Chen9e088762010-03-17 17:52:21 +0000833 O << ", #" << OffImm * 4;
Evan Cheng5c874172009-07-09 22:21:59 +0000834 O << "]";
835}
836
Evan Chenge88d5ce2009-07-02 07:28:31 +0000837void ARMAsmPrinter::printT2AddrModeImm8OffsetOperand(const MachineInstr *MI,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000838 int OpNum,
839 raw_ostream &O) {
Evan Chenge88d5ce2009-07-02 07:28:31 +0000840 const MachineOperand &MO1 = MI->getOperand(OpNum);
841 int32_t OffImm = (int32_t)MO1.getImm();
842 // Don't print +0.
843 if (OffImm < 0)
844 O << "#-" << -OffImm;
845 else if (OffImm > 0)
Johnny Chen9e088762010-03-17 17:52:21 +0000846 O << "#" << OffImm;
847}
848
Evan Cheng055b0312009-06-29 07:51:04 +0000849void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000850 int OpNum,
851 raw_ostream &O) {
Evan Cheng055b0312009-06-29 07:51:04 +0000852 const MachineOperand &MO1 = MI->getOperand(OpNum);
853 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
854 const MachineOperand &MO3 = MI->getOperand(OpNum+2);
855
Chris Lattner762ccea2009-09-13 20:31:40 +0000856 O << "[" << getRegisterName(MO1.getReg());
Evan Cheng055b0312009-06-29 07:51:04 +0000857
Evan Cheng3a214252009-08-11 08:52:18 +0000858 assert(MO2.getReg() && "Invalid so_reg load / store address!");
Chris Lattner762ccea2009-09-13 20:31:40 +0000859 O << ", " << getRegisterName(MO2.getReg());
Evan Cheng055b0312009-06-29 07:51:04 +0000860
Evan Cheng3a214252009-08-11 08:52:18 +0000861 unsigned ShAmt = MO3.getImm();
862 if (ShAmt) {
863 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!");
864 O << ", lsl #" << ShAmt;
Evan Cheng055b0312009-06-29 07:51:04 +0000865 }
866 O << "]";
867}
868
869
870//===--------------------------------------------------------------------===//
871
Chris Lattner35c33bd2010-04-04 04:47:45 +0000872void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum,
873 raw_ostream &O) {
Evan Cheng055b0312009-06-29 07:51:04 +0000874 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
Evan Cheng44bec522007-05-15 01:29:07 +0000875 if (CC != ARMCC::AL)
876 O << ARMCondCodeToString(CC);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000877}
878
Johnny Chen9d3acaa2010-03-02 17:57:15 +0000879void ARMAsmPrinter::printMandatoryPredicateOperand(const MachineInstr *MI,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000880 int OpNum,
881 raw_ostream &O) {
Johnny Chen9d3acaa2010-03-02 17:57:15 +0000882 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
883 O << ARMCondCodeToString(CC);
884}
885
Chris Lattner35c33bd2010-04-04 04:47:45 +0000886void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum,
887 raw_ostream &O){
Evan Cheng055b0312009-06-29 07:51:04 +0000888 unsigned Reg = MI->getOperand(OpNum).getReg();
Evan Chengdfb2eba2007-07-06 01:01:34 +0000889 if (Reg) {
890 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
891 O << 's';
892 }
893}
894
Chris Lattner35c33bd2010-04-04 04:47:45 +0000895void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum,
896 raw_ostream &O) {
Evan Cheng055b0312009-06-29 07:51:04 +0000897 int Id = (int)MI->getOperand(OpNum).getImm();
Evan Chenge7e0d622009-11-06 22:24:13 +0000898 O << MAI->getPrivateGlobalPrefix()
899 << "PC" << getFunctionNumber() << "_" << Id;
Evan Chenga8e29892007-01-19 07:51:42 +0000900}
901
Chris Lattner35c33bd2010-04-04 04:47:45 +0000902void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum,
903 raw_ostream &O) {
Evan Chenga8e29892007-01-19 07:51:42 +0000904 O << "{";
Bob Wilson815baeb2010-03-13 01:08:20 +0000905 for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {
Evan Cheng4b322e52009-08-11 21:11:32 +0000906 if (MI->getOperand(i).isImplicit())
907 continue;
Bob Wilson815baeb2010-03-13 01:08:20 +0000908 if ((int)i != OpNum) O << ", ";
Chris Lattner35c33bd2010-04-04 04:47:45 +0000909 printOperand(MI, i, O);
Evan Chenga8e29892007-01-19 07:51:42 +0000910 }
911 O << "}";
912}
913
Evan Cheng055b0312009-06-29 07:51:04 +0000914void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNum,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000915 raw_ostream &O, const char *Modifier) {
Evan Chenga8e29892007-01-19 07:51:42 +0000916 assert(Modifier && "This operand only works with a modifier!");
917 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
918 // data itself.
919 if (!strcmp(Modifier, "label")) {
Evan Cheng055b0312009-06-29 07:51:04 +0000920 unsigned ID = MI->getOperand(OpNum).getImm();
Chris Lattner8e089a92010-02-10 00:36:00 +0000921 OutStreamer.EmitLabel(GetCPISymbol(ID));
Evan Chenga8e29892007-01-19 07:51:42 +0000922 } else {
923 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
Evan Cheng055b0312009-06-29 07:51:04 +0000924 unsigned CPI = MI->getOperand(OpNum).getIndex();
Evan Chenga8e29892007-01-19 07:51:42 +0000925
Evan Cheng6d63a722008-09-18 07:27:23 +0000926 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
Jim Grosbache9952212009-09-04 01:38:51 +0000927
Evan Cheng711b6dc2008-08-08 06:56:16 +0000928 if (MCPE.isMachineConstantPoolEntry()) {
Evan Chenga8e29892007-01-19 07:51:42 +0000929 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
Evan Cheng711b6dc2008-08-08 06:56:16 +0000930 } else {
Evan Chenga8e29892007-01-19 07:51:42 +0000931 EmitGlobalConstant(MCPE.Val.ConstVal);
Lauro Ramos Venancio305b8a52007-04-25 14:50:40 +0000932 }
Evan Chenga8e29892007-01-19 07:51:42 +0000933 }
934}
935
Chris Lattner0890cf12010-01-25 19:51:38 +0000936MCSymbol *ARMAsmPrinter::
937GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2,
938 const MachineBasicBlock *MBB) const {
939 SmallString<60> Name;
940 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix()
Chris Lattnerbfcb0962010-01-25 19:39:52 +0000941 << getFunctionNumber() << '_' << uid << '_' << uid2
Chris Lattner0890cf12010-01-25 19:51:38 +0000942 << "_set_" << MBB->getNumber();
Chris Lattner9b97a732010-03-30 18:10:53 +0000943 return OutContext.GetOrCreateSymbol(Name.str());
Chris Lattner0890cf12010-01-25 19:51:38 +0000944}
945
946MCSymbol *ARMAsmPrinter::
947GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const {
948 SmallString<60> Name;
949 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "JTI"
Chris Lattner281e7762010-01-25 23:28:03 +0000950 << getFunctionNumber() << '_' << uid << '_' << uid2;
Chris Lattner9b97a732010-03-30 18:10:53 +0000951 return OutContext.GetOrCreateSymbol(Name.str());
Chris Lattnerbfcb0962010-01-25 19:39:52 +0000952}
953
Chris Lattner35c33bd2010-04-04 04:47:45 +0000954void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum,
955 raw_ostream &O) {
Evan Cheng66ac5312009-07-25 00:33:29 +0000956 assert(!Subtarget->isThumb2() && "Thumb2 should use double-jump jumptables!");
957
Evan Cheng055b0312009-06-29 07:51:04 +0000958 const MachineOperand &MO1 = MI->getOperand(OpNum);
959 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
Jim Grosbachb0739b72010-09-02 01:02:06 +0000960
Chris Lattner8aa797a2007-12-30 23:10:15 +0000961 unsigned JTI = MO1.getIndex();
Chris Lattner0890cf12010-01-25 19:51:38 +0000962 MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm());
Chris Lattner03335352010-04-05 17:52:31 +0000963 // Can't use EmitLabel until instprinter happens, label comes out in the wrong
964 // order.
Bob Wilsond4d188e2010-07-31 06:28:10 +0000965 O << "\n" << *JTISymbol << ":\n";
Evan Chenga8e29892007-01-19 07:51:42 +0000966
Chris Lattner33adcfb2009-08-22 21:43:10 +0000967 const char *JTEntryDirective = MAI->getData32bitsDirective();
Evan Chenga8e29892007-01-19 07:51:42 +0000968
Dan Gohman45426112008-07-07 20:06:06 +0000969 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
Evan Chenga8e29892007-01-19 07:51:42 +0000970 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
971 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
Chris Lattnercee63322010-01-26 20:40:54 +0000972 bool UseSet= MAI->hasSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
Evan Chengc324ecb2009-07-24 18:19:46 +0000973 SmallPtrSet<MachineBasicBlock*, 8> JTSets;
Evan Chenga8e29892007-01-19 07:51:42 +0000974 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
975 MachineBasicBlock *MBB = JTBBs[i];
Evan Cheng66ac5312009-07-25 00:33:29 +0000976 bool isNew = JTSets.insert(MBB);
977
Chris Lattner0890cf12010-01-25 19:51:38 +0000978 if (UseSet && isNew) {
Chris Lattnercee63322010-01-26 20:40:54 +0000979 O << "\t.set\t"
Jim Grosbach1f9b48a2010-01-25 23:50:13 +0000980 << *GetARMSetPICJumpTableLabel2(JTI, MO2.getImm(), MBB) << ','
Chris Lattner1b2eb0e2010-03-13 21:04:28 +0000981 << *MBB->getSymbol() << '-' << *JTISymbol << '\n';
Chris Lattner0890cf12010-01-25 19:51:38 +0000982 }
Evan Chenga8e29892007-01-19 07:51:42 +0000983
984 O << JTEntryDirective << ' ';
985 if (UseSet)
Chris Lattner0890cf12010-01-25 19:51:38 +0000986 O << *GetARMSetPICJumpTableLabel2(JTI, MO2.getImm(), MBB);
987 else if (TM.getRelocationModel() == Reloc::PIC_)
Chris Lattner1b2eb0e2010-03-13 21:04:28 +0000988 O << *MBB->getSymbol() << '-' << *JTISymbol;
Chris Lattner0890cf12010-01-25 19:51:38 +0000989 else
Chris Lattner1b2eb0e2010-03-13 21:04:28 +0000990 O << *MBB->getSymbol();
Chris Lattner0890cf12010-01-25 19:51:38 +0000991
Evan Chengd85ac4d2007-01-27 02:29:45 +0000992 if (i != e-1)
993 O << '\n';
Evan Chenga8e29892007-01-19 07:51:42 +0000994 }
995}
996
Chris Lattner35c33bd2010-04-04 04:47:45 +0000997void ARMAsmPrinter::printJT2BlockOperand(const MachineInstr *MI, int OpNum,
998 raw_ostream &O) {
Evan Cheng66ac5312009-07-25 00:33:29 +0000999 const MachineOperand &MO1 = MI->getOperand(OpNum);
1000 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
1001 unsigned JTI = MO1.getIndex();
Jim Grosbachb0739b72010-09-02 01:02:06 +00001002
Chris Lattner0890cf12010-01-25 19:51:38 +00001003 MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm());
Jim Grosbachb0739b72010-09-02 01:02:06 +00001004
Chris Lattner03335352010-04-05 17:52:31 +00001005 // Can't use EmitLabel until instprinter happens, label comes out in the wrong
1006 // order.
Bob Wilsond4d188e2010-07-31 06:28:10 +00001007 O << "\n" << *JTISymbol << ":\n";
Evan Cheng66ac5312009-07-25 00:33:29 +00001008
Evan Cheng66ac5312009-07-25 00:33:29 +00001009 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
1010 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
1011 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
Evan Cheng5657c012009-07-29 02:18:14 +00001012 bool ByteOffset = false, HalfWordOffset = false;
1013 if (MI->getOpcode() == ARM::t2TBB)
1014 ByteOffset = true;
1015 else if (MI->getOpcode() == ARM::t2TBH)
1016 HalfWordOffset = true;
1017
Evan Cheng66ac5312009-07-25 00:33:29 +00001018 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
1019 MachineBasicBlock *MBB = JTBBs[i];
Evan Cheng5657c012009-07-29 02:18:14 +00001020 if (ByteOffset)
Chris Lattner33adcfb2009-08-22 21:43:10 +00001021 O << MAI->getData8bitsDirective();
Evan Cheng5657c012009-07-29 02:18:14 +00001022 else if (HalfWordOffset)
Chris Lattner33adcfb2009-08-22 21:43:10 +00001023 O << MAI->getData16bitsDirective();
Jim Grosbachb0739b72010-09-02 01:02:06 +00001024
Chris Lattner0890cf12010-01-25 19:51:38 +00001025 if (ByteOffset || HalfWordOffset)
Chris Lattner1b2eb0e2010-03-13 21:04:28 +00001026 O << '(' << *MBB->getSymbol() << "-" << *JTISymbol << ")/2";
Chris Lattner0890cf12010-01-25 19:51:38 +00001027 else
Chris Lattner1b2eb0e2010-03-13 21:04:28 +00001028 O << "\tb.w " << *MBB->getSymbol();
Chris Lattner0890cf12010-01-25 19:51:38 +00001029
Evan Cheng66ac5312009-07-25 00:33:29 +00001030 if (i != e-1)
1031 O << '\n';
1032 }
1033}
1034
Chris Lattner35c33bd2010-04-04 04:47:45 +00001035void ARMAsmPrinter::printTBAddrMode(const MachineInstr *MI, int OpNum,
1036 raw_ostream &O) {
Chris Lattner762ccea2009-09-13 20:31:40 +00001037 O << "[pc, " << getRegisterName(MI->getOperand(OpNum).getReg());
Evan Cheng5657c012009-07-29 02:18:14 +00001038 if (MI->getOpcode() == ARM::t2TBH)
1039 O << ", lsl #1";
1040 O << ']';
1041}
1042
Chris Lattner35c33bd2010-04-04 04:47:45 +00001043void ARMAsmPrinter::printNoHashImmediate(const MachineInstr *MI, int OpNum,
1044 raw_ostream &O) {
Anton Korobeynikov8e9ece72009-08-08 23:10:41 +00001045 O << MI->getOperand(OpNum).getImm();
1046}
Evan Chenga8e29892007-01-19 07:51:42 +00001047
Chris Lattner35c33bd2010-04-04 04:47:45 +00001048void ARMAsmPrinter::printVFPf32ImmOperand(const MachineInstr *MI, int OpNum,
1049 raw_ostream &O) {
Evan Cheng39382422009-10-28 01:44:26 +00001050 const ConstantFP *FP = MI->getOperand(OpNum).getFPImm();
Jim Grosbach77b02be2009-11-23 21:08:25 +00001051 O << '#' << FP->getValueAPF().convertToFloat();
Chris Lattner3f53c832010-04-04 18:52:31 +00001052 if (isVerbose()) {
Chris Lattner35c33bd2010-04-04 04:47:45 +00001053 O << "\t\t" << MAI->getCommentString() << ' ';
Evan Cheng39382422009-10-28 01:44:26 +00001054 WriteAsOperand(O, FP, /*PrintType=*/false);
1055 }
1056}
1057
Chris Lattner35c33bd2010-04-04 04:47:45 +00001058void ARMAsmPrinter::printVFPf64ImmOperand(const MachineInstr *MI, int OpNum,
1059 raw_ostream &O) {
Evan Cheng39382422009-10-28 01:44:26 +00001060 const ConstantFP *FP = MI->getOperand(OpNum).getFPImm();
Jim Grosbach77b02be2009-11-23 21:08:25 +00001061 O << '#' << FP->getValueAPF().convertToDouble();
Chris Lattner3f53c832010-04-04 18:52:31 +00001062 if (isVerbose()) {
Chris Lattner35c33bd2010-04-04 04:47:45 +00001063 O << "\t\t" << MAI->getCommentString() << ' ';
Evan Cheng39382422009-10-28 01:44:26 +00001064 WriteAsOperand(O, FP, /*PrintType=*/false);
1065 }
1066}
1067
Bob Wilson1a913ed2010-06-11 21:34:50 +00001068void ARMAsmPrinter::printNEONModImmOperand(const MachineInstr *MI, int OpNum,
1069 raw_ostream &O) {
Bob Wilson6dce00c2010-07-13 04:44:34 +00001070 unsigned EncodedImm = MI->getOperand(OpNum).getImm();
1071 unsigned EltBits;
1072 uint64_t Val = ARM_AM::decodeNEONModImm(EncodedImm, EltBits);
Bob Wilson1a913ed2010-06-11 21:34:50 +00001073 O << "#0x" << utohexstr(Val);
1074}
1075
Evan Cheng055b0312009-06-29 07:51:04 +00001076bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
Chris Lattnerc75c0282010-04-04 05:29:35 +00001077 unsigned AsmVariant, const char *ExtraCode,
1078 raw_ostream &O) {
Evan Chenga8e29892007-01-19 07:51:42 +00001079 // Does this asm operand have a single letter operand modifier?
1080 if (ExtraCode && ExtraCode[0]) {
1081 if (ExtraCode[1] != 0) return true; // Unknown modifier.
Anton Korobeynikov8e9ece72009-08-08 23:10:41 +00001082
Evan Chenga8e29892007-01-19 07:51:42 +00001083 switch (ExtraCode[0]) {
1084 default: return true; // Unknown modifier.
Bob Wilson9b4b00a2009-07-09 23:54:51 +00001085 case 'a': // Print as a memory address.
1086 if (MI->getOperand(OpNum).isReg()) {
Chris Lattner762ccea2009-09-13 20:31:40 +00001087 O << "[" << getRegisterName(MI->getOperand(OpNum).getReg()) << "]";
Bob Wilson9b4b00a2009-07-09 23:54:51 +00001088 return false;
1089 }
1090 // Fallthrough
1091 case 'c': // Don't print "#" before an immediate operand.
Bob Wilson4f38b382009-08-21 21:58:55 +00001092 if (!MI->getOperand(OpNum).isImm())
1093 return true;
Chris Lattner35c33bd2010-04-04 04:47:45 +00001094 printNoHashImmediate(MI, OpNum, O);
Bob Wilson8f343462009-04-06 21:46:51 +00001095 return false;
Evan Chenge21e3962007-04-04 00:13:29 +00001096 case 'P': // Print a VFP double precision register.
Evan Chengd831cda2009-12-08 23:06:22 +00001097 case 'q': // Print a NEON quad precision register.
Chris Lattner35c33bd2010-04-04 04:47:45 +00001098 printOperand(MI, OpNum, O);
Evan Cheng23a95702007-03-08 22:42:46 +00001099 return false;
Evan Chenga8e29892007-01-19 07:51:42 +00001100 case 'Q':
Bob Wilsond984eb62010-05-27 20:23:42 +00001101 case 'R':
Bob Wilsond984eb62010-05-27 20:23:42 +00001102 case 'H':
Evan Cheng12616722010-05-27 23:45:31 +00001103 report_fatal_error("llvm does not support 'Q', 'R', and 'H' modifiers!");
Bob Wilsond984eb62010-05-27 20:23:42 +00001104 return true;
Evan Cheng84f60b72010-05-27 22:08:38 +00001105 }
Evan Chenga8e29892007-01-19 07:51:42 +00001106 }
Jim Grosbache9952212009-09-04 01:38:51 +00001107
Chris Lattner35c33bd2010-04-04 04:47:45 +00001108 printOperand(MI, OpNum, O);
Evan Chenga8e29892007-01-19 07:51:42 +00001109 return false;
1110}
1111
Bob Wilson224c2442009-05-19 05:53:42 +00001112bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
Evan Cheng055b0312009-06-29 07:51:04 +00001113 unsigned OpNum, unsigned AsmVariant,
Chris Lattnerc75c0282010-04-04 05:29:35 +00001114 const char *ExtraCode,
1115 raw_ostream &O) {
Bob Wilson224c2442009-05-19 05:53:42 +00001116 if (ExtraCode && ExtraCode[0])
1117 return true; // Unknown modifier.
Bob Wilson765cc0b2009-10-13 20:50:28 +00001118
1119 const MachineOperand &MO = MI->getOperand(OpNum);
1120 assert(MO.isReg() && "unexpected inline asm memory operand");
1121 O << "[" << getRegisterName(MO.getReg()) << "]";
Bob Wilson224c2442009-05-19 05:53:42 +00001122 return false;
1123}
1124
Chris Lattnera786cea2010-01-28 01:10:34 +00001125void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
Chris Lattner97f06932009-10-19 20:20:46 +00001126 if (EnableMCInst) {
1127 printInstructionThroughMCStreamer(MI);
Chris Lattner7ad07c42010-04-04 06:12:20 +00001128 return;
Chris Lattner97f06932009-10-19 20:20:46 +00001129 }
Jim Grosbachb0739b72010-09-02 01:02:06 +00001130
Chris Lattner7ad07c42010-04-04 06:12:20 +00001131 if (MI->getOpcode() == ARM::CONSTPOOL_ENTRY)
1132 EmitAlignment(2);
Jim Grosbachb0739b72010-09-02 01:02:06 +00001133
Chris Lattner7ad07c42010-04-04 06:12:20 +00001134 SmallString<128> Str;
1135 raw_svector_ostream OS(Str);
Dale Johannesen3f282aa2010-04-26 20:07:31 +00001136 if (MI->getOpcode() == ARM::DBG_VALUE) {
1137 unsigned NOps = MI->getNumOperands();
1138 assert(NOps==4);
1139 OS << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
1140 // cast away const; DIetc do not take const operands for some reason.
1141 DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata()));
1142 OS << V.getName();
1143 OS << " <- ";
1144 // Frame address. Currently handles register +- offset only.
1145 assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm());
1146 OS << '['; printOperand(MI, 0, OS); OS << '+'; printOperand(MI, 1, OS);
1147 OS << ']';
1148 OS << "+";
1149 printOperand(MI, NOps-2, OS);
Jim Grosbache6be85e2010-09-17 22:36:38 +00001150 } else if (MI->getOpcode() == ARM::MOVs) {
1151 // FIXME: Thumb variants?
1152 const MachineOperand &Dst = MI->getOperand(0);
1153 const MachineOperand &MO1 = MI->getOperand(1);
1154 const MachineOperand &MO2 = MI->getOperand(2);
1155 const MachineOperand &MO3 = MI->getOperand(3);
Dale Johannesen3f282aa2010-04-26 20:07:31 +00001156
Jim Grosbache6be85e2010-09-17 22:36:38 +00001157 OS << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()));
1158 printSBitModifierOperand(MI, 6, OS);
1159 printPredicateOperand(MI, 4, OS);
1160
1161 OS << '\t' << getRegisterName(Dst.getReg())
1162 << ", " << getRegisterName(MO1.getReg());
1163
1164 if (ARM_AM::getSORegShOp(MO3.getImm()) != ARM_AM::rrx) {
1165 OS << ", ";
1166
1167 if (MO2.getReg()) {
1168 OS << getRegisterName(MO2.getReg());
1169 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
1170 } else {
1171 OS << "#" << ARM_AM::getSORegOffset(MO3.getImm());
1172 }
1173 }
1174 } else
1175 // A8.6.123 PUSH
1176 if ((MI->getOpcode() == ARM::STM_UPD || MI->getOpcode() == ARM::t2STM_UPD) &&
1177 MI->getOperand(0).getReg() == ARM::SP) {
1178 const MachineOperand &MO1 = MI->getOperand(2);
1179 if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::db) {
1180 OS << '\t' << "push";
1181 printPredicateOperand(MI, 3, OS);
1182 OS << '\t';
1183 printRegisterList(MI, 5, OS);
1184 }
1185 } else
1186 // A8.6.122 POP
1187 if ((MI->getOpcode() == ARM::LDM_UPD || MI->getOpcode() == ARM::t2LDM_UPD) &&
1188 MI->getOperand(0).getReg() == ARM::SP) {
1189 const MachineOperand &MO1 = MI->getOperand(2);
1190 if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::ia) {
1191 OS << '\t' << "pop";
1192 printPredicateOperand(MI, 3, OS);
1193 OS << '\t';
1194 printRegisterList(MI, 5, OS);
1195 }
1196 } else
1197 // A8.6.355 VPUSH
1198 if ((MI->getOpcode() == ARM::VSTMS_UPD || MI->getOpcode() ==ARM::VSTMD_UPD) &&
1199 MI->getOperand(0).getReg() == ARM::SP) {
1200 const MachineOperand &MO1 = MI->getOperand(2);
1201 if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::db) {
1202 OS << '\t' << "vpush";
1203 printPredicateOperand(MI, 3, OS);
1204 OS << '\t';
1205 printRegisterList(MI, 5, OS);
1206 }
1207 } else
1208 // A8.6.354 VPOP
1209 if ((MI->getOpcode() == ARM::VLDMS_UPD || MI->getOpcode() ==ARM::VLDMD_UPD) &&
1210 MI->getOperand(0).getReg() == ARM::SP) {
1211 const MachineOperand &MO1 = MI->getOperand(2);
1212 if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::ia) {
1213 OS << '\t' << "vpop";
1214 printPredicateOperand(MI, 3, OS);
1215 OS << '\t';
1216 printRegisterList(MI, 5, OS);
1217 }
1218 } else
1219 printInstruction(MI, OS);
1220
1221 // Output the instruction to the stream
Chris Lattner7ad07c42010-04-04 06:12:20 +00001222 OutStreamer.EmitRawText(OS.str());
Jim Grosbachb0739b72010-09-02 01:02:06 +00001223
Chris Lattner7ad07c42010-04-04 06:12:20 +00001224 // Make sure the instruction that follows TBB is 2-byte aligned.
1225 // FIXME: Constant island pass should insert an "ALIGN" instruction instead.
1226 if (MI->getOpcode() == ARM::t2TBB)
1227 EmitAlignment(1);
Evan Chenga8e29892007-01-19 07:51:42 +00001228}
1229
Bob Wilson812209a2009-09-30 22:06:26 +00001230void ARMAsmPrinter::EmitStartOfAsmFile(Module &M) {
Bob Wilson0fb34682009-09-30 00:23:42 +00001231 if (Subtarget->isTargetDarwin()) {
1232 Reloc::Model RelocM = TM.getRelocationModel();
1233 if (RelocM == Reloc::PIC_ || RelocM == Reloc::DynamicNoPIC) {
1234 // Declare all the text sections up front (before the DWARF sections
1235 // emitted by AsmPrinter::doInitialization) so the assembler will keep
1236 // them together at the beginning of the object file. This helps
1237 // avoid out-of-range branches that are due a fundamental limitation of
1238 // the way symbol offsets are encoded with the current Darwin ARM
1239 // relocations.
Jim Grosbachb0739b72010-09-02 01:02:06 +00001240 const TargetLoweringObjectFileMachO &TLOFMacho =
Dan Gohman0d805c32010-04-17 16:44:48 +00001241 static_cast<const TargetLoweringObjectFileMachO &>(
1242 getObjFileLowering());
Bob Wilson29e06692009-09-30 22:25:37 +00001243 OutStreamer.SwitchSection(TLOFMacho.getTextSection());
1244 OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection());
1245 OutStreamer.SwitchSection(TLOFMacho.getConstTextCoalSection());
1246 if (RelocM == Reloc::DynamicNoPIC) {
1247 const MCSection *sect =
Chris Lattner22772212010-04-08 20:40:11 +00001248 OutContext.getMachOSection("__TEXT", "__symbol_stub4",
1249 MCSectionMachO::S_SYMBOL_STUBS,
1250 12, SectionKind::getText());
Bob Wilson29e06692009-09-30 22:25:37 +00001251 OutStreamer.SwitchSection(sect);
1252 } else {
1253 const MCSection *sect =
Chris Lattner22772212010-04-08 20:40:11 +00001254 OutContext.getMachOSection("__TEXT", "__picsymbolstub4",
1255 MCSectionMachO::S_SYMBOL_STUBS,
1256 16, SectionKind::getText());
Bob Wilson29e06692009-09-30 22:25:37 +00001257 OutStreamer.SwitchSection(sect);
1258 }
Bob Wilson63db5942010-07-30 19:55:47 +00001259 const MCSection *StaticInitSect =
1260 OutContext.getMachOSection("__TEXT", "__StaticInit",
1261 MCSectionMachO::S_REGULAR |
1262 MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
1263 SectionKind::getText());
1264 OutStreamer.SwitchSection(StaticInitSect);
Bob Wilson0fb34682009-09-30 00:23:42 +00001265 }
1266 }
1267
Jim Grosbache5165492009-11-09 00:11:35 +00001268 // Use unified assembler syntax.
Chris Lattner9d7efd32010-04-04 07:05:53 +00001269 OutStreamer.EmitRawText(StringRef("\t.syntax unified"));
Anton Korobeynikovd61eca52009-06-17 23:43:18 +00001270
Anton Korobeynikov88ce6672009-05-23 19:51:20 +00001271 // Emit ARM Build Attributes
1272 if (Subtarget->isTargetELF()) {
1273 // CPU Type
Anton Korobeynikovd260c242009-06-01 19:03:17 +00001274 std::string CPUString = Subtarget->getCPUString();
1275 if (CPUString != "generic")
Chris Lattner9d7efd32010-04-04 07:05:53 +00001276 OutStreamer.EmitRawText("\t.cpu " + Twine(CPUString));
Anton Korobeynikov88ce6672009-05-23 19:51:20 +00001277
1278 // FIXME: Emit FPU type
1279 if (Subtarget->hasVFP2())
Chris Lattner9d7efd32010-04-04 07:05:53 +00001280 OutStreamer.EmitRawText("\t.eabi_attribute " +
1281 Twine(ARMBuildAttrs::VFP_arch) + ", 2");
Anton Korobeynikov88ce6672009-05-23 19:51:20 +00001282
1283 // Signal various FP modes.
Chris Lattner9d7efd32010-04-04 07:05:53 +00001284 if (!UnsafeFPMath) {
1285 OutStreamer.EmitRawText("\t.eabi_attribute " +
1286 Twine(ARMBuildAttrs::ABI_FP_denormal) + ", 1");
1287 OutStreamer.EmitRawText("\t.eabi_attribute " +
1288 Twine(ARMBuildAttrs::ABI_FP_exceptions) + ", 1");
1289 }
Jim Grosbachb0739b72010-09-02 01:02:06 +00001290
Evan Cheng60108e92010-07-15 22:07:12 +00001291 if (NoInfsFPMath && NoNaNsFPMath)
Chris Lattner9d7efd32010-04-04 07:05:53 +00001292 OutStreamer.EmitRawText("\t.eabi_attribute " +
1293 Twine(ARMBuildAttrs::ABI_FP_number_model)+ ", 1");
Anton Korobeynikov88ce6672009-05-23 19:51:20 +00001294 else
Chris Lattner9d7efd32010-04-04 07:05:53 +00001295 OutStreamer.EmitRawText("\t.eabi_attribute " +
1296 Twine(ARMBuildAttrs::ABI_FP_number_model)+ ", 3");
Anton Korobeynikov88ce6672009-05-23 19:51:20 +00001297
1298 // 8-bytes alignment stuff.
Chris Lattner9d7efd32010-04-04 07:05:53 +00001299 OutStreamer.EmitRawText("\t.eabi_attribute " +
1300 Twine(ARMBuildAttrs::ABI_align8_needed) + ", 1");
1301 OutStreamer.EmitRawText("\t.eabi_attribute " +
1302 Twine(ARMBuildAttrs::ABI_align8_preserved) + ", 1");
Anton Korobeynikov88ce6672009-05-23 19:51:20 +00001303
Anton Korobeynikov567d14f2009-08-05 19:04:42 +00001304 // Hard float. Use both S and D registers and conform to AAPCS-VFP.
Chris Lattner9d7efd32010-04-04 07:05:53 +00001305 if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard) {
1306 OutStreamer.EmitRawText("\t.eabi_attribute " +
1307 Twine(ARMBuildAttrs::ABI_HardFP_use) + ", 3");
1308 OutStreamer.EmitRawText("\t.eabi_attribute " +
1309 Twine(ARMBuildAttrs::ABI_VFP_args) + ", 1");
1310 }
Anton Korobeynikov88ce6672009-05-23 19:51:20 +00001311 // FIXME: Should we signal R9 usage?
1312 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00001313}
1314
Anton Korobeynikov0f3cc652008-08-07 09:54:23 +00001315
Chris Lattner4a071d62009-10-19 17:59:19 +00001316void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) {
Evan Cheng5be54b02007-01-19 19:25:36 +00001317 if (Subtarget->isTargetDarwin()) {
Chris Lattnerf61159b2009-08-03 22:18:15 +00001318 // All darwin targets use mach-o.
Dan Gohman0d805c32010-04-17 16:44:48 +00001319 const TargetLoweringObjectFileMachO &TLOFMacho =
1320 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
Chris Lattnerb0f294c2009-10-19 18:38:33 +00001321 MachineModuleInfoMachO &MMIMacho =
1322 MMI->getObjFileInfo<MachineModuleInfoMachO>();
Jim Grosbache9952212009-09-04 01:38:51 +00001323
Evan Chenga8e29892007-01-19 07:51:42 +00001324 // Output non-lazy-pointers for external and common global variables.
Chris Lattnerb0f294c2009-10-19 18:38:33 +00001325 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList();
Bill Wendlingcebae362010-03-10 22:34:10 +00001326
Chris Lattnerb0f294c2009-10-19 18:38:33 +00001327 if (!Stubs.empty()) {
Chris Lattnerff4bc462009-08-10 01:39:42 +00001328 // Switch with ".non_lazy_symbol_pointer" directive.
Chris Lattner6c2f9e12009-08-19 05:49:37 +00001329 OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
Chris Lattnerc076a972009-08-10 18:01:34 +00001330 EmitAlignment(2);
Chris Lattnerb0f294c2009-10-19 18:38:33 +00001331 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
Bill Wendlingbecd83e2010-03-09 00:40:17 +00001332 // L_foo$stub:
1333 OutStreamer.EmitLabel(Stubs[i].first);
1334 // .indirect_symbol _foo
Bill Wendling52a50e52010-03-11 01:18:13 +00001335 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
1336 OutStreamer.EmitSymbolAttribute(MCSym.getPointer(),MCSA_IndirectSymbol);
Bill Wendlingcf6f28d2010-03-09 00:43:34 +00001337
Bill Wendling52a50e52010-03-11 01:18:13 +00001338 if (MCSym.getInt())
Bill Wendlingcf6f28d2010-03-09 00:43:34 +00001339 // External to current translation unit.
1340 OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/);
1341 else
1342 // Internal to current translation unit.
Bill Wendling5e1b55d2010-03-31 18:47:10 +00001343 //
1344 // When we place the LSDA into the TEXT section, the type info pointers
1345 // need to be indirect and pc-rel. We accomplish this by using NLPs.
1346 // However, sometimes the types are local to the file. So we need to
1347 // fill in the value for the NLP in those cases.
Bill Wendling52a50e52010-03-11 01:18:13 +00001348 OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(),
1349 OutContext),
Bill Wendlingcf6f28d2010-03-09 00:43:34 +00001350 4/*size*/, 0/*addrspace*/);
Evan Chengae94e592008-12-05 01:06:39 +00001351 }
Bill Wendlingbecd83e2010-03-09 00:40:17 +00001352
1353 Stubs.clear();
1354 OutStreamer.AddBlankLine();
Evan Chenga8e29892007-01-19 07:51:42 +00001355 }
1356
Chris Lattnere4d9ea82009-10-19 18:44:38 +00001357 Stubs = MMIMacho.GetHiddenGVStubList();
1358 if (!Stubs.empty()) {
Chris Lattner6c2f9e12009-08-19 05:49:37 +00001359 OutStreamer.SwitchSection(getObjFileLowering().getDataSection());
Chris Lattnerf3231de2009-08-10 18:02:16 +00001360 EmitAlignment(2);
Bill Wendlingbecd83e2010-03-09 00:40:17 +00001361 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
1362 // L_foo$stub:
1363 OutStreamer.EmitLabel(Stubs[i].first);
1364 // .long _foo
Bill Wendlingcebae362010-03-10 22:34:10 +00001365 OutStreamer.EmitValue(MCSymbolRefExpr::
1366 Create(Stubs[i].second.getPointer(),
1367 OutContext),
Bill Wendlingbecd83e2010-03-09 00:40:17 +00001368 4/*size*/, 0/*addrspace*/);
1369 }
Bill Wendlingcf6f28d2010-03-09 00:43:34 +00001370
1371 Stubs.clear();
1372 OutStreamer.AddBlankLine();
Evan Chengae94e592008-12-05 01:06:39 +00001373 }
1374
Evan Chenga8e29892007-01-19 07:51:42 +00001375 // Funny Darwin hack: This flag tells the linker that no global symbols
1376 // contain code that falls through to other global symbols (e.g. the obvious
1377 // implementation of multiple entry points). If this doesn't occur, the
1378 // linker can safely perform dead code stripping. Since LLVM never
1379 // generates code that does this, it is always safe to set.
Chris Lattnera5ad93a2010-01-23 06:39:22 +00001380 OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
Rafael Espindolab01c4bb2006-07-27 11:38:51 +00001381 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00001382}
Anton Korobeynikov0bd89712008-08-17 13:55:10 +00001383
Chris Lattner97f06932009-10-19 20:20:46 +00001384//===----------------------------------------------------------------------===//
1385
1386void ARMAsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) {
Chris Lattner96bc2172009-10-20 00:52:47 +00001387 ARMMCInstLower MCInstLowering(OutContext, *Mang, *this);
Chris Lattner97f06932009-10-19 20:20:46 +00001388 switch (MI->getOpcode()) {
Chris Lattnerc6b8a992009-10-20 05:58:02 +00001389 case ARM::t2MOVi32imm:
1390 assert(0 && "Should be lowered by thumb2it pass");
Chris Lattner4d152222009-10-19 22:23:04 +00001391 default: break;
Jim Grosbachfbd18732010-09-17 23:41:53 +00001392 case ARM::tPICADD: {
1393 // This is a pseudo op for a label + instruction sequence, which looks like:
1394 // LPC0:
1395 // add r0, pc
1396 // This adds the address of LPC0 to r0.
1397
1398 // Emit the label.
1399 // FIXME: MOVE TO SHARED PLACE.
1400 unsigned Id = (unsigned)MI->getOperand(2).getImm();
1401 const char *Prefix = MAI->getPrivateGlobalPrefix();
1402 MCSymbol *Label =OutContext.GetOrCreateSymbol(Twine(Prefix)
1403 + "PC" + Twine(getFunctionNumber()) + "_" + Twine(Id));
1404 OutStreamer.EmitLabel(Label);
1405
1406 // Form and emit the add.
1407 MCInst AddInst;
1408 AddInst.setOpcode(ARM::tADDhirr);
1409 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1410 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1411 AddInst.addOperand(MCOperand::CreateReg(ARM::PC));
1412 // Add predicate operands.
1413 AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1414 AddInst.addOperand(MCOperand::CreateReg(0));
1415 OutStreamer.EmitInstruction(AddInst);
1416 return;
1417 }
Chris Lattner4d152222009-10-19 22:23:04 +00001418 case ARM::PICADD: { // FIXME: Remove asm string from td file.
1419 // This is a pseudo op for a label + instruction sequence, which looks like:
1420 // LPC0:
1421 // add r0, pc, r0
1422 // This adds the address of LPC0 to r0.
Jim Grosbachb0739b72010-09-02 01:02:06 +00001423
Chris Lattner4d152222009-10-19 22:23:04 +00001424 // Emit the label.
1425 // FIXME: MOVE TO SHARED PLACE.
Chris Lattnera70e6442009-10-19 22:33:05 +00001426 unsigned Id = (unsigned)MI->getOperand(2).getImm();
Chris Lattner7c5b0212009-10-19 22:49:00 +00001427 const char *Prefix = MAI->getPrivateGlobalPrefix();
Chris Lattner9b97a732010-03-30 18:10:53 +00001428 MCSymbol *Label =OutContext.GetOrCreateSymbol(Twine(Prefix)
Evan Chenge7e0d622009-11-06 22:24:13 +00001429 + "PC" + Twine(getFunctionNumber()) + "_" + Twine(Id));
Chris Lattner7c5b0212009-10-19 22:49:00 +00001430 OutStreamer.EmitLabel(Label);
Jim Grosbachb0739b72010-09-02 01:02:06 +00001431
1432
Jim Grosbachf3f09522010-09-14 21:05:34 +00001433 // Form and emit the add.
Chris Lattner4d152222009-10-19 22:23:04 +00001434 MCInst AddInst;
1435 AddInst.setOpcode(ARM::ADDrr);
1436 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1437 AddInst.addOperand(MCOperand::CreateReg(ARM::PC));
1438 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
Jim Grosbach5b46d622010-09-14 21:28:17 +00001439 // Add predicate operands.
1440 AddInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm()));
1441 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg()));
1442 // Add 's' bit operand (always reg0 for this)
1443 AddInst.addOperand(MCOperand::CreateReg(0));
Chris Lattner850d2e22010-02-03 01:16:28 +00001444 OutStreamer.EmitInstruction(AddInst);
Chris Lattner4d152222009-10-19 22:23:04 +00001445 return;
1446 }
Jim Grosbacha28abbe2010-09-17 16:25:52 +00001447 case ARM::PICSTR:
1448 case ARM::PICSTRB:
1449 case ARM::PICSTRH:
1450 case ARM::PICLDR:
1451 case ARM::PICLDRB:
1452 case ARM::PICLDRH:
1453 case ARM::PICLDRSB:
1454 case ARM::PICLDRSH: {
Jim Grosbachb74ca9d2010-09-16 17:43:25 +00001455 // This is a pseudo op for a label + instruction sequence, which looks like:
1456 // LPC0:
Jim Grosbacha28abbe2010-09-17 16:25:52 +00001457 // OP r0, [pc, r0]
Jim Grosbachb74ca9d2010-09-16 17:43:25 +00001458 // The LCP0 label is referenced by a constant pool entry in order to get
1459 // a PC-relative address at the ldr instruction.
1460
1461 // Emit the label.
1462 // FIXME: MOVE TO SHARED PLACE.
1463 unsigned Id = (unsigned)MI->getOperand(2).getImm();
1464 const char *Prefix = MAI->getPrivateGlobalPrefix();
1465 MCSymbol *Label =OutContext.GetOrCreateSymbol(Twine(Prefix)
1466 + "PC" + Twine(getFunctionNumber()) + "_" + Twine(Id));
1467 OutStreamer.EmitLabel(Label);
1468
1469 // Form and emit the load
Jim Grosbacha28abbe2010-09-17 16:25:52 +00001470 unsigned Opcode;
1471 switch (MI->getOpcode()) {
1472 default:
1473 llvm_unreachable("Unexpected opcode!");
1474 case ARM::PICSTR: Opcode = ARM::STR; break;
1475 case ARM::PICSTRB: Opcode = ARM::STRB; break;
1476 case ARM::PICSTRH: Opcode = ARM::STRH; break;
1477 case ARM::PICLDR: Opcode = ARM::LDR; break;
1478 case ARM::PICLDRB: Opcode = ARM::LDRB; break;
1479 case ARM::PICLDRH: Opcode = ARM::LDRH; break;
1480 case ARM::PICLDRSB: Opcode = ARM::LDRSB; break;
1481 case ARM::PICLDRSH: Opcode = ARM::LDRSH; break;
1482 }
1483 MCInst LdStInst;
1484 LdStInst.setOpcode(Opcode);
1485 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1486 LdStInst.addOperand(MCOperand::CreateReg(ARM::PC));
1487 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
1488 LdStInst.addOperand(MCOperand::CreateImm(0));
Jim Grosbachb74ca9d2010-09-16 17:43:25 +00001489 // Add predicate operands.
Jim Grosbacha28abbe2010-09-17 16:25:52 +00001490 LdStInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm()));
1491 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg()));
1492 OutStreamer.EmitInstruction(LdStInst);
Jim Grosbachb74ca9d2010-09-16 17:43:25 +00001493
1494 return;
1495 }
Chris Lattnera70e6442009-10-19 22:33:05 +00001496 case ARM::CONSTPOOL_ENTRY: { // FIXME: Remove asm string from td file.
1497 /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool
1498 /// in the function. The first operand is the ID# for this instruction, the
1499 /// second is the index into the MachineConstantPool that this is, the third
1500 /// is the size in bytes of this constant pool entry.
1501 unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
1502 unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
1503
1504 EmitAlignment(2);
Chris Lattner1b46f432010-01-23 07:00:21 +00001505 OutStreamer.EmitLabel(GetCPISymbol(LabelId));
Chris Lattnera70e6442009-10-19 22:33:05 +00001506
1507 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
1508 if (MCPE.isMachineConstantPoolEntry())
1509 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
1510 else
1511 EmitGlobalConstant(MCPE.Val.ConstVal);
Jim Grosbachb0739b72010-09-02 01:02:06 +00001512
Chris Lattnera70e6442009-10-19 22:33:05 +00001513 return;
1514 }
Chris Lattner017d9472009-10-20 00:40:56 +00001515 case ARM::MOVi2pieces: { // FIXME: Remove asmstring from td file.
1516 // This is a hack that lowers as a two instruction sequence.
1517 unsigned DstReg = MI->getOperand(0).getReg();
1518 unsigned ImmVal = (unsigned)MI->getOperand(1).getImm();
1519
1520 unsigned SOImmValV1 = ARM_AM::getSOImmTwoPartFirst(ImmVal);
1521 unsigned SOImmValV2 = ARM_AM::getSOImmTwoPartSecond(ImmVal);
Jim Grosbachb0739b72010-09-02 01:02:06 +00001522
Chris Lattner017d9472009-10-20 00:40:56 +00001523 {
1524 MCInst TmpInst;
1525 TmpInst.setOpcode(ARM::MOVi);
1526 TmpInst.addOperand(MCOperand::CreateReg(DstReg));
1527 TmpInst.addOperand(MCOperand::CreateImm(SOImmValV1));
Jim Grosbachb0739b72010-09-02 01:02:06 +00001528
Chris Lattner017d9472009-10-20 00:40:56 +00001529 // Predicate.
1530 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
1531 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
Chris Lattner233917c2009-10-20 00:46:11 +00001532
1533 TmpInst.addOperand(MCOperand::CreateReg(0)); // cc_out
Chris Lattner850d2e22010-02-03 01:16:28 +00001534 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner017d9472009-10-20 00:40:56 +00001535 }
1536
1537 {
1538 MCInst TmpInst;
1539 TmpInst.setOpcode(ARM::ORRri);
1540 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg
1541 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // inreg
1542 TmpInst.addOperand(MCOperand::CreateImm(SOImmValV2)); // so_imm
1543 // Predicate.
1544 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
1545 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
Jim Grosbachb0739b72010-09-02 01:02:06 +00001546
Chris Lattner017d9472009-10-20 00:40:56 +00001547 TmpInst.addOperand(MCOperand::CreateReg(0)); // cc_out
Chris Lattner850d2e22010-02-03 01:16:28 +00001548 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner017d9472009-10-20 00:40:56 +00001549 }
Jim Grosbachb0739b72010-09-02 01:02:06 +00001550 return;
Chris Lattner017d9472009-10-20 00:40:56 +00001551 }
Chris Lattner161dcbf2009-10-20 01:11:37 +00001552 case ARM::MOVi32imm: { // FIXME: Remove asmstring from td file.
1553 // This is a hack that lowers as a two instruction sequence.
1554 unsigned DstReg = MI->getOperand(0).getReg();
Rafael Espindola18c10212010-05-12 05:16:34 +00001555 const MachineOperand &MO = MI->getOperand(1);
1556 MCOperand V1, V2;
1557 if (MO.isImm()) {
1558 unsigned ImmVal = (unsigned)MI->getOperand(1).getImm();
1559 V1 = MCOperand::CreateImm(ImmVal & 65535);
1560 V2 = MCOperand::CreateImm(ImmVal >> 16);
1561 } else if (MO.isGlobal()) {
Jim Grosbachc686e332010-09-17 18:25:25 +00001562 MCSymbol *Symbol = MCInstLowering.GetGlobalAddressSymbol(MO.getGlobal());
Rafael Espindola18c10212010-05-12 05:16:34 +00001563 const MCSymbolRefExpr *SymRef1 =
Duncan Sands34727662010-07-12 08:16:59 +00001564 MCSymbolRefExpr::Create(Symbol,
1565 MCSymbolRefExpr::VK_ARM_LO16, OutContext);
Rafael Espindola18c10212010-05-12 05:16:34 +00001566 const MCSymbolRefExpr *SymRef2 =
Duncan Sands34727662010-07-12 08:16:59 +00001567 MCSymbolRefExpr::Create(Symbol,
1568 MCSymbolRefExpr::VK_ARM_HI16, OutContext);
Rafael Espindola18c10212010-05-12 05:16:34 +00001569 V1 = MCOperand::CreateExpr(SymRef1);
1570 V2 = MCOperand::CreateExpr(SymRef2);
1571 } else {
1572 MI->dump();
1573 llvm_unreachable("cannot handle this operand");
1574 }
1575
Chris Lattner161dcbf2009-10-20 01:11:37 +00001576 {
1577 MCInst TmpInst;
1578 TmpInst.setOpcode(ARM::MOVi16);
1579 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg
Rafael Espindola18c10212010-05-12 05:16:34 +00001580 TmpInst.addOperand(V1); // lower16(imm)
Jim Grosbachb0739b72010-09-02 01:02:06 +00001581
Chris Lattner161dcbf2009-10-20 01:11:37 +00001582 // Predicate.
1583 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
1584 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
Jim Grosbachb0739b72010-09-02 01:02:06 +00001585
Chris Lattner850d2e22010-02-03 01:16:28 +00001586 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner161dcbf2009-10-20 01:11:37 +00001587 }
Jim Grosbachb0739b72010-09-02 01:02:06 +00001588
Chris Lattner161dcbf2009-10-20 01:11:37 +00001589 {
1590 MCInst TmpInst;
1591 TmpInst.setOpcode(ARM::MOVTi16);
1592 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg
1593 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // srcreg
Rafael Espindola18c10212010-05-12 05:16:34 +00001594 TmpInst.addOperand(V2); // upper16(imm)
Jim Grosbachb0739b72010-09-02 01:02:06 +00001595
Chris Lattner161dcbf2009-10-20 01:11:37 +00001596 // Predicate.
1597 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
1598 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
Jim Grosbachb0739b72010-09-02 01:02:06 +00001599
Chris Lattner850d2e22010-02-03 01:16:28 +00001600 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner161dcbf2009-10-20 01:11:37 +00001601 }
Jim Grosbachb0739b72010-09-02 01:02:06 +00001602
Chris Lattner161dcbf2009-10-20 01:11:37 +00001603 return;
1604 }
Chris Lattner97f06932009-10-19 20:20:46 +00001605 }
Jim Grosbachb0739b72010-09-02 01:02:06 +00001606
Chris Lattner97f06932009-10-19 20:20:46 +00001607 MCInst TmpInst;
1608 MCInstLowering.Lower(MI, TmpInst);
Chris Lattner850d2e22010-02-03 01:16:28 +00001609 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner97f06932009-10-19 20:20:46 +00001610}
Daniel Dunbar2685a292009-10-20 05:15:36 +00001611
1612//===----------------------------------------------------------------------===//
1613// Target Registry Stuff
1614//===----------------------------------------------------------------------===//
1615
1616static MCInstPrinter *createARMMCInstPrinter(const Target &T,
1617 unsigned SyntaxVariant,
Chris Lattnerd3740872010-04-04 05:04:31 +00001618 const MCAsmInfo &MAI) {
Daniel Dunbar2685a292009-10-20 05:15:36 +00001619 if (SyntaxVariant == 0)
Jim Grosbach74d7e6c2010-09-17 21:33:25 +00001620 return new ARMInstPrinter(MAI);
Daniel Dunbar2685a292009-10-20 05:15:36 +00001621 return 0;
1622}
1623
1624// Force static initialization.
1625extern "C" void LLVMInitializeARMAsmPrinter() {
1626 RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget);
1627 RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget);
1628
1629 TargetRegistry::RegisterMCInstPrinter(TheARMTarget, createARMMCInstPrinter);
1630 TargetRegistry::RegisterMCInstPrinter(TheThumbTarget, createARMMCInstPrinter);
1631}
1632