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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 00fee65fd21f9615d1a604b8b7d42cd16a3f6b47 / lib / Target
  1. 00fee65 In TargetLowering::LowerCallTo, don't assert that by Duncan Sands · 18 years ago
  2. e179584 Change how FP immediates are handled. by Nate Begeman · 18 years ago
  3. 0fec975 Move some useful operands up into the all-targets .td by Nate Begeman · 18 years ago
  4. eb05f90 upgrade some entries, remove stuff that is done. by Chris Lattner · 18 years ago
  5. ea1cddf the mid-level optimizer removes this stuff. by Chris Lattner · 18 years ago
  6. 48b4d96 this one is easy. by Chris Lattner · 18 years ago
  7. 8b0cb7b This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll by Chris Lattner · 18 years ago
  8. f4f92f5 Assigning an APInt to 0 with plain assignment gives it a one-bit by Dan Gohman · 18 years ago
  9. 977a76f Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits by Dan Gohman · 18 years ago
  10. afe6c2b Enable exception handling int JIT by Nicolas Geoffray · 18 years ago
  11. a1998d1 Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR. by Chris Lattner · 18 years ago
  12. 9f72d1a don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS. by Chris Lattner · 18 years ago
  13. b5041b3 readme updates by Nate Begeman · 18 years ago
  14. ba8d51c Make register scavenging happy by not using a reg (CR0) that isn't defined by Nate Begeman · 18 years ago
  15. a4d16a1 commuteInstr() can now commute non-ssa machine instrs. by Evan Cheng · 18 years ago
  16. fd29e0e Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t. by Dan Gohman · 18 years ago
  17. 3006c39 __DATA not __DATA__ is the right segment name on darwin. by Dale Johannesen · 18 years ago
  18. bf1caa9 Remove some dead code by Nate Begeman · 18 years ago
  19. cdd1eec SSE4.1 64b integer insert/extract pattern support by Nate Begeman · 18 years ago
  20. 394d280 Revert r46916 PPCTargetAsmInfo.cpp. by Evan Cheng · 18 years ago
  21. 9f143ce Only using x86-64 rip relative addressing in non-staic mode? by Evan Cheng · 18 years ago
  22. add2517 Update comment. by Evan Cheng · 18 years ago
  23. 5ae45ca Unbreak various insert_vector_elt and extract_vector_elt tests in presence of SSE4. by Evan Cheng · 18 years ago
  24. 5bb013c Stuff noticed while grepping code by Nate Begeman · 18 years ago
  25. 14d12ca Enable SSE4 codegen and pattern matching. Add some notes to the README. by Nate Begeman · 18 years ago
  26. a6ed0aa additional missing feature by Nate Begeman · 18 years ago
  27. ab5d56c xmm0 variable blends by Nate Begeman · 18 years ago
  28. 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 18 years ago
  29. 16b0bd6 Match GCC's behaviour for these sections. by Nick Lewycky · 18 years ago
  30. fea2be5 memopv16i8 had wrong alignment requirement, would have broken pabsb by Nate Begeman · 18 years ago
  31. 1426d52 Skeleton of insert and extract matching, more to come by Nate Begeman · 18 years ago
  32. b5af334 Tablegen support for insert & extract element matching by Nate Begeman · 18 years ago
  33. 5fd79d0 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. by Evan Cheng · 18 years ago
  34. 0c19187 64-bit (MMX) vectors do not need restrictive alignment. by Dale Johannesen · 18 years ago
  35. 6078330 Avoid needlessly casting away const qualifiers. by Dan Gohman · 18 years ago
  36. 33663fc Added missing entries in X86 load / store folding tables. by Evan Cheng · 18 years ago
  37. 3069b87 Follow Chris' suggestion; change the PseudoSourceValue accessors by Dan Gohman · 18 years ago
  38. 4fdad17 Add SourceValue information for outgoing argument stores on x86. by Dan Gohman · 18 years ago
  39. be3bf42 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. by Evan Cheng · 18 years ago
  40. 1524673 In some cases, e.g. ADD32ri, no transformation is made. Guide against it. by Evan Cheng · 18 years ago
  41. 69de193 Re-apply the memory operand changes, with a fix for the static by Dan Gohman · 18 years ago
  42. ebaaa91 Move to getCALLSEQ_END to ensure CALLSEQ_END node produces a flag. This is consistent with the definition in td file. by Evan Cheng · 18 years ago
  43. e672af1 Implement sseregparm. by Dale Johannesen · 18 years ago
  44. 5a804e3 Ident mnemonics appropriately by Nate Begeman · 18 years ago
  45. 4e3f5a4 Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. by Evan Cheng · 18 years ago
  46. c451ac0 This method should be virtual by Nate Begeman · 18 years ago
  47. 48a6551 Eliminate some redundant code. by Nate Begeman · 18 years ago
  48. 204e84e The rest of the SSE4.1 intrinsic patterns that are obvious to me. Getting by Nate Begeman · 18 years ago
  49. 2f6f1c0 Some more SSE 4.1 intrinsic patterns. by Nate Begeman · 18 years ago
  50. 63ec90a SSE 4.1 Intrinsics and detection by Nate Begeman · 18 years ago
  51. 3d62d78 explicitly include Compiler.h instead of getting it from tblgen in the middle of a class. by Chris Lattner · 18 years ago
  52. a47b9bc don't do ReplaceUses on a result that doesn't exist. by Chris Lattner · 18 years ago
  53. 4eecdeb Get rid of the annoying blank lines before labels. by Evan Cheng · 18 years ago
  54. 916a9f0 Don't use uninitialized values. Fixes vec_align.ll on X86 Linux. by Nick Lewycky · 18 years ago
  55. fcf5d4f Unbreak ppc debug support. by Evan Cheng · 18 years ago
  56. a844bde SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. by Evan Cheng · 18 years ago
  57. b8033e8 Frame index can be negative. by Evan Cheng · 18 years ago
  58. 859efca CBackend: Implement unaligned load/store. by Lauro Ramos Venancio · 18 years ago
  59. 1b08bbc Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. by Evan Cheng · 18 years ago
  60. 334dc1f Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit. by Evan Cheng · 18 years ago
  61. bb81d97 Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution. by Evan Cheng · 18 years ago
  62. 8535624 Allow ComplexExpressions in InstrInfo.td files to be slightly more... complex! ComplexExpressions can now have attributes which affect how TableGen interprets by Christopher Lamb · 18 years ago
  63. c67aa7c Add x86 specific getFrameIndexOffset(). This fixes local variable debugging info. by Evan Cheng · 18 years ago
  64. 72bebb9 MRegisterInfo::getLocation() is a really bad idea. Its function is to calculate the offset from frame pointer to a stack slot and then storing the delta in a MachineLocation object. The name is bad (it implies a getter), and MRegisterInfo doesn't need to know about MachineLocation. by Evan Cheng · 18 years ago
  65. 0a75538 Makes the same change in ppc backend: avoid inserting prologue before debug labels. by Evan Cheng · 18 years ago
  66. bbfb9c5 Avoid unnecessarily casting away const. by Dan Gohman · 18 years ago
  67. 1a02486 Rename ISD::FLT_ROUNDS to ISD::FLT_ROUNDS_ to avoid conflicting by Dan Gohman · 18 years ago
  68. c6c391d Create a new class, MemOperand, for describing memory references by Dan Gohman · 18 years ago
  69. 965d1b4 Treat the label for the first @llvm.dbg.stoppoint the same way as the dbg_func_start label. Make sure nothing else is inserted before them. by Evan Cheng · 18 years ago
  70. ff9b373 Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert by Evan Cheng · 18 years ago
  71. d2c860c Skip over the label which marks the beginning of the function before inserting prologue code. by Evan Cheng · 18 years ago
  72. 7f9ba9b More cleanups for CellSPU: by Scott Michel · 18 years ago
  73. b625f2f Factor the addressing mode and the load/store VT out of LoadSDNode by Dan Gohman · 18 years ago
  74. 0d9e976 Work in progress. This patch *fixes* x86-64 calls which are modelled as StructRet but really should be return in registers, e.g. _Complex long double, some 128-bit aggregates. This is a short term solution that is necessary only because llvm, for now, cannot model i128 nor call's with multiple results. by Evan Cheng · 18 years ago
  75. d102593 Use getPreferredAlignmentLog or getPreferredAlignment by Duncan Sands · 18 years ago
  76. ba2a0b9 Handle 'X' constraint in asm's better. by Dale Johannesen · 18 years ago
  77. 053c1da Overhaul Cell SPU's addressing mode internals so that there are now by Scott Michel · 18 years ago
  78. 200e90c If the function has no machine instructions, then emit a "nop" so that by Bill Wendling · 18 years ago
  79. f6b935d add a note by Chris Lattner · 18 years ago
  80. 71d07a0 Use fldz and fld1 for long double constants instead of a constant pool load. by Chris Lattner · 18 years ago
  81. 4d53049 Add some notes. by Chris Lattner · 18 years ago
  82. ba96fbc Remove some code for inferring alignment info from the x86 backend by Chris Lattner · 18 years ago
  83. 824a721 If there's no instructions being emitted on X86 for a function, emit a by Bill Wendling · 18 years ago
  84. 381802f If there are no machine instructions emitted for a function, then insert by Bill Wendling · 18 years ago
  85. 1910e2f JITEmitter.cpp was trying to sync the icache for function stubs, but by Chris Lattner · 18 years ago
  86. 6cf7326 optimize fxor like for by Chris Lattner · 18 years ago
  87. af723b9 Add target-specific dag combines for FAND(x,0) and FOR(x,0). This allows by Chris Lattner · 18 years ago
  88. 8eea339 Provide correct DWARF register numbering for debug information emission on x86-32/Darwin. by Anton Korobeynikov · 18 years ago
  89. d43d00c Significantly simplify and improve handling of FP function results on x86-32. by Chris Lattner · 18 years ago
  90. 2928650 Let each target decide byval alignment. For X86, it's 4-byte unless the aggregare contains SSE vector(s). For x86-64, it's max of 8 or alignment of the type. by Evan Cheng · 18 years ago
  91. f9c98e6 The last pieces needed for loading arbitrary by Duncan Sands · 18 years ago
  92. 25edeb3 Honor explicit section information on Darwin. by Dale Johannesen · 18 years ago
  93. 2cbdd27 SSE varargs arguments are passed in memory. by Evan Cheng · 18 years ago
  94. 18bef16 Trivial patch to fix two warnings, please pull into llvm 2.2 by Chris Lattner · 18 years ago
  95. ea74c7e Honour ByVal parameter attribute for name decoration by Anton Korobeynikov · 18 years ago
  96. 99e635c Remove Darwin'ism by Anton Korobeynikov · 18 years ago
  97. 49964d6 Enable PIC codegen on x86-64/linux by Anton Korobeynikov · 18 years ago
  98. 4bdad51 Need to handle any 'nest' parameter before integer by Duncan Sands · 18 years ago
  99. 5c5eb80 Implement flt_rounds for PowerPC. by Dale Johannesen · 18 years ago
  100. ef97c67 get symbolic information for ppc ldbl nodes. by Chris Lattner · 18 years ago