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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 01c69374b508bad0ee71cd3c49414a325238e29a / lib / Target
  1. 01c6937 The "ReadOnlyWithRel" enum seems to apply more to what Darwin does with the EH by Bill Wendling · 16 years ago
  2. bea7df5 Add XCore support for indirectbr / blockaddress. by Richard Osborne · 16 years ago
  3. ec04458 Attempt #2: by Bill Wendling · 16 years ago
  4. e823db8 Added getDefaultSubtargetFeatures method to SubtargetFeatures class which returns a correct feature string for given triple. by Viktor Kutuzov · 16 years ago
  5. ebb5cb9 Add ARMv6 itineraries. by David Goodwin · 16 years ago
  6. a300300 Fix a few places that were missed when we converted to unified syntax. by Bob Wilson · 16 years ago
  7. 834b08a Add a target hook to allow changing the tail duplication limit based on the by Bob Wilson · 16 years ago
  8. 5eea342 The llvm-gcc front-end and the pass manager use two separate TargetData objects. by Bill Wendling · 16 years ago
  9. f04777b Enable arm jumpt table adjustment. by Jim Grosbach · 16 years ago
  10. bce3dbd Both Darwin as and GNU as violate ARM docs wrt printing of addrmode6 by Anton Korobeynikov · 16 years ago
  11. a9ea9ec Set Inst{15-12} (Rd/Rt) to 0b1111 (PC) for BR_JTadd, BR_JTr, and BR_JTm to by Johnny Chen · 16 years ago
  12. d15ac2f Re-apply 89011. It's not to be blamed. by Evan Cheng · 16 years ago
  13. 6db07ea Revert 89011. Buildbot thinks it might be breaking stuff. by Evan Cheng · 16 years ago
  14. a0a95a3 When moving a block for table jumps, make sure the prior block terminator by Jim Grosbach · 16 years ago
  15. 6cccc30 MOV64rm should be marked isReMaterializable. by Evan Cheng · 16 years ago
  16. 574186f A few more instructions that should be marked re-materializable. by Evan Cheng · 16 years ago
  17. 9d52e8d Set Rm bits of BX_RET to 0b1110 (R14); and set condition code bits of BRIND to by Johnny Chen · 16 years ago
  18. d1ba06b Make X86-64 in the Large model always emit 64-bit calls. by Jeffrey Yasskin · 16 years ago
  19. 600c043 - Check memoperand alignment instead of checking stack alignment. Most load / store folding instructions are not referencing spill stack slots. by Evan Cheng · 16 years ago
  20. 7bde297 Make the pass class name more explicit. by Jim Grosbach · 16 years ago
  21. 074fb02 make pass name a bit more clear by Jim Grosbach · 16 years ago
  22. 08cbda5 Simplify thumb2 jump table adjustments. Remove unnecessary calculation and by Jim Grosbach · 16 years ago
  23. 9249efe clarify comment by Jim Grosbach · 16 years ago
  24. b2e86bb back off for a bit. tracking down weirdness by Jim Grosbach · 16 years ago
  25. ca215e7 Analyze has to be before checking the condition, obviously. Properly construct an iterator for prior. by Jim Grosbach · 16 years ago
  26. add2076 Disable ldc1/sdc1 instructions for mips1 targets. by Bruno Cardoso Lopes · 16 years ago
  27. 6e0b658 - Fix a small bug while handling target constant pools (one param was missing). by Bruno Cardoso Lopes · 16 years ago
  28. a443217 Detect need for autoalignment of the stack earlier to catch spills more by Jim Grosbach · 16 years ago
  29. 6cb6788 set the def of the VLD1q64 properly by Jim Grosbach · 16 years ago
  30. 93f9f7a Add a complex missed optimization opportunity I came across while investigating by Nick Lewycky · 16 years ago
  31. 9c477f5 cleanup. by Jim Grosbach · 16 years ago
  32. 00a6a1f Cleanup flow, and only update the jump table we're analyzing when replacing a destination MBB. by Jim Grosbach · 16 years ago
  33. 13c4fab Add XCore support for arbitrary-sized aggregate returns. by Richard Osborne · 16 years ago
  34. b23f3aa Temporary disable the error - it seems to be too conservative. by Anton Korobeynikov · 16 years ago
  35. 067d024 Add llvm::sys::getHostCPUName, for detecting the LLVM name for the host CPU. by Daniel Dunbar · 16 years ago
  36. 9a501cf revert 88761 as it fails builds. by Sanjiv Gupta · 16 years ago
  37. 6fb01a7 Fix debug info crashes for PIC16. by Sanjiv Gupta · 16 years ago
  38. d57cdd5 - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo. by Evan Cheng · 16 years ago
  39. 0cd22dd When expanding t2STRDi8 r, r to two stores, add kill markers correctly. by Evan Cheng · 16 years ago
  40. 52cd548 The instruction pointer %RIP is a reserved register on x86_64. by Jakob Stoklund Olesen · 16 years ago
  41. 1924aab by David Greene · 16 years ago
  42. 87d21b9 Allow target to specify regclass for which antideps will only be broken along the critical path. by David Goodwin · 16 years ago
  43. a8173b9 Support fp64 immediate zero, this fixes only part of PR5445 by Bruno Cardoso Lopes · 16 years ago
  44. 1e60881 Adjust isConstantSplat to allow for big-endian targets. by Dale Johannesen · 16 years ago
  45. c1a07be Block renumbering by Jim Grosbach · 16 years ago
  46. f4cbc0e use lower case for readability by Jim Grosbach · 16 years ago
  47. dda3978 by David Greene · 16 years ago
  48. b9c2fd9 by David Greene · 16 years ago
  49. b87bc95 by David Greene · 16 years ago
  50. 3f2bf85 by David Greene · 16 years ago
  51. 05872ea Add compare_lower and equals_lower methods to StringRef. Switch all users of by Benjamin Kramer · 16 years ago
  52. 80697d1 Update TB[BH] layout optimization. Add support for moving the target block by Jim Grosbach · 16 years ago
  53. b9d2c03 Use table to separate opcode from operands. by Evan Cheng · 16 years ago
  54. 06b53c0 isLegalICmpImmediate should take a signed integer; code clean up. by Evan Cheng · 16 years ago
  55. 01dec0e Revert 86857. It's causing consumer-typeset to fail, and there's a better way to do it forthcoming anyway. by Jim Grosbach · 16 years ago
  56. 9089ba8 A real solution for the first part of PR5445 by Bruno Cardoso Lopes · 16 years ago
  57. 77e4751 Add TargetLowering::isLegalICmpImmediate. It tells LSR what immediate can be folded into target icmp instructions. by Evan Cheng · 16 years ago
  58. f4997e8 Do jump table adjustment before constant island allocation by Jim Grosbach · 16 years ago
  59. adaace8 Set isBarrier = 1 on return instructions, as they are control barriers. by Dan Gohman · 16 years ago
  60. e94975e Use a tab in INT3's asm string, for consistency. by Dan Gohman · 16 years ago
  61. fc926c2 another const prop failure. by Chris Lattner · 16 years ago
  62. 6fdfc9c add a note by Chris Lattner · 16 years ago
  63. 1fc7d71 by Jim Grosbach · 16 years ago
  64. 253e9b2 llvm-gcc/clang don't (won't?) need this hack. by Daniel Dunbar · 16 years ago
  65. 1742498 add a note by Chris Lattner · 16 years ago
  66. b6ad915 I did this a week or two ago by Chris Lattner · 16 years ago
  67. 5b37fba Don't mark conditional branch instructions as control barriers. by Dan Gohman · 16 years ago
  68. b19a5e9 Modify how the prologue encoded the "move" information for the FDE. GCC by Bill Wendling · 16 years ago
  69. 4b6bbe1 Change Thumb1 address mode printing, instead of [r0, #2 * 4] Now [r0, #8] by Evan Cheng · 16 years ago
  70. 1e13c79 Add a comment. by Evan Cheng · 16 years ago
  71. 5da5885 Add a monstrous hack to improve X86ISelDAGToDAG compile time. by Daniel Dunbar · 16 years ago
  72. 734516d Fix PR5445 by Bruno Cardoso Lopes · 16 years ago
  73. 81cf432 Fix DenseMap iterator constness. by Jeffrey Yasskin · 16 years ago
  74. c2e8a7e Fixed to address code review. No functional changes. by David Goodwin · 16 years ago
  75. 0855dee Allow targets to specify register classes whose member registers should not be renamed to break anti-dependencies. by David Goodwin · 16 years ago
  76. 803b48a Now that the default is 'enabled,' a separate command line option for ARM is by Jim Grosbach · 16 years ago
  77. 92eb919 Enable dynamic stack realignment by default. by Jim Grosbach · 16 years ago
  78. ad353c7 Set dynamic stack realignment to real values. by Jim Grosbach · 16 years ago
  79. 2718e43 Similar to r86588, but for Darwin this time. by Bill Wendling · 16 years ago
  80. b1ec31d The jump table was being generated before the end label for exception handling by Bill Wendling · 16 years ago
  81. 43cca69 Work around assembler not recognizing #0.0 form immediate for vmcp by Jim Grosbach · 16 years ago
  82. b8e0ebf Fix PR5149. by Bruno Cardoso Lopes · 16 years ago
  83. e516549 Use Unified Assembly Syntax for the ARM backend. by Jim Grosbach · 16 years ago
  84. f0b47b7 Add and-not (bic) patterns. Based heavily on patch by Brian Lucas! by Anton Korobeynikov · 16 years ago
  85. 830fe7b Move OR patterns upper to all logical stuff. No functionality change. by Anton Korobeynikov · 16 years ago
  86. ff2c186 Some nice peephole patterns. Based on patch by Brian Lucas! by Anton Korobeynikov · 16 years ago
  87. 764cfaa Print tab before operand of jcc by Anton Korobeynikov · 16 years ago
  88. 52f28e9 Fix invalid operand updates & implement post-inc memory operands by Anton Korobeynikov · 16 years ago
  89. 773943a Throw an error when stack realignment stuff fails instead of silent by Anton Korobeynikov · 16 years ago
  90. 7e89738 Make TargetData::getStringRepresentation spit out native integer types, by Chris Lattner · 16 years ago
  91. 31bc849 Use aligned load/store instructions for spilling Q registers when we know the stack slot is 128 bit aligned by Jim Grosbach · 16 years ago
  92. fdc8340 Refactor code. by Evan Cheng · 16 years ago
  93. 0b10b91 x86 vector shuffle cleanup/fixes: by Nate Begeman · 16 years ago
  94. 31c24bf 80-column cleanup of file header comments by Jim Grosbach · 16 years ago
  95. 8a5ec86 Support alignment specifier for NEON vld/vst instructions by Jim Grosbach · 16 years ago
  96. f80fcd0 Improve tail call elimination to handle the switch statement. by Nick Lewycky · 16 years ago
  97. bf99281 t2ldrpci_pic can be used for blockaddress as well. by Evan Cheng · 16 years ago
  98. 59a9178 indicate what the native integer types for the target are. Please verify. by Chris Lattner · 16 years ago
  99. 06ac082 First try of the post-inc operands handling... Not fully worked, though :( by Anton Korobeynikov · 16 years ago
  100. 6534f83 Add some dummy support for post-incremented loads by Anton Korobeynikov · 16 years ago