1. 0262db3 Fix documentation on the path to Bitcode reader/writer by Michael Liao · 11 years ago
  2. 6c21feb Convert another use of sys::identifyFileType. by Rafael Espindola · 11 years ago
  3. 3ecfcc2 Convert another use of sys::identifyFileType. by Rafael Espindola · 11 years ago
  4. d1b6ca2 Change how globalopt handles aliases in llvm.used. by Rafael Espindola · 11 years ago
  5. 9e26acb Convert another use of sys::identifyFileType. by Rafael Espindola · 11 years ago
  6. 0179706 Port r183666 to identify_magic. by Rafael Espindola · 11 years ago
  7. 9bd9f8e Fix variable name. by Rafael Espindola · 11 years ago
  8. 4fbf663 Fix variable name style. Don't cast to and from int. by Rafael Espindola · 11 years ago
  9. d27a978 Convert another use of sys::identifyFileType. by Rafael Espindola · 11 years ago
  10. 98ee2f9 Convert another use of sys::identifyFileType. by Rafael Espindola · 11 years ago
  11. de6fe4d Convert a use of sys::identifyFileType to sys::fs::identify_magic. by Rafael Espindola · 11 years ago
  12. 6c59c7a R600: Make helper functions static. by Benjamin Kramer · 11 years ago
  13. 9f8e6da Require members of llvm.used to be named. by Rafael Espindola · 11 years ago
  14. 6c921a5 Rework r183728, suppress assert(0) for now. Its behavior depends on assertions on win32 hosts. by NAKAMURA Takumi · 11 years ago
  15. 55ab731 It adds support for negative zero offsets for loads and stores. by Mihai Popa · 11 years ago
  16. 16ad92a This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3. by Mihai Popa · 11 years ago
  17. aa80037 ARM: Enforce decoding rules for VLDn instructions by Amaury de la Vieuville · 11 years ago
  18. 3862709 ARM: Fix STREX/LDREX reecoding by Amaury de la Vieuville · 11 years ago
  19. c139672 Tweak a couple of tests on win32 hosts with +Asserts. by NAKAMURA Takumi · 11 years ago
  20. 6915854 ARMAsmBackend.cpp: Use Triple::isOSBinFormatCOFF() instead of isOSWindows(). by NAKAMURA Takumi · 11 years ago
  21. 2266ef3 Whitespace. by NAKAMURA Takumi · 11 years ago
  22. 457c8eb Fix dubious type name similar to member name. by Sean Silva · 11 years ago
  23. 981aec8 Fix spurious semicolons. by Sean Silva · 11 years ago
  24. 5918b7a [yaml2obj] Initial ELF support. by Sean Silva · 11 years ago
  25. 9bdd785 ARM: diagnose ARM/Thumb assembly switches on CPUs only supporting one. by Tim Northover · 11 years ago
  26. 45dec48 Fix xemacs mode line, don't put them in .cpp files (just header files). No by Nick Lewycky · 11 years ago
  27. f0aefa8 Remove a few fixmes, the only work we're doing is getting the string by Eric Christopher · 11 years ago
  28. 0fbaa37 Fix up comment. by Eric Christopher · 11 years ago
  29. 175a780 Remove unused function. by Eric Christopher · 11 years ago
  30. d32d7a5 IndentCount is only used within NDEBUG code. by Eric Christopher · 11 years ago
  31. e5609f3 X86: Stop LEA64_32r doing unspeakable things to its arguments. by Tim Northover · 11 years ago
  32. 6d315c6 Add a missing 'e'. by Rafael Espindola · 11 years ago
  33. aca93cf tblgen: Assert that InstRWs doesn't grows when we don't expect it. by Benjamin Kramer · 11 years ago
  34. 2789165 by Ulrich Weigand · 11 years ago
  35. 7c6f90d by Ulrich Weigand · 11 years ago
  36. b838f9f by Ulrich Weigand · 11 years ago
  37. 6c1bd29 Silencing an MSVC warning about comparing signed and unsigned values. by Aaron Ballman · 11 years ago
  38. 27b7ade Remove the old IdentifyFileType now that lld was updated. by Rafael Espindola · 11 years ago
  39. f12745f Pass a StringRef to sys::identifyFileType. by Rafael Espindola · 11 years ago
  40. b972457 Fix an out of bounds array access. by Rafael Espindola · 11 years ago
  41. 91de80a Update for current naming conventions. by Rafael Espindola · 11 years ago
  42. 38946ca Fix misleading comments in ARMAsmParser by Amaury de la Vieuville · 11 years ago
  43. 4e9a96d ARM: ISB cannot be passed the same options as DMB by Amaury de la Vieuville · 11 years ago
  44. 7c32502 [NVPTX] Remove old CONST_NOT_GEN address space that is not being used anymore and causes constants to be emitted in the global address space by Justin Holewinski · 11 years ago
  45. 48d5e75 Avoid warnings about unused parameters that tend to come up a lot when by Duncan Sands · 11 years ago
  46. 366d94e Add test for ARM FastISel load/store register classes by JF Bastien · 11 years ago
  47. b0ee97a Fix a regression I introduced when I expanded the complex pseudos in by Reed Kotler · 11 years ago
  48. 068ecc1 tblgen: always lookup values from the original vector as it could be grown under our feet. by Benjamin Kramer · 11 years ago
  49. 3ade978 Add a const version of findNearestCommonDominator to PostDom for convenience. by Benjamin Kramer · 11 years ago
  50. c8ecf53 Refine the ARM EHABI test cases. by Logan Chien · 11 years ago
  51. 18cba56 Fix ARM unwind opcode assembler in several cases. by Logan Chien · 11 years ago
  52. 40e071c Removed PackedDouble domain from scalar instructions. Added more formats for the scalar stuff. by Elena Demikhovsky · 11 years ago
  53. d84b17e Make DeadArgumentElimination more conservative on variadic functions by Tim Northover · 11 years ago
  54. 1fe907e ARM FastISel fix load register classes by JF Bastien · 11 years ago
  55. a2f8d37 TargetLowering: Clean up method description comments by David Majnemer · 11 years ago
  56. 0c79301 sys::process::get_id() now returns the process ID instead of a process handle on Windows. Patch thanks to Kim Gräsman! by Aaron Ballman · 11 years ago
  57. 1799921 [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend. by Venkatraman Govindaraju · 11 years ago
  58. 9eefea0 ARM: fix VMOVvnf32 decoding when ambiguous with VCVT by Amaury de la Vieuville · 11 years ago
  59. ae50ddb ARM: enforce SRS decoding constraints by Amaury de la Vieuville · 11 years ago
  60. 46e136c ARM: fix CPS decoding when ambiguous with QADD by Amaury de la Vieuville · 11 years ago
  61. c64835b ARM: fix VCVT decoding by Amaury de la Vieuville · 11 years ago
  62. 2dce4f2 Update code listings in LLVM tutorial. by Logan Chien · 11 years ago
  63. 9792b64 Fix a potential bug in r183584. by Shuxin Yang · 11 years ago
  64. dbfb960 Don't artifically restrict input object size. by Sean Silva · 11 years ago
  65. 2c69e90 Fix unused variable warning from my previous patch. by JF Bastien · 11 years ago
  66. 7462a87 [mips] Use a helper function which compares the size of the source and by Akira Hatanaka · 11 years ago
  67. c0cc283 Reapply r183552. This time, use a standard type for the option to avoid template by Quentin Colombet · 11 years ago
  68. 843c6c2 R600: Use a refined heuristic to choose when switching clause by Vincent Lejeune · 11 years ago
  69. b01bdf8 R600: Anti dep better handled in tex clause by Vincent Lejeune · 11 years ago
  70. ec2aaad Remember the anyext patterns. by Jakob Stoklund Olesen · 11 years ago
  71. 7de1d32 Add missing zextloadi1 to i64 patterns. PR16721. by Jakob Stoklund Olesen · 11 years ago
  72. 1c2b03a Fix an assertion in MemCpyOpt pass. by Shuxin Yang · 11 years ago
  73. 40be73b Disallow i64 div/rem in PPC32 counter loops by Hal Finkel · 11 years ago
  74. 95f24fb Revert commits related to stack warning. by Quentin Colombet · 11 years ago
  75. 2e10e8e Explicit triple in warn stack size test cases to not depend on OS. by Quentin Colombet · 11 years ago
  76. e488b4e Don't cache the instruction and register info from the TargetMachine, because by Bill Wendling · 11 years ago
  77. a5e5ba6 Don't cache the instruction and register info from the TargetMachine, because by Bill Wendling · 11 years ago
  78. 1ce4985 Remove unused c'tor. by Bill Wendling · 11 years ago
  79. df74b86 R600: Fix calculation of stack offset in AMDGPUFrameLowering by Tom Stellard · 11 years ago
  80. fc61b6f Don't cache the instruction and register info from the TargetMachine, because by Bill Wendling · 11 years ago
  81. 3ff0abf R600: Rework subtarget info and remove AMDILDevice classes by Tom Stellard · 11 years ago
  82. c1dcb8d Don't cache the instruction and register info from the TargetMachine, because by Bill Wendling · 11 years ago
  83. 8b0f77b [docs] Add link to Microsoft PE/COFF Spec. by Rui Ueyama · 11 years ago
  84. b5632b5 Don't cache the instruction and register info from the TargetMachine, because by Bill Wendling · 11 years ago
  85. ce96147 R600: Fix the fetch limits for R600 generation GPUs by Tom Stellard · 11 years ago
  86. 630547a R600: Move Subtarget feature definitions into AMDGPU.td by Tom Stellard · 11 years ago
  87. 6f3b493 R600: Remove unnecessary include by Tom Stellard · 11 years ago
  88. 88fe682 Add more explicit link targets to headers in LangRef.rst by Eli Bendersky · 11 years ago
  89. 9a6b9bf Add a backend option to warn on a given stack size limit. by Quentin Colombet · 11 years ago
  90. 8fc760c ARM FastISel integer sext/zext improvements by JF Bastien · 11 years ago
  91. 1983a4c R600: Don't compare iterators of different maps. by Benjamin Kramer · 11 years ago
  92. 1de1410 Add explicit link targets to some headers in LangRef.rst by Eli Bendersky · 11 years ago
  93. eda4b8e No functionality change. by Manman Ren · 11 years ago
  94. fcca6c6 Teach AsmPrinter how to print odd constants. by Quentin Colombet · 11 years ago
  95. 576d49a DIBuilder: No functionality change. by Manman Ren · 11 years ago
  96. 2e0cebd Vincent says the element is at most once in the vector, so we don't need a full std::remove. by Benjamin Kramer · 11 years ago
  97. 149d1a1 Use isxdigit. by Rafael Espindola · 11 years ago
  98. 814b527 Make operator== non-member for greater symmetry. by Rafael Espindola · 11 years ago
  99. 6ca5fd3 Fix a typo in asm string of BP* family of instructions. With this fix by Roman Divacky · 11 years ago
  100. 2e2630b [Object/COFF] BaseOfData field should be absent in PE32+. by Rui Ueyama · 11 years ago