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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 03236be44af1d98eb8daa57e8eb8b7bdd7884523 / lib / Target
  1. 03236be Rather than having printMemOperand change the way memory operands are printed by Akira Hatanaka · 14 years ago
  2. 17a2f8e Define class MipsMCInstLower. by Akira Hatanaka · 14 years ago
  3. aa08ea0 Change visibility of MipsAsmPrinter. by Akira Hatanaka · 14 years ago
  4. 2091a0d Define class MipsMCSymbolRefExpr. by Akira Hatanaka · 14 years ago
  5. 4d1abf1 Simplify MipsRegisterInfo::eliminateFrameIndex. by Akira Hatanaka · 14 years ago
  6. 4761a8d Rewrite comment in English. by Evan Cheng · 14 years ago
  7. 963b03c Rename attribute 'thumb' to a more descriptive 'thumb-mode'. by Evan Cheng · 14 years ago
  8. d3ac47f Reverse order of operands of address operand mem so that the base operand comes by Akira Hatanaka · 14 years ago
  9. e280519 Add missing return statement. by Akira Hatanaka · 14 years ago
  10. a850411 Update CMake library dependencies by Oscar Fuentes · 14 years ago
  11. 7f358da Fix CMake build by Douglas Gregor · 14 years ago
  12. 375db7f The VMLA instruction and its friends are not actually fused; they're plain old by Cameron Zwarich · 14 years ago
  13. db06873 Sink feature IsThumb into MC layer. by Evan Cheng · 14 years ago
  14. 0ddff1b Compute feature bits at time of MCSubtargetInfo initialization. by Evan Cheng · 14 years ago
  15. b99e412 Use ArrayRef instead of a std::vector&. by Bill Wendling · 14 years ago
  16. 39dfb0f Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. by Evan Cheng · 14 years ago
  17. 6a6b8c3 Add a target hook to encode the compact unwind information. by Bill Wendling · 14 years ago
  18. 94ca42f Factor ARM triple parsing out of ARMSubtarget. Another step towards making ARM subtarget info available to MC. by Evan Cheng · 14 years ago
  19. 78a9f13 Add ARM MC registry routines. by Evan Cheng · 14 years ago
  20. ed5e355 Rename files for consistency. by Evan Cheng · 14 years ago
  21. d1689ae Mark ARM pseudo-instructions as isPseudo. by Jim Grosbach · 14 years ago
  22. d378b32 Remove un-used encoding info from Pseudo MLAv5. by Jim Grosbach · 14 years ago
  23. 486dd90 Constify getCompactUnwindRegNum. by Bill Wendling · 14 years ago
  24. b262799 createMCInstPrinter doesn't need TargetMachine anymore. by Evan Cheng · 14 years ago
  25. d521f2d Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that a by Kevin Enderby · 14 years ago
  26. 68ae5b4 Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo. by Evan Cheng · 14 years ago
  27. af45b3d Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, use proper aliases for the pclmullqlqdq and friends. PR10269. by Eli Friedman · 14 years ago
  28. bc20e4f ARM estimateStackSize() needs to account for simplified call frames. by Jim Grosbach · 14 years ago
  29. cbb1186 Remove accidentaly left node from previous iteration of the patch. by Roman Divacky · 14 years ago
  30. b272332 Make the i64 and f64 be 64bit ABI aligned in the target description. by Roman Divacky · 14 years ago
  31. d6b98e8 Remove unused array. by Duncan Sands · 14 years ago
  32. 0d3d956 Consistent diagnostic capitalization and redundant context elimination. by Jakob Stoklund Olesen · 14 years ago
  33. d519de0 Include a source location when complaining about bad inline assembly. by Jakob Stoklund Olesen · 14 years ago
  34. e3997d4 TargetConstant immediates won't be placed into registers so tighten by Eric Christopher · 14 years ago
  35. 385e930 Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. by Evan Cheng · 14 years ago
  36. ce795dc Add MCSubtargetInfo target registry stuff. by Evan Cheng · 14 years ago
  37. adebeea Calling-convention specifications for illegal types are no-ops. Simplify based on this. by Eli Friedman · 14 years ago
  38. a760398 ARMv7M vs. ARMv7E-M support. by Jim Grosbach · 14 years ago
  39. 5b1b4489 Rename TargetSubtarget to TargetSubtargetInfo for consistency. by Evan Cheng · 14 years ago
  40. 9421470 - Added MCSubtargetInfo to capture subtarget features and scheduling by Evan Cheng · 14 years ago
  41. eb03c3b Fix off-by-one error. by Jim Grosbach · 14 years ago
  42. 4db3cff Hide the call to InitMCInstrInfo into tblgen generated ctor. by Evan Cheng · 14 years ago
  43. efeedce Pseudo-ize t2MOVCC[ri]. by Jim Grosbach · 14 years ago
  44. c4f24eb Improve Mips back-end's handling of DBG_VALUE. by Akira Hatanaka · 14 years ago
  45. 5e653c9 Add support for the 'j' immediate constraint. This is conditionalized on by Eric Christopher · 14 years ago
  46. d5dc9ec Add support for the ARM 't' register constraint. And another testcase by Eric Christopher · 14 years ago
  47. 1070f82 We'll return a null RC by default if we can't match. by Eric Christopher · 14 years ago
  48. 89bd71f Add support for the 'x' constraint. by Eric Christopher · 14 years ago
  49. 09b4467 Capitalize the unsigned part of the initializer. by Eric Christopher · 14 years ago
  50. 35e6d4d Rename Pair to RCPair lacking any better naming ideas. by Eric Christopher · 14 years ago
  51. 2374cb8 Use the correct registers on X86_64. by Bill Wendling · 14 years ago
  52. 098c7ac Fix a problem with fast-isel return values introduced in r134018. by Jakob Stoklund Olesen · 14 years ago
  53. 2a7b41b Refact ARM Thumb1 tMOVr instruction family. by Jim Grosbach · 14 years ago
  54. 73744df Add support for the 'h' constraint. by Eric Christopher · 14 years ago
  55. 5cd2791 Add target a target hook to get the register number used by the compact unwind by Bill Wendling · 14 years ago
  56. a8cca80 Add a convenience typedef for std::pair<unsigned, const TargetRegisterClass*>. by Eric Christopher · 14 years ago
  57. 63b46fa Thumb1 register to register MOV instruction is predicable. by Jim Grosbach · 14 years ago
  58. 1bd6221 Tweak error messages to match GCC. Should fix gcc.target/i386/pr30848.c by Jakob Stoklund Olesen · 14 years ago
  59. ff97eb0 Pseudo-ize the Thumb tTPsoft instruction. by Jim Grosbach · 14 years ago
  60. 16f9924 Pseudo-ize the t2LDMIA_RET instruction. by Jim Grosbach · 14 years ago
  61. 4629d50 Pseudo-ize the Thumb tPOP_RET instruction. by Jim Grosbach · 14 years ago
  62. dafc17e Kill dead code. by Jim Grosbach · 14 years ago
  63. 41ca4b7 Size reducing SP adjusting t2ADDri needs to check predication. by Jim Grosbach · 14 years ago
  64. 4cc446b Fix ARMSubtarget feature parsing. by Evan Cheng · 14 years ago
  65. 276365d Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to by Evan Cheng · 14 years ago
  66. ca0ede7 Recognize the xstorerng alias for VIA PadLock's xstore instruction. by Joerg Sonnenberger · 14 years ago
  67. 0a1509e Make sure we use the correct register class here since we'll need to by Eric Christopher · 14 years ago
  68. 5d8aa34 Fix a small thinko for constant i64 lock/orq optimization where we by Eric Christopher · 14 years ago
  69. f6fd909 Remove redundant Thumb2 ADD/SUB SP instruction definitions. by Jim Grosbach · 14 years ago
  70. 6531bdd Always adjust the stack pointer immediately after the call. by Jakob Stoklund Olesen · 14 years ago
  71. faff127 In the ARM global merging pass, allow extraneous alignment specifiers. This pass by Cameron Zwarich · 14 years ago
  72. fa6f591 Remove getRegClassForInlineAsmConstraint from the ARM port. by Eric Christopher · 14 years ago
  73. 50cf9b3 Remove todo. by Eric Christopher · 14 years ago
  74. 74472b4 Refactor away tSpill and tRestore pseudos in ARM backend. by Jim Grosbach · 14 years ago
  75. 1e96564 Add a TODO for the Alpha port inline asm constraints. by Eric Christopher · 14 years ago
  76. 46b65f7 Move Alpha from getRegClassForInlineAsmConstraint to by Eric Christopher · 14 years ago
  77. 38d6426 Update comment for getRegForInlineAsmConstraint for Mips. by Eric Christopher · 14 years ago
  78. 1c24ba9 Move the Blackfin port away from getRegClassForInlineAsmConstraint by by Eric Christopher · 14 years ago
  79. 193f7e2 Remove getRegClassForInlineAsmConstraint from MBlaze. Add a TODO comment by Eric Christopher · 14 years ago
  80. 314aff1 Remove getRegClassForInlineAsmConstraint for Mips. by Eric Christopher · 14 years ago
  81. 158bf50 Remove getRegClassForInlineAsmConstraint from sparc. by Eric Christopher · 14 years ago
  82. ca42299 Move XCore from getRegClassForInlineAsmConstraint to by Eric Christopher · 14 years ago
  83. d176af8 Use getRegForInlineAsmConstraint instead of custom defining regclasses by Eric Christopher · 14 years ago
  84. c4a8430 Fix CMake build. by NAKAMURA Takumi · 14 years ago
  85. ab8be96 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC. by Evan Cheng · 14 years ago
  86. d5b03f2 Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. by Evan Cheng · 14 years ago
  87. 6844f7b Hide more details in tablegen generated MCRegisterInfo ctor function. by Evan Cheng · 14 years ago
  88. 94b01f6 Add MCInstrInfo registeration machinery. by Evan Cheng · 14 years ago
  89. 22fee2d Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc by Evan Cheng · 14 years ago
  90. e837dea - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and by Evan Cheng · 14 years ago
  91. 9bbe4d6 Clean up the handling of the x87 fp stack to make it more robust. by Jakob Stoklund Olesen · 14 years ago
  92. 118c9a0 Remove warning: 'c0' may be used uninitialized in this function. by Chad Rosier · 14 years ago
  93. bdb226e Implement ISD::VAARG lowering on PPC32. by Roman Divacky · 14 years ago
  94. cee94d7 Fix cmake build. by Rafael Espindola · 14 years ago
  95. adf7366 ARM Thumb2 asm syntax optional destination operand for binary operators. by Jim Grosbach · 14 years ago
  96. 6b8f1e3 ARM Assembly support for Thumb mov-immediate. by Jim Grosbach · 14 years ago
  97. df8fe99 ARM Asm parsing of Thumb2 move immediate. by Jim Grosbach · 14 years ago
  98. 15993f8 More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. by Evan Cheng · 14 years ago
  99. d1f0bbe Add exception necessitated by 133938. by Jim Grosbach · 14 years ago
  100. 660a9ec ARM assembly carry set/clear condition code aliases for 'hi/lo' by Jim Grosbach · 14 years ago