1. 069287d X86 integer register classes naming changes. Make them consistent with FP, vector classes. by Evan Cheng · 19 years ago
  2. 8c0c10c Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend, by Chris Lattner · 19 years ago
  3. 98d0d7d More coverity fixes by Chris Lattner · 19 years ago
  4. 03ea4c8 Dead variable by Chris Lattner · 19 years ago
  5. 0bbac9f Remove dead code by Evan Cheng · 19 years ago
  6. 07000c6 Refactor a bunch of includes so that TargetMachine.h doesn't have to include by Owen Anderson · 19 years ago
  7. f4df680 Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot by Evan Cheng · 19 years ago
  8. 8399c5c Remove a completed entry. by Evan Cheng · 19 years ago
  9. 7faec9b Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code. by Chris Lattner · 19 years ago
  10. c9260a1 MASM doesn't have one of these. by Chris Lattner · 19 years ago
  11. e7027d5 Preserve prior behavior by Chris Lattner · 19 years ago
  12. dad9c5a Fix the MASM asmprinter's lies. It does not want to emit code to .text/.data by Chris Lattner · 19 years ago
  13. 4632d7a Split SwitchSection into SwitchTo{Text|Data}Section methods. by Chris Lattner · 19 years ago
  14. 9fd868a Another bad case I noticed by Chris Lattner · 19 years ago
  15. 8ef67ac add a note by Chris Lattner · 19 years ago
  16. 403be7e Fixing truncate. Previously we were emitting truncate from r16 to r8 as by Evan Cheng · 19 years ago
  17. 7481145 Typo's by Evan Cheng · 19 years ago
  18. d43b18d Fix some loose ends in MASM support. by Jeff Cohen · 19 years ago
  19. 80a7ecc Teach the X86 backend about non-i32 inline asm register classes. by Chris Lattner · 19 years ago
  20. 7660ebc Print *some* grouping around inline asm blocks so we know where they are. by Chris Lattner · 19 years ago
  21. bd04aa5 Teach the code generator to use cvtss2sd as extload f32 -> f64 by Chris Lattner · 19 years ago
  22. 4713724 Need extload patterns after Chris' DAG combiner changes by Evan Cheng · 19 years ago
  23. 8f7f712 Better implementation of truncate. ISel matches it to a pseudo instruction by Evan Cheng · 19 years ago
  24. 8b915b4 Remove and simplify some more machineinstr/machineoperand stuff. by Chris Lattner · 19 years ago
  25. 2d90ac7 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. by Chris Lattner · 19 years ago
  26. e53f4a0 Move some methods out of MachineInstr into MachineOperand by Chris Lattner · 19 years ago
  27. 63b3d71 There shalt be only one "immediate" operand type! by Chris Lattner · 19 years ago
  28. 10efcfa Make external globals public; other minor cleanup. by Jeff Cohen · 19 years ago
  29. a6e24d8 Make Intel syntax the default when LLVM is built with VC++. by Jeff Cohen · 19 years ago
  30. 4efeab2 Remove a bunch more dead V9 specific stuff by Chris Lattner · 19 years ago
  31. ea50fab Remove a bunch more SparcV9 specific stuff by Chris Lattner · 19 years ago
  32. 34fb2ca Remove some more V9-specific stuff. by Chris Lattner · 19 years ago
  33. 10f3597 Remove some more unused stuff from MachineInstr that was leftover from V9. by Chris Lattner · 19 years ago
  34. 0e57629 Simplify handling of relocations by Chris Lattner · 19 years ago
  35. 9e062ed Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when by Evan Cheng · 19 years ago
  36. 5a032de Change from using MachineRelocation ctors to using static methods by Chris Lattner · 19 years ago
  37. 93e5c28 inline a simple method by Chris Lattner · 19 years ago
  38. b4432f3 Suck block address tracking out of targets into the JIT Emitter. This by Chris Lattner · 19 years ago
  39. 67977ad Teach the x86 jit how to handle jump tables not directly used by a jump by Nate Begeman · 19 years ago
  40. a69571c Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. by Owen Anderson · 19 years ago
  41. af1563f Change the BasicBlockAddrs map to be a vector, indexed by MBB number. by Chris Lattner · 19 years ago
  42. f75f9be Several related changes: by Chris Lattner · 19 years ago
  43. a11a929 Remove some stuff from the README by Nate Begeman · 19 years ago
  44. d3f0aef Fix a purely hypothetical problem (for now): emitWord emits in the host by Chris Lattner · 19 years ago
  45. 43b429b Refactor the machine code emitter interface to pull the pointers for the current by Chris Lattner · 19 years ago
  46. 6e0f386 Hooray, everyone now uses the same printBasicBlockLabel implementation by Nate Begeman · 19 years ago
  47. 608c189 There is no reason to use a virtual method to store this word. by Chris Lattner · 19 years ago
  48. cdf38c4 Extend printBasicBlockLabel a bit so that it can be used to print all by Nate Begeman · 19 years ago
  49. 51b776d De-virtualize SwitchSection. by Jeff Cohen · 19 years ago
  50. c6a057b De-virtualize EmitZeroes. by Jeff Cohen · 19 years ago
  51. 4f1ea1e Finish support for Microsoft ML/MASM. May still be a few rough edges. by Jeff Cohen · 19 years ago
  52. c884db4 Make Intel syntax mode friendlier to Microsoft ML assembler (still needs more work). by Jeff Cohen · 19 years ago
  53. 99f2632 Remove %'s from register names when in intel mode. by Chris Lattner · 19 years ago
  54. 10a59ce Mingw32 patches supplied by Anton Korobeynikov. by Jeff Cohen · 19 years ago
  55. 55c25f2 I can't spell: Register, not Regsiter. by Evan Cheng · 19 years ago
  56. 62f2700 Implemented x86 inline asm b, h, w, k modifiers. by Evan Cheng · 19 years ago
  57. 347d5f7 Initial caller side support (for CCC only, not FastCC) of 128-bit vector by Evan Cheng · 19 years ago
  58. 3d48a90 Bare-bone X86 inline asm printer support. by Evan Cheng · 19 years ago
  59. 43f3bd3 Implement four-wide shuffle with 2 shufps if no more than two elements come by Evan Cheng · 19 years ago
  60. 020c41f TargetLowering::LowerArguments should return a VBIT_CONVERT of by Evan Cheng · 19 years ago
  61. ed1492e Use movaps instead of movapd for spill / restore. by Evan Cheng · 19 years ago
  62. 217fde5 Add a note by Chris Lattner · 19 years ago
  63. fea89c1 Make x86 isel lowering produce tailcall nodes. They are match to normal calls by Evan Cheng · 19 years ago
  64. 43824e8 A couple of new entries. by Evan Cheng · 19 years ago
  65. 2fdd95e Support for passing 128-bit vector arguments via XMM registers. by Evan Cheng · 19 years ago
  66. 5fb03ce Oops by Evan Cheng · 19 years ago
  67. 85e3800 Bug fix: not updating NumIntRegs. by Evan Cheng · 19 years ago
  68. eda65fa - Clean up formal argument lowering code. Prepare for vector pass by value work. by Evan Cheng · 19 years ago
  69. 9191dbb Fix fastcc failures. by Evan Cheng · 19 years ago
  70. 1bc7804 Switching over FORMAL_ARGUMENTS mechanism to lower call arguments. by Evan Cheng · 19 years ago
  71. add19dc Keep the stack from on darwin 16-byte aligned. This fixes many JIT failres. by Nate Begeman · 19 years ago
  72. 0db9fe6 Separate LowerOperation() into multiple functions, one per opcode. by Evan Cheng · 19 years ago
  73. 3d1be07 Fix a typo. by Evan Cheng · 19 years ago
  74. a2137b5 Explicitly specify result type for def : Pat<> patterns (if it produces a vector by Evan Cheng · 19 years ago
  75. a7fc642 Added X86 SSE2 intrinsics which can be represented as vector_shuffles. This is by Evan Cheng · 19 years ago
  76. d7ec518 Add a new entry. by Evan Cheng · 19 years ago
  77. 37d1d9b Special case handling two wide build_vector(0, x). by Evan Cheng · 19 years ago
  78. 64e9769 Some missing movlps, movhps, movlpd, and movhpd patterns. by Evan Cheng · 19 years ago
  79. c78d3b4 A little bit more build_vector enhancement for v8i16 cases. by Evan Cheng · 19 years ago
  80. 86661f4 Remove a completed entry. by Evan Cheng · 19 years ago
  81. 49bca85 MakeMIInst() should handle jump table index operands. by Evan Cheng · 19 years ago
  82. 57a6c13 Add a note by Chris Lattner · 19 years ago
  83. 9293451 MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2 by Evan Cheng · 19 years ago
  84. a766765 Optimized stores to the constant pool, while cool, are unnecessary. by Nate Begeman · 19 years ago
  85. 37efe67 JumpTable support! What this represents is working asm and jit support for by Nate Begeman · 19 years ago
  86. 1900c01 Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimization for shuffle of undef. by Evan Cheng · 19 years ago
  87. a083af1 Fix a performance regression. Use {p}shuf* when there are only two distinct elements in a build_vector. by Evan Cheng · 19 years ago
  88. ba05f72 Revamp build_vector lowering to take advantage of movss and movd instructions. by Evan Cheng · 19 years ago
  89. 6e68a77 fix thinko by Chris Lattner · 19 years ago
  90. 3e663a6 add some low-prio notes by Chris Lattner · 19 years ago
  91. 017dcc6 Now generating perfect (I think) code for "vector set" with a single non-zero by Evan Cheng · 19 years ago
  92. 39623da - Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1> by Evan Cheng · 19 years ago
  93. 72cd9a9 Handle v2i64 BUILD_VECTOR custom lowering correctly. v2i64 is a legal type, by Evan Cheng · 19 years ago
  94. 94fe5eb isSplatMask() bug: first element can be an undef. by Evan Cheng · 19 years ago
  95. 80d428c - Added support to do aribitrary 4 wide shuffle with no more than three by Evan Cheng · 19 years ago
  96. fd111b5 Prefer {p}unpack* and mov*dup over {p}shuf* as well. by Evan Cheng · 19 years ago
  97. 2dadaea - Renamed AddedCost to AddedComplexity. by Evan Cheng · 19 years ago
  98. 533a0aa Commute vector_shuffle to match more movlhps, movlp{s|d} cases. by Evan Cheng · 19 years ago
  99. f66a094 More mov{h|l}p{d|s} patterns. by Evan Cheng · 19 years ago
  100. cc0e98c - More mov{h|l}ps patterns. by Evan Cheng · 19 years ago