1. cfa6ec9 Kill off more cerr/cout uses and prune includes a bit. by Benjamin Kramer · 16 years ago
  2. 6456d38 remove some DOUTs by Chris Lattner · 16 years ago
  3. 7a1e872 Update LocalRewriter::DistanceMap when inserting stack loads. by Jakob Stoklund Olesen · 16 years ago
  4. 7db949d Fix a bunch of namespace pollution. by Dan Gohman · 16 years ago
  5. 2d4e6d3 by David Greene · 16 years ago
  6. ce63ffb More migration to raw_ostream, the water has dried up around the iostream hole. by Daniel Dunbar · 16 years ago
  7. fc6ad40 Let each target determines whether a machine instruction is dead. If true, that allows late codeine passes to delete it. by Evan Cheng · 16 years ago
  8. 5d88502 Another rewriter bug exposed by recent coalescer changes. ReuseInfo::GetRegForReload() should make sure the "switched" register is in the desired register class. I'm surprised this hasn't caused more failures in the past. by Evan Cheng · 16 years ago
  9. 5248468 Enable cross register class coalescing. by Evan Cheng · 16 years ago
  10. c1b46f9 Fix my brain cramp by inverting the assertion condition. by Evan Cheng · 16 years ago
  11. 2df5e55 Disable this assert for now, it is firing on an llvm-gcc bootstrap. :( by Daniel Dunbar · 16 years ago
  12. 24cd3c4 Fix inverted preprocessor conditional. by Daniel Dunbar · 16 years ago
  13. 5f15992 Changed my mind. We now allow remat of instructions whose defs have subreg indices. by Evan Cheng · 16 years ago
  14. 3784453 Let callers decide the sub-register index on the def operand of rematerialized instructions. by Evan Cheng · 16 years ago
  15. c23197a llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. by Torok Edwin · 16 years ago
  16. c25e758 assert(0) -> LLVM_UNREACHABLE. by Torok Edwin · 16 years ago
  17. 261ce1d Remove TargetInstrInfo::CommuteChangesDestination and added findCommutedOpIndices which returns the operand indices which are swapped (when applicable). This allows for some code clean up and future enhancements. by Evan Cheng · 16 years ago
  18. 2578ba2 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. by Evan Cheng · 16 years ago
  19. 4784f1f Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. by Evan Cheng · 16 years ago
  20. ac27640 Removed SimpleRewriter. by Lang Hames · 16 years ago
  21. 2c48fe6 Fix for PR4225: When rewriter reuse a value in a physical register , it clear the register kill operand marker and its kill ops information. However, the cleared operand may be a def of a super-register. Clear the kill ops info for the super-register's sub-registers as well. by Evan Cheng · 16 years ago
  22. f41538d Update to in-place spilling framework. Includes live interval scaling and trivial rewriter. by Lang Hames · 16 years ago
  23. 427a6b6 Fix PR4210. Rewritter should track and update kills of sub-registers as well. by Evan Cheng · 16 years ago
  24. eca24fb Teach TransferDeadness to delete truly dead instructions if they do not produce side effects. by Evan Cheng · 16 years ago
  25. 87e3bca Renamed Spiller classes (plus uses and related files) to VirtRegRewriter. by Lang Hames · 16 years ago