1. 23265d0 Remove isTwoAddress from Alpha. by Eric Christopher · 15 years ago
  2. 4ee637c BR is a barrier. by Dan Gohman · 15 years ago
  3. 6784bdf use ins/outs. by Chris Lattner · 15 years ago
  4. 4de3502 add some missing types by Chris Lattner · 15 years ago
  5. e00ed57 tidy up by Chris Lattner · 15 years ago
  6. 6d9f86b remove a bunch of dead named arguments in input patterns, by Chris Lattner · 15 years ago
  7. adaace8 Set isBarrier = 1 on return instructions, as they are control barriers. by Dan Gohman · 16 years ago
  8. 533297b Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a by Dan Gohman · 16 years ago
  9. 20c08e5 move this fp select into a pattern by Andrew Lenharth · 16 years ago
  10. 7b9486a Add an int64_t variant of abs, for host environments by Dale Johannesen · 16 years ago
  11. 7cee817 Add support to tablegen for naming the nodes themselves, not just the operands, by Nate Begeman · 16 years ago
  12. 03a4698 silence warning when asserts disabled. by Chris Lattner · 17 years ago
  13. 41474ba Add a sanity-check to tablegen to catch the case where isSimpleLoad by Dan Gohman · 17 years ago
  14. 068d1c5 This shouldn't be necessary by Andrew Lenharth · 17 years ago
  15. e563bbc Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as by Chris Lattner · 17 years ago
  16. f5aeb1a Rename ConstantSDNode::getValue to getZExtValue, for consistency by Dan Gohman · 17 years ago
  17. 67ca6be Tablegen generated code already tests the opcode value, so it's not by Dan Gohman · 17 years ago
  18. 475871a Rename SDOperand to SDValue. by Dan Gohman · 17 years ago
  19. 2887310 Added MemOperands to Atomic operations since Atomics touches memory. by Mon P Wang · 17 years ago
  20. da47e6e Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. by Evan Cheng · 17 years ago
  21. 6ef781f Final de-tabification. by Bill Wendling · 17 years ago
  22. ab0b949 Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet by Andrew Lenharth · 17 years ago
  23. 22c5c1b llvm.memory.barrier, and impl for x86 and alpha by Andrew Lenharth · 17 years ago
  24. 48be23c rename SDTRet -> SDTNone. by Chris Lattner · 18 years ago
  25. 9b37aaf get def use info more correct. by Chris Lattner · 18 years ago
  26. 834f1ce rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. by Chris Lattner · 18 years ago
  27. c8478d8 Change the 'isStore' inferrer to look for 'SDNPMayStore' by Chris Lattner · 18 years ago
  28. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  29. 6e141fd Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. by Evan Cheng · 18 years ago
  30. 19914ed something wrong with this opt by Andrew Lenharth · 18 years ago
  31. c69107c Unifacalize the CALLSEQ{START,END} stuff. by Bill Wendling · 18 years ago
  32. 0f8d9c0 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack by Bill Wendling · 18 years ago
  33. 20ab290 Add a flag for indirect branch instructions. by Owen Anderson · 18 years ago
  34. 071a279 Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. by Evan Cheng · 18 years ago
  35. ffbacca No more noResults. by Evan Cheng · 18 years ago
  36. 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 18 years ago
  37. 15b7823 Use this nifty Constraints thing and fix the inverted conditional moves by Andrew Lenharth · 18 years ago
  38. 3553d86 FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available by Andrew Lenharth · 19 years ago
  39. 913ab05 Be sure to grab weak functions too, and make implicit defs comments by Andrew Lenharth · 19 years ago
  40. 1331dec silence warnings. by Chris Lattner · 19 years ago
  41. d079cdb fix 2006-11-01-vastart.ll by Andrew Lenharth · 19 years ago
  42. 6bbf6b0 more shotenning by Andrew Lenharth · 19 years ago
  43. 956a431 Let us play simplify the td file (and fix a few missed sub and mul patterns). by Andrew Lenharth · 19 years ago
  44. f81173f Add all that branch mangling niftiness by Andrew Lenharth · 19 years ago
  45. 8b2794a Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. by Evan Cheng · 19 years ago
  46. 93b8e49 adjcallstack up/down clobbers the sp by Chris Lattner · 19 years ago
  47. d615ded Use cute tblgen tricks to make zap handling more powerful. Specifically, by Chris Lattner · 19 years ago
  48. 78feeb0 Remove dead/redundant instructions. These are handled by ZAPNOTi by Chris Lattner · 19 years ago
  49. 466685d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 19 years ago
  50. 6b63403 catch constants more often by Andrew Lenharth · 19 years ago
  51. ea4f9d5 Jump tables on Alpha by Andrew Lenharth · 19 years ago
  52. bb7b844 CALLSEQ_* produces chain even if that's not needed. by Evan Cheng · 19 years ago
  53. 043eb82 Remove a duplicate pattern/ by Evan Cheng · 19 years ago
  54. f2b806a Let the alpha breakage begin. First Formals and RET. next Calls by Andrew Lenharth · 19 years ago
  55. a5cc38b ignore ordered/unordered for now by Andrew Lenharth · 19 years ago
  56. f87e793 support x * (c1 + c2) where c1 and c2 are pow2s. special case for c2 == 4 by Andrew Lenharth · 19 years ago
  57. afe3f49 mul by const conversion sequences. more coming soon by Andrew Lenharth · 19 years ago
  58. e5b71d0 fcopysign for mixed mode by Andrew Lenharth · 19 years ago
  59. 283f222 alpha and llvm have different oppinions on which arg is the sign bit by Andrew Lenharth · 19 years ago
  60. 017c556 Alpha Scheduling classes by Andrew Lenharth · 19 years ago
  61. 13beebb fcopysign and get rid of dsnode cruft. custom PA runtimes make this better in some senses by Andrew Lenharth · 19 years ago
  62. 133d310 isStoreToStackSlot by Andrew Lenharth · 20 years ago
  63. 77f0885 Add immediate forms of cmov and remove some cruft by Andrew Lenharth · 20 years ago
  64. c7e1852 cmovle != cmovlt by Chris Lattner · 20 years ago
  65. cedc6f4 PHI and INLINEASM are now built-in instructions provided by Target.td by Chris Lattner · 20 years ago
  66. 9e23485 minor renaming by Andrew Lenharth · 20 years ago
  67. cd1544e allow R28 to be used for frame calculations without entirely removing it from circulation by Andrew Lenharth · 20 years ago
  68. 66e4958 added stores to lsmark by Andrew Lenharth · 20 years ago
  69. 8707605 fix up more lsmark stuff by Andrew Lenharth · 20 years ago
  70. 167bc6e yea, lowering this stuff will basically work by Andrew Lenharth · 20 years ago
  71. 3942447 typo by Andrew Lenharth · 20 years ago
  72. c6a335b nasty nasty patterns by Andrew Lenharth · 20 years ago
  73. 6e707fb fix short immediate loads by Andrew Lenharth · 20 years ago
  74. 3b628f8 this pattern was bogus by Andrew Lenharth · 20 years ago
  75. 29418a8 Int immediate loading fix by Andrew Lenharth · 20 years ago
  76. f7c4bd6 proper branch not equal sequence by Andrew Lenharth · 20 years ago
  77. bfc89d3 unbreak the build, these are now in TargetSelectionDAG.td by Chris Lattner · 20 years ago
  78. feab2f8 Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel. by Andrew Lenharth · 20 years ago
  79. dcbaf8a improve constant loading. Still sucks, but oh well by Andrew Lenharth · 20 years ago
  80. a117b18 let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean by Andrew Lenharth · 20 years ago
  81. aa6ed8c Fix up immediate handling by Andrew Lenharth · 20 years ago
  82. 713b0b5 Restore some happiness to the JIT by Andrew Lenharth · 20 years ago
  83. 424ba78 Fix alpha regressions. by Andrew Lenharth · 20 years ago
  84. 2b4ea79 Added field noResults to Instruction. by Evan Cheng · 20 years ago
  85. eececba add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG by Andrew Lenharth · 20 years ago
  86. 53d8970 All that just to lower div and rem by Andrew Lenharth · 20 years ago
  87. c687b48 All addressing modes are now exposed. The only remaining relocated forms by Andrew Lenharth · 20 years ago
  88. b671860 Unify the patterns for loads and stores. Now offset addressing should be by Andrew Lenharth · 20 years ago
  89. 4e62951 Let's see if we can break things. by Andrew Lenharth · 20 years ago
  90. 9fa4d4c move loads and stores over. Smart addr selection comming by Andrew Lenharth · 20 years ago
  91. 110f224 fix FP selects by Andrew Lenharth · 20 years ago
  92. e41419f FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself by Andrew Lenharth · 20 years ago
  93. dd3ccde it helps if your conditionals are not reversed by Andrew Lenharth · 20 years ago
  94. bbe1225 fix divide and remainder by Andrew Lenharth · 20 years ago
  95. eda80a0 added instructions with inverted immediates by Andrew Lenharth · 20 years ago
  96. 8a3a5fc yea, it helps to have your path set right when testing by Andrew Lenharth · 20 years ago
  97. 5de36f9 These never trigger, but whatever by Andrew Lenharth · 20 years ago
  98. 7962065 move this over to the dag by Andrew Lenharth · 20 years ago
  99. b2156f9 Make typesafe that which isn't: FCMOVxx by Andrew Lenharth · 20 years ago
  100. cd80496 FPSelect and more custom lowering by Andrew Lenharth · 20 years ago