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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 08d012eba490c4906ec773c39db9f2a18a78c997 / test
  1. 08d012e Rename the new unsigned and signed keywords to nuw and nsw, by Dan Gohman · 15 years ago
  2. 1c88eff Add -march=ppc32 lines so that this test doesn't ever default to ppc64. by Dan Gohman · 15 years ago
  3. eadf049 Use getTargetConstant instead of getConstant since it's meant as an constant operand. by Evan Cheng · 15 years ago
  4. 7840250 Make the grep line in this test more specific, to avoid unintended matches. by Dan Gohman · 15 years ago
  5. 1e0c158 Ignore undef uses. by Evan Cheng · 15 years ago
  6. 6dba766 Remove empty test. by Devang Patel · 15 years ago
  7. e54abc9 Introduce MetadataBase, a base class for MDString and MDNode. by Devang Patel · 15 years ago
  8. ed4b2dc Revert commit 76707, it was breaking the llvm-gcc build by Duncan Sands · 15 years ago
  9. 828f704 set the ELF "small" flag on objects that end up in .rodata.cst4 consistently, by Chris Lattner · 15 years ago
  10. 0f4b285 Replace the original ad-hoc code for determining whether (v pred w) implies by Dan Gohman · 15 years ago
  11. 47b1e2a Remove a big test case. by Evan Cheng · 15 years ago
  12. b2f8806 Fix ocaml tests for 64-bit MacOS systems. LLVM is currently built by Bob Wilson · 15 years ago
  13. 3ecadc8 Do not select tSXTB / tSXTH in thumb2 mode. by Evan Cheng · 15 years ago
  14. 7462502 convert this test to filecheck format, which is faster and avoids false matches of "st" -> "stdin" by Chris Lattner · 15 years ago
  15. 99bd8bf add a testcase for the pic16 section handling stuff. by Chris Lattner · 15 years ago
  16. 5d88502 Another rewriter bug exposed by recent coalescer changes. ReuseInfo::GetRegForReload() should make sure the "switched" register is in the desired register class. I'm surprised this hasn't caused more failures in the past. by Evan Cheng · 15 years ago
  17. 634d61b remove a very large testcase for now. by Chris Lattner · 15 years ago
  18. d101a72 Fix a dagga combiner bug: avoid creating illegal constant. by Evan Cheng · 15 years ago
  19. 126b566 Add a testcase for PR2831. by Dan Gohman · 15 years ago
  20. 19211b4 Add a testcase for PR4569, which is now fixed. by Dan Gohman · 15 years ago
  21. af9e7a7 Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1. by Evan Cheng · 15 years ago
  22. c95be59 Cross RC coalescing is now on by default. by Evan Cheng · 15 years ago
  23. 746f3b1 The upper argument of ConstantRange is exclusive, not inclusive. by Dan Gohman · 15 years ago
  24. 76081c4 by David Greene · 15 years ago
  25. 87faa1f Forgot this test earlier. by Evan Cheng · 15 years ago
  26. 1224c38 Assembly and Bitcode support for unsigned/signed overflow flags and by Dan Gohman · 15 years ago
  27. 33d0474 Use TII->findCommutedOpIndices to find the commute operands (rather than guessing). by Evan Cheng · 15 years ago
  28. 5026ae4 Removed the DumpSymbolsandMacros and LoadSymbolsandMacros MCStreamer API as by Kevin Enderby · 15 years ago
  29. 753480a Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class. by Evan Cheng · 15 years ago
  30. f241174 Revert the addition of hasNoPointerOverflow to GEPOperator. by Dan Gohman · 15 years ago
  31. 6aadc4d xfail for now. by Evan Cheng · 15 years ago
  32. 401e10c implement a new magic global "llvm.compiler.used" which is like llvm.used, but by Chris Lattner · 15 years ago
  33. ba8dc03 Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb. by Evan Cheng · 15 years ago
  34. cc17183 This test should be run with -m32. by Daniel Dunbar · 15 years ago
  35. 45d34fe Fix http://llvm.org/bugs/show_bug.cgi?id=4583 by Jakob Stoklund Olesen · 15 years ago
  36. 2451a64 Canonicalize bitcasts between types like <1 x i64> and i64 to by Eli Friedman · 15 years ago
  37. 76e7ba8 Back out 76300; apparently the preference is to canonicalize the other by Eli Friedman · 15 years ago
  38. 8be1739 Add combine: X sdiv (1 << Y) -> X udiv (1 << Y) when X doesn't have the by Eli Friedman · 15 years ago
  39. fc21f8f Canonicalize insert/extractelement from single-element vectors into bitcasts. by Eli Friedman · 15 years ago
  40. 62bb413 Fix simplifylibcalls memset recognition to work on 64-bit platforms by Eli Friedman · 15 years ago
  41. 438d990 Catch more coalescing opportunities. by Evan Cheng · 15 years ago
  42. 5248468 Enable cross register class coalescing. by Evan Cheng · 15 years ago
  43. 59959cd Fix pr4552. Stack slot coloring with register must take care not to generate illegal ams. by Evan Cheng · 15 years ago
  44. b4b53e5 llvm-mc: Add -triple, and start fetching the target asm printer. by Daniel Dunbar · 15 years ago
  45. 47e9fab Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense. by Evan Cheng · 15 years ago
  46. a9af7e6 rename test. by Chris Lattner · 15 years ago
  47. cbc6da6 Testcase for PR4214. by Duncan Sands · 15 years ago
  48. a64eb92 Make promotion in operation legalization for SETCC work correctly. by Eli Friedman · 15 years ago
  49. b8e9ac8 Emit cross regclass register moves for thumb2. Minor code duplication cleanup. by Anton Korobeynikov · 15 years ago
  50. 423ccfe Assume an inline asm might be a call, so we get by Dale Johannesen · 15 years ago
  51. 3ac1ab8 by David Greene · 15 years ago
  52. 57e599a Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands. by Jakob Stoklund Olesen · 15 years ago
  53. 5f15992 Changed my mind. We now allow remat of instructions whose defs have subreg indices. by Evan Cheng · 15 years ago
  54. dfce360 this should be xfailed on darwin. Darwin doesn't use the libstdc++ in the llvm-gcc distro, it uses the system version. by Chris Lattner · 15 years ago
  55. 2b48ab9 With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction. by Evan Cheng · 15 years ago
  56. 850f791 Fill in some holes in ScalarEvolution's loop iteration condition by Dan Gohman · 15 years ago
  57. ebfe2b2 Make xfail proper by Anton Korobeynikov · 15 years ago
  58. c975180 Temporary disable 16 bit bswap by Anton Korobeynikov · 15 years ago
  59. 6ff3f2c Add bswap patterns by Anton Korobeynikov · 15 years ago
  60. 54681ec Fix logic inversion for RI-mode address selection by Anton Korobeynikov · 15 years ago
  61. 9419a0d Unbreak the test by Anton Korobeynikov · 15 years ago
  62. bb8a048 Expand 32-bit bitconverts via memory by Anton Korobeynikov · 15 years ago
  63. f2fd8ea Fix incomin arg stack frame offset in case we need to generate stack frame by Anton Korobeynikov · 15 years ago
  64. 5dd38de Revert the commit, it just hides the real bug by Anton Korobeynikov · 15 years ago
  65. 75eef89 Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects by Anton Korobeynikov · 15 years ago
  66. 8bd0db7 Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems by Anton Korobeynikov · 15 years ago
  67. 6fe326c Implement 'large' PIC model by Anton Korobeynikov · 15 years ago
  68. 48e8b3c Implement shifts properly (hopefilly - finally!) by Anton Korobeynikov · 15 years ago
  69. 0a42d2b Properly handle divides. As a bonus - implement memory versions of them. by Anton Korobeynikov · 15 years ago
  70. 014d463 32 bit shifts have only 12 bit displacements by Anton Korobeynikov · 15 years ago
  71. 1ed1e3e Consolidate reg-imm / reg-reg-imm address mode selection logic in one place. by Anton Korobeynikov · 15 years ago
  72. 720e3b0 Add support for 12 bit displacements by Anton Korobeynikov · 15 years ago
  73. 980d550 Emit proper lowering of load from arg stack slot by Anton Korobeynikov · 15 years ago
  74. c772c44 Implement dynamic allocas by Anton Korobeynikov · 15 years ago
  75. c16cdc5 Add jump tables by Anton Korobeynikov · 15 years ago
  76. 759205d Add rotates by Anton Korobeynikov · 15 years ago
  77. cfca8b1 Add patterns for integer negate by Anton Korobeynikov · 15 years ago
  78. 8c993e1 Provide proper patterns for and with imm instructions. Tune the tests accordingly. by Anton Korobeynikov · 15 years ago
  79. 25af733 Add 32 bit and reg-imm and disable invalid patterns for now by Anton Korobeynikov · 15 years ago
  80. 747052c Add z9 and z10 target processors. Mark z10-only instructions as such. by Anton Korobeynikov · 15 years ago
  81. 22836d1 Proper lower 'small' results by Anton Korobeynikov · 15 years ago
  82. eb68f1c Completel forgot about unconditional branches by Anton Korobeynikov · 15 years ago
  83. bad769f Lower addresses of globals by Anton Korobeynikov · 15 years ago
  84. ed1a6d4 Test (incomplete) for easy muls by Anton Korobeynikov · 15 years ago
  85. 8d1837d Provide "wide" muls and divs/rems by Anton Korobeynikov · 15 years ago
  86. ecf22d5 Tests for cmp / br_cc / select_cc by Anton Korobeynikov · 15 years ago
  87. ef5deca Emit callee-saved regs spills / restores by Anton Korobeynikov · 15 years ago
  88. ba249e4 Some preliminary call lowering by Anton Korobeynikov · 15 years ago
  89. 3c98c61 Prologue / epilogue emission by Anton Korobeynikov · 15 years ago
  90. 51f613f Add simple frame index elimination by Anton Korobeynikov · 15 years ago
  91. 81c0325 Provide proper test :) by Anton Korobeynikov · 15 years ago
  92. 711d5b6 Add address computation stuff by Anton Korobeynikov · 15 years ago
  93. c8301d1 Add mem-imm stores by Anton Korobeynikov · 15 years ago
  94. 961bb6f Add stores and truncstores by Anton Korobeynikov · 15 years ago
  95. dc28955 Add patterns for various extloads by Anton Korobeynikov · 15 years ago
  96. 9e4816e Add shifts and reg-imm address matching by Anton Korobeynikov · 15 years ago
  97. a51752c Add bunch of 32-bit patterns... Uffff :) by Anton Korobeynikov · 15 years ago
  98. 3f2122b Add tests for fixes I committed earlier to the C++ FE. by Rafael Espindola · 15 years ago
  99. da308c9 Add bunch of reg-imm movs by Anton Korobeynikov · 15 years ago
  100. 89edcd0 Provide masked reg-imm 'or' and 'and' by Anton Korobeynikov · 15 years ago