1. 0bc25f4 Convert EXTRACT_SUBREG to COPY when emitting machine instrs. by Jakob Stoklund Olesen · 15 years ago
  2. 5c00e07 Remove references to INSERT_SUBREG after de-SSA. by Jakob Stoklund Olesen · 15 years ago
  3. 2dac4c1 Use std::vector rather than SmallVector here because SmallVector by Duncan Sands · 15 years ago
  4. cde5110 Merge the duplicated iabs optimization in DAGCombiner and let it detected a few more idioms. by Benjamin Kramer · 15 years ago
  5. a0994b1 Do not use std::stack because it causes obscure failures when by Duncan Sands · 15 years ago
  6. 1db071f Teach instcombine to transform by Benjamin Kramer · 15 years ago
  7. 67f8a7b Tweak some docs now that the default build is called Debug+Asserts. by Duncan Sands · 15 years ago
  8. fb31ccb A slight reworking of the custom patterns for x86-64 tpoff codegen and by Eric Christopher · 15 years ago
  9. 4ff7ab6 r107852 is only safe with -enable-unsafe-fp-math to account for +0.0 == -0.0. by Evan Cheng · 15 years ago
  10. 3651d92 Add TargetInstrInfo::copyPhysReg hook and use it from LowerSubregs. by Jakob Stoklund Olesen · 15 years ago
  11. 515fe3a Optimize some vfp comparisons to integer ones. This patch implements the simplest case when the following conditions are met: by Evan Cheng · 15 years ago
  12. 7835f1f Changes to ARM tail calls, mostly cosmetic. by Dale Johannesen · 15 years ago
  13. f595141 Revert 107840 107839 107813 107804 107800 107797 107791. by Dan Gohman · 15 years ago
  14. d9642fa When processing frame index virtual registers, consider all available registers by Jim Grosbach · 15 years ago
  15. 0238f8c Fix the second half of PR7437: scalarrepl wasn't preserving by Chris Lattner · 15 years ago
  16. 49dcb0f Don't forward-declare registers for static allocas, which we'll by Dan Gohman · 15 years ago
  17. 61b7cea Fix -fast-isel-abort to check the right instruction. by Dan Gohman · 15 years ago
  18. 8fff126 use PrintEscapedString to handle attribute section with escapes in it, by Chris Lattner · 15 years ago
  19. 5febd07 fix copies to/from GR8_ABCD_H even more by Jakob Stoklund Olesen · 15 years ago
  20. 03e2d44 grammar by Jim Grosbach · 15 years ago
  21. c7937ae Handle cases where the post-RA scheduler may move instructions between the by Jim Grosbach · 15 years ago
  22. da3051a finish up support for callw: PR7195 by Chris Lattner · 15 years ago
  23. 9fc0522 Implement the major chunk of PR7195: support for 'callw' by Chris Lattner · 15 years ago
  24. cc69e13 Add more assembly opcodes for SSE compare instructions by Bruno Cardoso Lopes · 15 years ago
  25. 8aa6147 One MDNode may be used to create regular DIE as well as abstract DIE. by Devang Patel · 15 years ago
  26. bcc8017 Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake. by Evan Cheng · 15 years ago
  27. 03753fc Print undefined/unknown debug value as "undef". by Devang Patel · 15 years ago
  28. 5c48043 Not all custom inserters create new basic blocks. If the inserter by Dan Gohman · 15 years ago
  29. 26b8ef5 grammar and trailing whitespace by Jim Grosbach · 15 years ago
  30. 869aa46 Rename couple of maps. by Devang Patel · 15 years ago
  31. f2e4afd Allow copies between GR8_ABCD_L and GR8_ABCD_H. by Jakob Stoklund Olesen · 15 years ago
  32. 8947282 Update the docs for debugging JITed code with GDB. by Reid Kleckner · 15 years ago
  33. 6140962 80 cols. by Devang Patel · 15 years ago
  34. 4df83ed Implement bottom-up fast-isel. This has the advantage of not requiring by Dan Gohman · 15 years ago
  35. f423a69 Add X86FastISel support for return statements. This entails refactoring by Dan Gohman · 15 years ago
  36. ced9ec9 Add AVX AES instructions by Bruno Cardoso Lopes · 15 years ago
  37. 5fc3da0 Update the insert position after scheduling, which may change the by Dan Gohman · 15 years ago
  38. cc87bfb Update comment. by Devang Patel · 15 years ago
  39. 643fffe Fix debugging strings. by Dan Gohman · 15 years ago
  40. 2b48c33 Issue the warning about being slow whenever optimization is disabled, by Duncan Sands · 15 years ago
  41. eabaed2 Give FunctionLoweringInfo an MBB member, avoiding the need to pass it by Dan Gohman · 15 years ago
  42. a4160c3 Simplify FastISel's constructor by giving it a FunctionLoweringInfo by Dan Gohman · 15 years ago
  43. 4c3fd9f Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This will by Dan Gohman · 15 years ago
  44. c940365 Split the SDValue out of OutputArg so that SelectionDAG-independent by Dan Gohman · 15 years ago
  45. 29269d0 add some triple for minix, patch by Kees van Reeuwijk from PR7582 by Chris Lattner · 15 years ago
  46. ce51720 Move ArgFlagsTy, OutputArg, and InputArg out of SelectionDAGNodes.h and by Dan Gohman · 15 years ago
  47. 2f2b0ab Move CallingConvLower.cpp out of the SelectionDAG directory. by Dan Gohman · 15 years ago
  48. fcb4ccd Fix more places assuming subregisters have live intervals by Jakob Stoklund Olesen · 15 years ago
  49. e3c5502 adapt condition for changed default build mode by Gabor Greif · 15 years ago
  50. d463a74 Add a getFirstNonPHI utility function. by Dan Gohman · 15 years ago
  51. b8c86a0 Minore code simplification. by Dan Gohman · 15 years ago
  52. 9e86f43 Remove interprocedural-basic-aa and associated code. The AliasAnalysis by Dan Gohman · 15 years ago
  53. 46151f1 Add Debug+Asserts and Release+Asserts to svn:ignore properties. by Dan Gohman · 15 years ago
  54. 6418cb3 typo in comment, regeneration not necessary by Gabor Greif · 15 years ago
  55. 274fefd conditionalize by CallInst::ArgOffset by Gabor Greif · 15 years ago
  56. 392a886 conditionalize on CallInst::ArgOffset by Gabor Greif · 15 years ago
  57. dc4f391 minor cosmetic changes that happened to sit in my tree by Gabor Greif · 15 years ago
  58. 8246adc Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts" by Duncan Sands · 15 years ago
  59. 4f6bdf9 Add AVX SSE4.2 instructions by Bruno Cardoso Lopes · 15 years ago
  60. 332fce4 Use only one multiclass to pinsrq instructions by Bruno Cardoso Lopes · 15 years ago
  61. 5e9fa98 Now that almost all SSE4.1 AVX instructions are added, move code around to more appropriate sections. No functionality changes by Bruno Cardoso Lopes · 15 years ago
  62. 09df2ae Add AVX SSE4.1 insertps, ptest and movntdqa instructions by Bruno Cardoso Lopes · 15 years ago
  63. 3c14822 Add AVX SSE4.1 extractps and pinsr instructions by Bruno Cardoso Lopes · 15 years ago
  64. 4b76ffc Revert "Remove references to INSERT_SUBREG after de-SSA" r107725. by Jakob Stoklund Olesen · 15 years ago
  65. 78dfbc3 Also use REG_SEQUENCE for VTBX instructions. by Bob Wilson · 15 years ago
  66. e97f968 Mark eh.sjlj.set/longjmp custom lowerings as Darwin-only since that's where by Jim Grosbach · 15 years ago
  67. 4fd32db Add AVX SSE4.1 Extract Integer instructions by Bruno Cardoso Lopes · 15 years ago
  68. c66e150b By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing rather by Jim Grosbach · 15 years ago
  69. d3b376b Remove references to INSERT_SUBREG after de-SSA by Jakob Stoklund Olesen · 15 years ago
  70. d491d6e Use REG_SEQUENCE nodes to make the table registers for VTBL instructions be by Bob Wilson · 15 years ago
  71. e2b448c Accept RIP-relative symbols with 'i' constraint, and by Dale Johannesen · 15 years ago
  72. ed2185e Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass. by Jakob Stoklund Olesen · 15 years ago
  73. fca3a25 Track defs for all aliases in NEONMoveFix. by Jakob Stoklund Olesen · 15 years ago
  74. ee94e82 Add the rest of AVX SSE4.1 packed move with sign/zero extend instructions by Bruno Cardoso Lopes · 15 years ago
  75. e6fd5ad Make test not hang waiting for input. by Dale Johannesen · 15 years ago
  76. 36869b6 Add part of AVX SSE4.1 packed move with sign/zero extend instructions by Bruno Cardoso Lopes · 15 years ago
  77. 0106680 Fix comment from previous patch by Bruno Cardoso Lopes · 15 years ago
  78. 07de406 Add AVX vblendvpd, vblendvps and vpblendvb instructions by Bruno Cardoso Lopes · 15 years ago
  79. c9af33c CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext. by Dan Gohman · 15 years ago
  80. 0d881da Propagate debug loc. by Devang Patel · 15 years ago
  81. f967ca0 Represent NEON load/store alignments in bytes, not bits. by Bob Wilson · 15 years ago
  82. 5ee9992 One more case assuming that subregs have live ranges. by Jakob Stoklund Olesen · 15 years ago
  83. 191d4ee Closing tags start with slashes. by John McCall · 15 years ago
  84. 813eedd Fix buildbot breakage where a def is missing. by Jakob Stoklund Olesen · 15 years ago
  85. 6db2389 Add fixme. by Devang Patel · 15 years ago
  86. 211244a minor typo by Chris Lattner · 15 years ago
  87. 9c2e7ca Be more forgiving when calculating alias interference for physreg coalescing. by Jakob Stoklund Olesen · 15 years ago
  88. 14152b4 Reapply r107655 with fixes; insert the pseudo instruction into by Dan Gohman · 15 years ago
  89. 004c82a Add X86_64 ELF relocation values and ELF64 relocation classes. by Matt Fleming · 15 years ago
  90. e07cc5d Add some more ELF OSABI values as found in the System V Application by Matt Fleming · 15 years ago
  91. 894339e Fix to 80-col. by Eric Christopher · 15 years ago
  92. b271d86 Provide IRBuilder conveniences for creating integer constants at common widths, by John McCall · 15 years ago
  93. 76ec37a Alphabetize the list of function parameters. by Nick Lewycky · 15 years ago
  94. be35be6 Fix PR7545 crash. by Devang Patel · 15 years ago
  95. 5ed9eee Provide an abstraction to save and restore the current insertion point of by John McCall · 15 years ago
  96. a5e82a5 Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversion by Rafael Espindola · 15 years ago
  97. f8bd392 tighten up this code. by Chris Lattner · 15 years ago
  98. 5c60386 Bring the list of passes and their descriptions up to date. by Duncan Sands · 15 years ago
  99. 258c58c Revert r107655. by Dan Gohman · 15 years ago
  100. e9e1215 second round of low-level interface squeeze-out: by Gabor Greif · 15 years ago