Gitiles
Code Review Sign In
gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 1051934164cbe4b62117269e2c4ad9b1a64acb8f / test / MC
  1. 3ee0673 [SystemZ] Allow 8-bit operands to RISBG by Richard Sandiford · 11 years ago
  2. f5b1c50 Put ELF COMDAT relocations into the relevant COMDAT group. by Tim Northover · 11 years ago
  3. faf9890 Reverting commit r185999 due to buildboot failure. by Vladimir Medic · 11 years ago
  4. 2ec5933 Add support for Mips break and syscall insructions. The corresponding test cases are added. by Vladimir Medic · 11 years ago
  5. 7a34599 by Ulrich Weigand · 11 years ago
  6. 12f45c3 Add MC assembly/disassembly support for VRINT{A, N, P, M} to V8FP. by Joey Gouly · 11 years ago
  7. 8dc741d Add MC assembly/disassembly support for VRINT{Z, X, R} to V8FP. by Joey Gouly · 11 years ago
  8. b2713e0 by Ulrich Weigand · 11 years ago
  9. 9fb5a65 Add MC assembly/disassembly support for VCVT{A, N, P, M} to V8FP. by Joey Gouly · 11 years ago
  10. ff16df7 by Ulrich Weigand · 11 years ago
  11. 01e4509 CEHCK->CHECK typo fix. by Eric Christopher · 11 years ago
  12. 193a2da Fix up whitespace. by Eric Christopher · 11 years ago
  13. 19d2b78 by Ulrich Weigand · 11 years ago
  14. 9e5bbea by Ulrich Weigand · 11 years ago
  15. 5310cdb Revert: Fix wrong code offset for unwind code SET_FPREG. by Kai Nacke · 11 years ago
  16. 9611873 Revert: Generate IMAGE_REL_AMD64_ADDR32NB relocations for SEH data structures. by Kai Nacke · 11 years ago
  17. 9c411e6 Revert: Fix alignment of unwind data. by Kai Nacke · 11 years ago
  18. 2a96832 Add MC support for the v8fp instructions: vmaxnm and vminnm. by Joey Gouly · 11 years ago
  19. 59c5c6c Fix alignment of unwind data. by Kai Nacke · 11 years ago
  20. eececbc Generate IMAGE_REL_AMD64_ADDR32NB relocations for SEH data structures. by Kai Nacke · 11 years ago
  21. ea434e4 Fix wrong code offset for unwind code SET_FPREG. by Kai Nacke · 11 years ago
  22. 8064628 MC: Implement COFF .linkonce directive by Nico Rieck · 11 years ago
  23. 457571e by Ulrich Weigand · 11 years ago
  24. 3d44273 by Ulrich Weigand · 11 years ago
  25. 23a72c8 by Ulrich Weigand · 11 years ago
  26. a6d343a MC: Add .section directive to COFF by Nico Rieck · 11 years ago
  27. 972befb by Ulrich Weigand · 11 years ago
  28. 449f64c Add 'not' in front of a command that is expected to fail. by Rafael Espindola · 11 years ago
  29. 4ea2505 Add support for MC assembling and disassembling of vsel{ge, gt, eq, vs} instructions. by Joey Gouly · 11 years ago
  30. 3c99602 by Ulrich Weigand · 11 years ago
  31. 5606fca by Ulrich Weigand · 11 years ago
  32. 929d9ef Add a V8FP instruction 'vcvt{b,t}' to convert between half and double precision. by Joey Gouly · 11 years ago
  33. 79c163d ARM: Prevent ARMAsmParser::shouldOmitCCOutOperand() from misidentifying certain Thumb2 add immediate T3 encodings. by Tilmann Scheller · 11 years ago
  34. 51f558c by Ulrich Weigand · 11 years ago
  35. 33efedc by Ulrich Weigand · 11 years ago
  36. 73477b9 Prefix failing commands with not to make clear they are expected to fail. by Rafael Espindola · 11 years ago
  37. 44175d9 by Ulrich Weigand · 11 years ago
  38. b81b477 This corrects the implementation of Thumb ADR instruction. There are three issues: by Mihai Popa · 11 years ago
  39. 25b9bba by Ulrich Weigand · 11 years ago
  40. 9188443 [SystemZ] Add the MVC instruction by Richard Sandiford · 11 years ago
  41. 0a39e26 Fix ARM EHABI compact model 1 and 2 without handlerdata. by Logan Chien · 11 years ago
  42. 75dd57a Cleanup PPC Altivec registers in CSR lists and improve VRSAVE handling by Hal Finkel · 11 years ago
  43. 228e0af by Ulrich Weigand · 11 years ago
  44. 1307d83 by Ulrich Weigand · 11 years ago
  45. e29e2af [ARMAsmParser] Sort the ARM register lists based on the encoding value, not the by Chad Rosier · 11 years ago
  46. 3bd2b92 by Ulrich Weigand · 11 years ago
  47. db8e0bb [mips] Increase the number of floating point control registers available to 32. by Akira Hatanaka · 11 years ago
  48. 222e781 by Ulrich Weigand · 11 years ago
  49. 62c1baf by Ulrich Weigand · 11 years ago
  50. c0a6b98 by Ulrich Weigand · 11 years ago
  51. 4c1d023 by Ulrich Weigand · 11 years ago
  52. af679a2 by Ulrich Weigand · 11 years ago
  53. f04f8b4 Added the test missed from r185080. by Serge Pavlov · 11 years ago
  54. a744d41 ARM: Fix pseudo-instructions for SRS (Store Return State). by Tilmann Scheller · 11 years ago
  55. c084c09 Integrate Assembler: Support X86_64_DTPOFF64 relocations by David Blaikie · 11 years ago
  56. b7110cf Improve the compression of the tablegen DiffLists by introducing a new sort by Chad Rosier · 11 years ago
  57. 096c0a0 [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg by Chad Rosier · 11 years ago
  58. 842cfc9 [mips] Do not emit ".option pic0" if target is mips64. by Akira Hatanaka · 11 years ago
  59. c19bd32 ARM: fix more cases where predication may or may not be allowed by Tim Northover · 11 years ago
  60. c1a91dd ARM: allow predicated barriers in Thumb mode by Tim Northover · 11 years ago
  61. 8950dd1 by Ulrich Weigand · 11 years ago
  62. 0b85942 by Ulrich Weigand · 11 years ago
  63. 6e0857e ARM: operands should be explicit when disassembled by Amaury de la Vieuville · 11 years ago
  64. 5de735a by Ulrich Weigand · 11 years ago
  65. 1bc147c by Ulrich Weigand · 11 years ago
  66. 816c06f by Ulrich Weigand · 11 years ago
  67. 9c52f81 by Ulrich Weigand · 11 years ago
  68. 96fb3a2 by Ulrich Weigand · 11 years ago
  69. 329d413 by Ulrich Weigand · 11 years ago
  70. 2e8bd89 by Ulrich Weigand · 11 years ago
  71. 48473a8 by Ulrich Weigand · 11 years ago
  72. e5a30f0 by Ulrich Weigand · 11 years ago
  73. 9679c47 by Ulrich Weigand · 11 years ago
  74. 9068d53 by Ulrich Weigand · 11 years ago
  75. 813942a by Ulrich Weigand · 11 years ago
  76. 7e66f5c by Ulrich Weigand · 11 years ago
  77. ebc3938 ARM: check predicate bits for thumb instructions by Amaury de la Vieuville · 11 years ago
  78. 07c3e15 ARM: rGPR is meant to be unpredictable, not undefined by Amaury de la Vieuville · 11 years ago
  79. 4ee7239 ARM: fix thumb1 nop decoding by Amaury de la Vieuville · 11 years ago
  80. ff08da1 ARM: fix IT decoding by Amaury de la Vieuville · 11 years ago
  81. 0c9f0c0 ARM: enable decoding of pc-relative PLD/PLI by Amaury de la Vieuville · 11 years ago
  82. 7130a95 AArch64: fix overzealous NEXTing for Windows testing. by Tim Northover · 11 years ago
  83. 84569698 by Ulrich Weigand · 11 years ago
  84. cab0a19 by Ulrich Weigand · 11 years ago
  85. f7c1ee7 by Ulrich Weigand · 11 years ago
  86. f8f87dc by Ulrich Weigand · 11 years ago
  87. d284957 by Ulrich Weigand · 11 years ago
  88. 46d7de7 Update the X86 disassembler to use xacquire and xrelease when appropriate. by Kevin Enderby · 11 years ago
  89. 4cbbbf4 This reverts r155000. by Joey Gouly · 11 years ago
  90. 151ad37 by Ulrich Weigand · 11 years ago
  91. 027e944 by Ulrich Weigand · 11 years ago
  92. 0db5379 by Ulrich Weigand · 11 years ago
  93. 7231625 Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU registers. by Vladimir Medic · 11 years ago
  94. 4df4bcc by Ulrich Weigand · 11 years ago
  95. a95e309 ARM: Add optional datatype suffix to NEON mvn asm syntax. by Jim Grosbach · 11 years ago
  96. bf811d6 Change the arm assembler to support this from the v7c spec: by Kevin Enderby · 11 years ago
  97. 571dd98 Mips ELF: Mark object file as ABI compliant by Jack Carter · 11 years ago
  98. 23306de Add support for encoding the HLE XACQUIRE and XRELEASE prefixes. by Stefanus Du Toit · 11 years ago
  99. beb920f ARM: fix literal load with positive offset encoding by Amaury de la Vieuville · 11 years ago
  100. f8b60d6 ARM: add operands pre-writeback variants when needed by Amaury de la Vieuville · 11 years ago