1. 3ad5e5c add shifts to addressing mode 1 by Rafael Espindola · 19 years ago
  2. 7cca7c5 partial implementation of the ARM Addressing Mode 1 by Rafael Espindola · 19 years ago
  3. 46adf81 change the addressing mode of the str instruction to reg+imm by Rafael Espindola · 19 years ago
  4. aefe142 create the raddr addressing mode that matches any register and the frame index by Rafael Espindola · 19 years ago
  5. 49e4415 handle the "mov reg1, reg2" case in isMoveInstr by Rafael Espindola · 19 years ago
  6. 4b442b5 implement minimal versions of by Rafael Espindola · 19 years ago
  7. 7bc59bc added a skeleton of the ARM backend by Rafael Espindola · 19 years ago