- 133decd Update scheduling info for vrsave instruction by Nate Begeman · 19 years ago
- a08610c Fix an off by one error that caused PPC LLC failures last night. by Chris Lattner · 19 years ago
- 9c543b2 PPC LSR pass should use target lowering hooks. by Evan Cheng · 19 years ago
- c4c6257 Added getTargetLowering() to TargetMachine. Refactored targets to support this. by Evan Cheng · 19 years ago
- 1877ec9 For functions that use vector registers, save VRSAVE, mark used by Chris Lattner · 19 years ago
- 64ce964 Fix a couple of bugs that broke the alpha tester build by Chris Lattner · 19 years ago
- 3faad49 Handle cracked instructions in dispatch group formation. by Chris Lattner · 19 years ago
- fd97734 Mark instructions that are cracked by the PPC970 decoder as such. by Chris Lattner · 19 years ago
- 88d211f Several big changes: by Chris Lattner · 19 years ago
- 9c2c386 blr is a branch too by Chris Lattner · 19 years ago
- e928a72 teach the JIT to encode vector registers by Chris Lattner · 19 years ago
- b0d21ef Change the interface for getting a target HazardRecognizer to be more clean. by Chris Lattner · 19 years ago
- 49f398b add a note by Chris Lattner · 19 years ago
- 7809811 Use "llvm.metadata" section for debug globals. Filter out these globals in the by Jim Laskey · 19 years ago
- b84225b add another missing store. by Chris Lattner · 19 years ago
- ab5801c add a couple more load/store instrs, add a newline to the end of file. by Chris Lattner · 19 years ago
- 3acbe5d This kinda sorta implements "things that have to lead a dispatch group". by Nate Begeman · 19 years ago
- 2046371 add some new instructions to the classifier. With this, we correctly insert by Chris Lattner · 19 years ago
- 7ce6485 add some comments that describe what we model by Chris Lattner · 19 years ago
- c664418 Implement a very very simple hazard recognizer for LSU rejects and ctr set/read by Chris Lattner · 19 years ago
- 5a63c47 add a note by Chris Lattner · 19 years ago
- bbf1c72 implement TII::insertNoop by Chris Lattner · 19 years ago
- 9601a86 Copysign needs to be expanded everywhere. Note that Alpha and IA64 should by Chris Lattner · 19 years ago
- 0f6ab6f Implement CodeGen/PowerPC/or-addressing-mode.ll, which is also PR668. by Chris Lattner · 19 years ago
- 00d18f0 add a note by Chris Lattner · 19 years ago
- 5126984 Compile this: by Chris Lattner · 19 years ago
- 8c13d0a Use a target-specific dag-combine to implement CodeGen/PowerPC/fp-int-fp.ll. by Chris Lattner · 19 years ago
- d30bf01 Vector op lowering. by Evan Cheng · 19 years ago
- bf751e2 Add a subtarget feature for the stfiwx instruction. I know the G5 has it, by Chris Lattner · 19 years ago
- f4c8575 remove implemented item by Chris Lattner · 19 years ago
- 6e53ceb readme updates by Nate Begeman · 19 years ago
- 2c003e2 Add memory printing support for PPC. Input memory operands now work with by Chris Lattner · 19 years ago
- e5d8861 Implement selection of inline asm memory operands by Chris Lattner · 19 years ago
- d0839f3 PPC JIT relocation model should be DynamicNoPIC. by Evan Cheng · 19 years ago
- e3f0157 Implement the PPC inline asm "L" modifier. This allows us to compile: by Chris Lattner · 19 years ago
- 4c1aa86 - Added option -relocation-model to set relocation model. Valid values include static, pic, by Evan Cheng · 19 years ago
- 0420f2a Coordinate activities with llvm-gcc4 and dwarf. by Jim Laskey · 19 years ago
- 1efa40f split register class handling from explicit physreg handling. by Chris Lattner · 19 years ago
- 4217ca8dc Updates to match change of getRegForInlineAsmConstraint prototype by Chris Lattner · 19 years ago
- d2ee218 Moved PICEnabled to include/llvm/Target/TargetOptions.h by Evan Cheng · 19 years ago
- 551bf3f kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC by Nate Begeman · 19 years ago
- 298ebf2 If the false case is the current basic block, then this is a self loop. by Evan Cheng · 19 years ago
- 0d7db6f If we have zero initialized data with external linkage, use .zerofill to by Chris Lattner · 20 years ago
- 33d5082 Make sure that weak functions are aligned properly by Chris Lattner · 20 years ago
- 45b3976 Switch to using getCALLSEQ_START instead of using our own creation calls by Chris Lattner · 20 years ago
- 789fd42 Add missing patterns for andi. and andis., fixing test/Regression/CodeGen/ by Nate Begeman · 20 years ago
- 7e9b26f Match getTargetNode() changes (now return SDNode* instead of SDOperand). by Evan Cheng · 20 years ago
- 3416721 Change Select() from by Evan Cheng · 20 years ago
- 418caa1 Darwin doesn't support #APP/#NO_APP by Chris Lattner · 20 years ago
- 6f4a072 Rename BSel -> PPCBSel for the benefit of doxygen users. by Chris Lattner · 20 years ago
- 4d73a5a Emit the 'mr' pseudoop for easier reading. by Chris Lattner · 20 years ago
- 8d3f490 Move emails from nate into public places by Chris Lattner · 20 years ago
- ad3bc8d Implement getConstraintType for PPC. by Chris Lattner · 20 years ago
- 763317d Add the simple PPC integer constraints by Chris Lattner · 20 years ago
- 815ef5b Change prototype by Chris Lattner · 20 years ago
- 984cb37 We seem to have settled to __DWARF for section name. by Jim Laskey · 20 years ago
- 7564e0b Complex pattern isel code shouldn't select nodes. by Evan Cheng · 20 years ago
- ba2f0a9 Use SelectRoot() as entry of any tblgen based isel. by Evan Cheng · 20 years ago
- 2138453 add a note by Chris Lattner · 20 years ago
- 7d8d5a5 Use the asmprinter to find out what the preferred alignment of a global is. by Chris Lattner · 20 years ago
- a6973c3 Remove some stuff that now works by Nate Begeman · 20 years ago
- 1541bc3 add a note by Chris Lattner · 20 years ago
- 33c1dab remove some target-indep and implemented notes by Chris Lattner · 20 years ago
- a63fee8 Flesh out a couple of the items in the README by Nate Begeman · 20 years ago
- d463f7f Add a note by Chris Lattner · 20 years ago
- 39b248b update a note by Chris Lattner · 20 years ago
- 3b478b3 add 64b gpr store to the possible list of isStoreToStackSlot opcodes. by Nate Begeman · 20 years ago
- 6524287 implement isStoreToStackSlot for PPC by Chris Lattner · 20 years ago
- 4083960 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) by Chris Lattner · 20 years ago
- 275b884 new example by Chris Lattner · 20 years ago
- 93c740b Update the README by Nate Begeman · 20 years ago
- 5887327 add a method by Chris Lattner · 20 years ago
- 5a7efc9 add a note by Chris Lattner · 20 years ago
- 750ac1b Fix some of the stuff in the PPC README file, and clean up legalization by Nate Begeman · 20 years ago
- 0ddc180 another testcase. by Chris Lattner · 20 years ago
- b8973bd Allow the specification of explicit alignments for constant pool entries. by Evan Cheng · 20 years ago
- ddc787d add info about the inline asm register constraints for PPC by Chris Lattner · 20 years ago
- 4477590 Codegen by Nate Begeman · 20 years ago
- 83e64ba example nate pointed out by Chris Lattner · 20 years ago
- 56b6964 add the 'lucas' optimization by Chris Lattner · 20 years ago
- 37dd6f1 Functions that are lazily streamed in from the .bc file are *not* external. by Chris Lattner · 20 years ago
- d9b55dd Now that OpActions is big enough, we can specify actions for vector types by Chris Lattner · 20 years ago
- 3fd327f disable this for now by Chris Lattner · 20 years ago
- ec4a0c7 Request expansion of ConstantVec nodes. by Chris Lattner · 20 years ago
- a54aa94 Targets all now request ConstantFP to be legalized into TargetConstantFP. by Chris Lattner · 20 years ago
- e00ebf0 Fix a bug in my elimination of ISD::CALL this morning. PPC now has to by Chris Lattner · 20 years ago
- 9690979 add a note about how we should implement this FIXME from the legalizer: by Chris Lattner · 20 years ago
- eb20ed6 Add a couple more things to the readme. by Nate Begeman · 20 years ago
- 281b55e Use PPCISD::CALL instead of ISD::CALL by Chris Lattner · 20 years ago
- bba534d Make llvm.frame/returnaddr not crash on ppc by Chris Lattner · 20 years ago
- ee62557 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for by Nate Begeman · 20 years ago
- 19c9550 Subtarget feature can now set any variable to any value by Evan Cheng · 20 years ago
- cedc6f4 PHI and INLINEASM are now built-in instructions provided by Target.td by Chris Lattner · 20 years ago
- b3e789a Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals. by Jim Laskey · 20 years ago
- 0577a22 Set SchedulingForLatency to be the default scheduling preference for all. by Evan Cheng · 20 years ago
- acc398c First part of bug 680: by Nate Begeman · 20 years ago
- 7558b0e Default scheduling preference is SchedulingForLatency. by Evan Cheng · 20 years ago
- 52060a0 Crude Dwarf global variable debugging. by Jim Laskey · 20 years ago
- 2c2c6c6 Add explicit #includes of <iostream> by Chris Lattner · 20 years ago
- 86a5484 Add explicit #includes of <iostream> by Chris Lattner · 20 years ago