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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 15217e63bce6c161b355b63d6496c7c327d15817 / lib / Target / X86 / X86InstrInfo.h
  1. 15217e6 Remove isProfitableToDuplicateIndirectBranch target hook. It is profitable by Bob Wilson · 15 years ago
  2. 4a66e5b Based on the testcase for pr3120, running on my MacPro with Xeon processors, by Bob Wilson · 15 years ago
  3. d57cdd5 - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo. by Evan Cheng · 15 years ago
  4. dda3978 by David Greene · 15 years ago
  5. b87bc95 by David Greene · 15 years ago
  6. 0115e16 Fix MachineLICM to use the correct virtual register class when by Dan Gohman · 15 years ago
  7. 3731bc0 Replace X86's CanRematLoadWithDispOperand by calling the target-independent by Dan Gohman · 15 years ago
  8. 91e69c3 Add basic infrastructure and x86 support for preserving MachineMemOperand by Dan Gohman · 15 years ago
  9. e33f44c Replace TargetInstrInfo::isInvariantLoad and its target-specific by Dan Gohman · 15 years ago
  10. 01a76ce Remove explicit enum integer values. They don't appear to be needed, and by Dan Gohman · 15 years ago
  11. 9cef48e It's not legal to fold a load from a narrower stack slot into a wider instruction. If done, the instruction does a 64-bit load and that's not by Evan Cheng · 15 years ago
  12. 63476a8 Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172. by Evan Cheng · 15 years ago
  13. b4dc13c Add crc32 instruction and intrinsics. Add a new class of prefix by Eric Christopher · 15 years ago
  14. 3784453 Let callers decide the sub-register index on the def operand of rematerialized instructions. by Evan Cheng · 15 years ago
  15. f9b36f0 Move load / store folding alignment require into the table(s). by Evan Cheng · 15 years ago
  16. 19a2011 Undo my brain cramp. by Evan Cheng · 15 years ago
  17. 49ddb61 CMOVxx doesn't swap operands which it's commuted. by Evan Cheng · 15 years ago
  18. 7478ab8 add a predicate to determine if a global var reference requires a by Chris Lattner · 15 years ago
  19. 3b6b36d change isGlobalStubReference to take target flags instead of a MachineOperand. by Chris Lattner · 15 years ago
  20. 281bada add a new predicate method that says whether a GlobalValue by Chris Lattner · 15 years ago
  21. 75cdf27 move reasoning about darwin $non_lazy_ptr stubs from asmprinter into isel. by Chris Lattner · 15 years ago
  22. 74e726e make isel decide whether to emit $stub's on darwin instead of asmprinter. by Chris Lattner · 15 years ago
  23. 4aa21aa move handling of dllimport linkage in isel, not in asmprinter. by Chris Lattner · 15 years ago
  24. b903bed Move all the TLS processing logic into isel, don't do it in asmprinter at all. by Chris Lattner · 15 years ago
  25. 55e7c82 start adding logic in isel to determine asm printer semantics, step N of M. by Chris Lattner · 15 years ago
  26. ac5e887 Use target-specific machine operand flags to eliminate a gross hack by Chris Lattner · 15 years ago
  27. 094fad3 Re-apply 68552. Tested by bootstrapping llvm-gcc and using that to build llvm. by Rafael Espindola · 15 years ago
  28. 044b534 Temporarily revert r68552. This was causing a failure in the self-hosting LLVM by Bill Wendling · 15 years ago
  29. 2a6411b Reduce code duplication on the TLS implementation. by Rafael Espindola · 15 years ago
  30. da945e3 Have only one definition of X86AddrNumOperands. by Rafael Espindola · 15 years ago
  31. dc54d31 Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty by Evan Cheng · 15 years ago
  32. 770bcc7 Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. by Evan Cheng · 15 years ago
  33. 4350eb8 Add TargetInstrInfo::isSafeToMoveRegisterClassDefs. It returns true if it's safe to move an instruction which defines a value in the register class. Replace pre-splitting specific IgnoreRegisterClassBarriers with this new hook. by Evan Cheng · 15 years ago
  34. 04ee5a1 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. by Evan Cheng · 15 years ago
  35. 653456c X86_COND_C and X86_COND_NC are alternate mnemonics for by Dan Gohman · 16 years ago
  36. d68a076 Tidy up #includes, deleting a bunch of unnecessary #includes. by Dan Gohman · 16 years ago
  37. c54baa2 Split foldMemoryOperand into public non-virtual and protected virtual by Dan Gohman · 16 years ago
  38. 3fafd93 Generate something sensible for an [SU]ADDO op when the overflow/carry flag is by Bill Wendling · 16 years ago
  39. cbad42c Add more const qualifiers. This fixes build breakage from r59540. by Dan Gohman · 16 years ago
  40. 2306628 For now, don't split live intervals around x87 stack register barriers. FpGET_ST0_80 must be right after a call instruction (and ADJCALLSTACKUP) so we need to find a way to prevent reload of x87 registers between them. by Evan Cheng · 16 years ago
  41. 279c22e Optimized FCMP_OEQ and FCMP_UNE for x86. by Dan Gohman · 16 years ago
  42. 244911b getX86RegNum has long been moved to X86RegisterInfo. by Evan Cheng · 16 years ago
  43. 8e8b8a2 Const-ify several TargetInstrInfo methods. by Dan Gohman · 16 years ago
  44. ef93cec Add ability to override segment (mostly for code emitter purposes). by Anton Korobeynikov · 16 years ago
  45. d735b80 Switch the MachineOperand accessors back to the short names like by Dan Gohman · 16 years ago
  46. 57c3dac Move the GlobalBaseReg field out of X86ISelDAGToDAG.cpp by Dan Gohman · 16 years ago
  47. 8b74696 Move the code for initializing the global base reg out of by Dan Gohman · 16 years ago
  48. 94a50da Backing out 55521. Not safe. by Evan Cheng · 16 years ago
  49. 4d46d0a Swap fp comparison operands and change predicate to allow load folding. by Evan Cheng · 16 years ago
  50. 940f83e Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested by Owen Anderson · 16 years ago
  51. 44eb65c Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API. by Owen Anderson · 16 years ago
  52. 8e5f2c6 Pool-allocation for MachineInstrs, MachineBasicBlocks, and by Dan Gohman · 16 years ago
  53. f660c17 Make LiveVariables even more optional, by making it optional in the call to TargetInstrInfo::convertToThreeAddressInstruction by Owen Anderson · 16 years ago
  54. 1c4b5ea Make intel asmprinter child of generic asmprinter, not x86 shared asm printer. This leads to some code duplication, which will be resolved later. by Anton Korobeynikov · 16 years ago
  55. 58dcb0e Add option to commuteInstruction() which forces it to create a new (commuted) instruction. by Evan Cheng · 16 years ago
  56. c9f5f3f Change target-specific classes to use more precise static types. by Dan Gohman · 16 years ago
  57. 9f8fea3 Constify the machine instruction passed into the by Bill Wendling · 16 years ago
  58. 52e724a Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented by Nicolas Geoffray · 16 years ago
  59. ca1267c Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. by Evan Cheng · 16 years ago
  60. 950a4c4 Add explicit keywords. by Dan Gohman · 16 years ago
  61. 6634e26 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. by Christopher Lamb · 16 years ago
  62. 1fab4a6 Recommitting parts of r48130. These do not appear to cause the observed failures. by Christopher Lamb · 16 years ago
  63. 4499e49 Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests. by Evan Cheng · 16 years ago
  64. 3feb017 Allow insert_subreg into implicit, target-specific values. by Christopher Lamb · 16 years ago
  65. ea7da50 Add lock prefix support to x86. Also add the instructions necessary for the atomic ops. They are still marked pseudo, since I cannot figure out what format to use, but they are the correct opcode. by Andrew Lenharth · 16 years ago
  66. 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 16 years ago
  67. 5fd79d0 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. by Evan Cheng · 16 years ago
  68. a22edc8 Simplify the side effect stuff a bit more and make licm/sinking by Chris Lattner · 17 years ago
  69. 749c6f6 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 17 years ago
  70. cc8cd0c remove MachineOpCode typedef. by Chris Lattner · 17 years ago
  71. 43dbe05 Move even more functionality from MRegisterInfo into TargetInstrInfo. by Owen Anderson · 17 years ago
  72. d94b6a1 Move some more functionality from MRegisterInfo to TargetInstrInfo. by Owen Anderson · 17 years ago
  73. 3100afa Machine LICM will check that operands are defined outside of the loop. Also by Bill Wendling · 17 years ago
  74. f6372aa Move some more instruction creation methods from RegisterInfo into InstrInfo. by Owen Anderson · 17 years ago
  75. 6410552 Fix a problem where lib/Target/TargetInstrInfo.h would include and use by Chris Lattner · 17 years ago
  76. d10fd97 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the by Owen Anderson · 17 years ago
  77. 6259d51 If we have a load of a global address that's not modified during the by Bill Wendling · 17 years ago
  78. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
  79. 627c00b Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I by Bill Wendling · 17 years ago
  80. 041b3f8 Reverting 44702. It wasn't correct to rename them. by Bill Wendling · 17 years ago
  81. 320c630 Renaming: by Bill Wendling · 17 years ago
  82. ee46574 Move getX86RegNum into X86RegisterInfo and use it by Duncan Sands · 17 years ago
  83. d45eddd Revert the earlier change that removed the M_REMATERIALIZABLE machine by Dan Gohman · 17 years ago
  84. 82a87a0 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 17 years ago
  85. 318093b Do not treat FP_REG_KILL as terminator in branch analysis (X86). by Dale Johannesen · 17 years ago
  86. c101e95 Add a target hook to allow loads from constant pools to be rematerialized, and an by Dan Gohman · 17 years ago
  87. 6ae3626 RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. by Evan Cheng · 17 years ago
  88. bb1ee05 Add support for our first SSSE3 instruction "pmulhrsw". by Bill Wendling · 17 years ago
  89. 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 17 years ago
  90. 19f2ffc - Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit by Evan Cheng · 18 years ago
  91. ba59a1e Match TargetInstrInfo changes. by Evan Cheng · 18 years ago
  92. c24ff8e add another target hook for branch folding. by Chris Lattner · 18 years ago
  93. 9cd6875 Implement support for branch condition reversal. by Chris Lattner · 18 years ago
  94. 7fbe972 Implement branch analysis/xform hooks required by the branch folding pass. by Chris Lattner · 18 years ago
  95. ae1dc40 expose DWARF_LABEL opcode# so the branch folder can update debug info properly. by Chris Lattner · 18 years ago
  96. d77ddbc remove some dead code by Chris Lattner · 18 years ago
  97. 25ab690 Committing X86-64 support. by Evan Cheng · 18 years ago
  98. aa3c141 Fix a build breaker. by Evan Cheng · 18 years ago
  99. d74ea2b Patches to make the LLVM sources more -pedantic clean. Patch provided by Chris Lattner · 18 years ago
  100. 751458d ImmMask should be 3 for a two-bit field; Compact X86II by Evan Cheng · 18 years ago