1. 15a380a simplify some code based on the fact that picstyles != none are only valid by Chris Lattner · 16 years ago
  2. 3fff30d all this logic always returns true because GOT mode is never active in x86-64 mode. by Chris Lattner · 16 years ago
  3. 88e1fd5 isPICStyleRIPRel() and friends are never true in -static mode. by Chris Lattner · 16 years ago
  4. e4df756 When in -static mode, force the PIC style to none. Doing this requires fixing by Chris Lattner · 16 years ago
  5. b133a0a merge two identical functions and simplify things that are GOT specific by Chris Lattner · 16 years ago
  6. e3ee6f1e hoist check for IsTailCall to callers. Eliminate redundant check for by Chris Lattner · 16 years ago
  7. 951bf7d change a few methods to be static functions. by Chris Lattner · 16 years ago
  8. 4aa21aa move handling of dllimport linkage in isel, not in asmprinter. by Chris Lattner · 16 years ago
  9. dac237e Implement changes from Chris's feedback. Finish converting lib/Target. by Torok Edwin · 16 years ago
  10. 804e0fe Convert more abort() calls to llvm_report_error(). by Torok Edwin · 16 years ago
  11. ab7c09b Start converting to new error handling API. by Torok Edwin · 16 years ago
  12. 76a1e2e Don't accept globals as matching 'i' constraint by Dale Johannesen · 16 years ago
  13. 6b61cd1 Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call. by Tilmann Scheller · 16 years ago
  14. b4202b8 Update comments to make it clear that the function alignment is the Log2 of the by Bill Wendling · 16 years ago
  15. 20c568f Add an "alignment" field to the MachineFunction object. It makes more sense to by Bill Wendling · 16 years ago
  16. d94c101 by David Greene · 16 years ago
  17. 9917700 Add a target-specific DAG combine on X86 to fold the common pattern of by Owen Anderson · 16 years ago
  18. 9b9838d by David Greene · 16 years ago
  19. b1acd68 pull @GOT, @GOTOFF, @GOTPCREL handling into isel from the asmprinter. by Chris Lattner · 16 years ago
  20. 18c5987 Reimplement rip-relative addressing in the X86-64 backend. The new by Chris Lattner · 16 years ago
  21. b903bed Move all the TLS processing logic into isel, don't do it in asmprinter at all. by Chris Lattner · 16 years ago
  22. 41621a2 move magic for PIC constantpool references from asmprinter to isel. by Chris Lattner · 16 years ago
  23. 55e7c82 start adding logic in isel to determine asm printer semantics, step N of M. by Chris Lattner · 16 years ago
  24. 4150c08 indentation fix by Chris Lattner · 16 years ago
  25. 6314ac2 Misc accumulated tweaks to legalization logic for various targets. by Eli Friedman · 16 years ago
  26. 2e06dd2 I got J and K backward, many thanks to Eli for spotting this! by Chris Lattner · 16 years ago
  27. e493515 implement support for the 'K' asm constraint, PR4347 by Chris Lattner · 16 years ago
  28. bbd8c33 Fix Bug 4278: X86-64 with -tailcallopt calling convention by Arnold Schwaighofer · 16 years ago
  29. b51b6cf Silence a warning by Anton Korobeynikov · 16 years ago
  30. 5d28eb9 Get rid of some unnecessary code. by Eli Friedman · 16 years ago
  31. 7a5e555 Slightly generalize the code that handles shuffles of consecutive loads by Eli Friedman · 16 years ago
  32. 30e71eb Avoid crashing on a variable-index insertelement with element type i16. by Eli Friedman · 16 years ago
  33. 1041553 Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL by Eli Friedman · 16 years ago
  34. 23ef105 PR2598: make sure to expand illegal forms of integer/floating-point by Eli Friedman · 16 years ago
  35. 578efa9 Add new function attribute - noimplicitfloat by Devang Patel · 16 years ago
  36. abc0199 Adapt the x86 build_vector dagcombine to the current state of the legalizer. by Nate Begeman · 16 years ago
  37. 6a78489 Evan thinks NoImplicitFloat check is not required here. by Devang Patel · 16 years ago
  38. 974d90b Remove unnecessary #includes. by Dan Gohman · 16 years ago
  39. 874ae25 Revert 72707 and 72709, for the moment. by Dale Johannesen · 16 years ago
  40. 4150d83 Make the implicit inputs and outputs of target-independent by Dale Johannesen · 16 years ago
  41. 51b16f4 Untabification. by Bill Wendling · 16 years ago
  42. 8b944d3 Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code. by Evan Cheng · 16 years ago
  43. ba2352b Ger rid of some dead code. by Eli Friedman · 16 years ago
  44. 36df499 Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and by Eli Friedman · 16 years ago
  45. 8220557 Back out r72431, it is causing a number of compilation crashes with clang. by Daniel Dunbar · 16 years ago
  46. ecc23a5 Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and by Eli Friedman · 16 years ago
  47. 108b519 Make the X86 backend mark EXTRACT_SUBVECTOR as Expand, at least for the moment. by Eli Friedman · 16 years ago
  48. 948e95a Make the x86 backend custom-lower UINT_TO_FP and FP_TO_UINT on 32-bit by Eli Friedman · 16 years ago
  49. 6ebf7bc Run code placement optimization for targets that want it (arm and x86 for now). by Evan Cheng · 16 years ago
  50. 4992196 Fix PR4152: asm constraint validation happens before dag combine, so we by Chris Lattner · 16 years ago
  51. ec8eee2 Fix infinite recursion in the C++ code which handles movddup by making it unnecessary. by Nate Begeman · 16 years ago
  52. 5a5ca15 Implement review feedback for vector shuffle work. by Nate Begeman · 16 years ago
  53. 9008ca6 2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan. by Nate Begeman · 16 years ago
  54. 15f1b66 Fix PR 4004 by including the call to __tls_get_addr in X86tlsaddr. This is not by Rafael Espindola · 16 years ago
  55. 15684b2 Revert 69952. Causes testsuite failures on linux x86-64. by Rafael Espindola · 16 years ago
  56. b706d29 PR2957 by Nate Begeman · 16 years ago
  57. 005e798 Get rid of what looks like a copy-and-pasted typo. Spotted by gcc-4.5. by Duncan Sands · 16 years ago
  58. 998e125 Move duplicated AddLiveIn function from X86 and ARM backends to be a method by Bob Wilson · 16 years ago
  59. 2ee3db3 For general dynamic TLS access we must use by Rafael Espindola · 16 years ago
  60. 7ff5bff X86-64 TLS support for local exec and initial exec. by Rafael Espindola · 16 years ago
  61. fc16657 Remove the obsolete SelectionDAG::getNodeValueTypes and simplify by Dan Gohman · 16 years ago
  62. 349ba49 Fix grammaros in comments. by Dan Gohman · 16 years ago
  63. 094fad3 Re-apply 68552. Tested by bootstrapping llvm-gcc and using that to build llvm. by Rafael Espindola · 16 years ago
  64. 8ef2b89 Avoid a hard coded constant. by Rafael Espindola · 16 years ago
  65. 97121ba Implement support for using modeling implicit-zero-extension on x86-64 by Dan Gohman · 16 years ago
  66. 044b534 Temporarily revert r68552. This was causing a failure in the self-hosting LLVM by Bill Wendling · 16 years ago
  67. 2a6411b Reduce code duplication on the TLS implementation. by Rafael Espindola · 16 years ago
  68. 1e95580 Added a x86 dag combine to increase the chances to use a by Mon P Wang · 16 years ago
  69. 5867de1 silence warning in release-asserts build. by Chris Lattner · 16 years ago
  70. d54f2d5 i128 shift libcalls are not available on x86. by Evan Cheng · 16 years ago
  71. 73f24c9 When optimzing a mul by immediate into two, the resulting mul's should get a x86 specific node to avoid dag combiner from hacking on them further. by Evan Cheng · 16 years ago
  72. da945e3 Have only one definition of X86AddrNumOperands. by Rafael Espindola · 16 years ago
  73. 0b0cd91 Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g. by Evan Cheng · 16 years ago
  74. a82dfca I am trying to add a segment to the X86 addresses matching to by Rafael Espindola · 16 years ago
  75. 9272253 -no-implicit-float means explicit fp operations are legal. by Evan Cheng · 16 years ago
  76. a02a3dd Pull transform from target-dependent code into target-independent code. by Bill Wendling · 16 years ago
  77. 8b4b874 Match this pattern so that we can generate simpler code: by Bill Wendling · 16 years ago
  78. 105be5a These instructions have special lowering that may lower them to SSE by Bill Wendling · 16 years ago
  79. 1606e8e Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues. by Evan Cheng · 16 years ago
  80. cee56e7 generalize the previous code to use the full generality of LEA by Chris Lattner · 16 years ago
  81. 97a29a5 optimize the case of cond ? 42 : 41 and friends. This compiles the example to: by Chris Lattner · 16 years ago
  82. d1980a5 Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))" by Chris Lattner · 16 years ago
  83. 536e667 On x86, if the only use of a i64 load is a i64 store, generate a pair of double load and store instead. by Evan Cheng · 16 years ago
  84. f9abd7e Add a -no-implicit-float flag. This acts like -soft-float, but may generate by Bill Wendling · 16 years ago
  85. 6b3ef69 For yonah, fix a vector shuffle case for v16i8 where we didn't properly clear some bits. by Mon P Wang · 16 years ago
  86. 37b9a19 Fixed a v8i16 shuffle case that should generate a pshufb instead of a pshuflw/hw. by Mon P Wang · 16 years ago
  87. 47b4ce8 formatting change, reduce indentation. No functionality change. by Chris Lattner · 16 years ago
  88. 3112581 Arithmetic instructions don't set EFLAGS bits OF and CF bits by Dan Gohman · 16 years ago
  89. 51bb474 When creating X86ISD::INC and X86ISD::DEC nodes, only add one operand. by Dan Gohman · 16 years ago
  90. 4bfcf2a Fix the "test" optimization to recognize "dec" as an add of by Dan Gohman · 16 years ago
  91. 076aee3 Re-apply 66008, now that the unfoldMemoryOperand bug is fixed. by Dan Gohman · 16 years ago
  92. 29582d1 Revert r66004 for now; it's causing a variety of test failures. by Dan Gohman · 16 years ago
  93. 12bbc52 Teach the x86 backend to eliminate "test" instructions by using the EFLAGS by Dan Gohman · 16 years ago
  94. 9a58023 Refactor TLS code and add some tests. The tests and expected results are: by Rafael Espindola · 16 years ago
  95. a87008d Revert BuildVectorSDNode related patches: 65426, 65427, and 65296. by Evan Cheng · 16 years ago
  96. 242b38b Only v1i16 (i.e. _m64) is returned via RAX / RDX. by Evan Cheng · 16 years ago
  97. b9a47b8 Generate better code for v8i16 shuffles on SSE2 by Nate Begeman · 16 years ago
  98. 4214a55 Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR by Scott Michel · 16 years ago
  99. 6140a8b Be bug compatible with gcc by returning MMX values in RAX. by Evan Cheng · 16 years ago
  100. 79fb3b4 Support return of MMX values in 64-bit mode. by Evan Cheng · 16 years ago