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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 166579e287a38d907acafc24243146e9f3ee9799 / utils
  1. a397a11 We always bounds check the bit set, there is no need to emit zero bytes at the end. by Benjamin Kramer · 13 years ago
  2. 9df8567 Turn the DenseSet in MCRegisterClass into a tblgenerated bit field. This should be faster and smaller. by Benjamin Kramer · 13 years ago
  3. f496d68 Give TargetRegisterClass a pointer to the MCRegisterClass and use it to access its data. by Benjamin Kramer · 13 years ago
  4. 4a5ffb3 ARM SSAT instruction 5-bit immediate handling. by Jim Grosbach · 13 years ago
  5. 256535f Use the enum value for RegClassIDs. by Benjamin Kramer · 13 years ago
  6. c848066 Remove unused variables. by Benjamin Kramer · 13 years ago
  7. 8ca9a86 Teach tblgen to emit MCRegisterClasses. by Benjamin Kramer · 13 years ago
  8. 152d4a4 Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn necessitates a lot of changes to related bits. by Owen Anderson · 13 years ago
  9. 92a2022 Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowing us to distinguish the encodings that use shifted registers from those that use shifted immediates. This is necessary to allow the fixed-length decoder to distinguish things like BICS vs LDRH. by Owen Anderson · 13 years ago
  10. c30a38f move tier out of an anonymous namespace, it doesn't make sense by Chris Lattner · 13 years ago
  11. dde038a ARM PKH shift ammount operand printing tweaks. by Jim Grosbach · 13 years ago
  12. f1a0090 Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM. by Owen Anderson · 13 years ago
  13. ffa3225 ARM assembly parsing for MOV (immediate). by Jim Grosbach · 13 years ago
  14. 565a036 Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple instructions with the same encoding. This resolves another conflict when bringing up the new-style disassembler. by Owen Anderson · 13 years ago
  15. 0e6a052 Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down by Evan Cheng · 13 years ago
  16. 0af0dc8 Re-apply r135319 with a fix for the constant island pass. by Owen Anderson · 13 years ago
  17. 77f8274 Intern all RecTy subclass instances to avoid duplicates. by Jakob Stoklund Olesen · 13 years ago
  18. 39b5abf Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previously explicit non-default constructors were used. by Frits van Bommel · 13 years ago
  19. 91ddfc4 Revert r135319 in an attempt to get to unbreak testers. by Owen Anderson · 13 years ago
  20. 7105259 Make the disassembler able to disassemble a bunch of instructions with names in the TableGen files containing "64" on x86-32. This includes a bunch of x87 instructions, like fld, and a bunch of SSSE3 instructions on MMX registers like pshufb. Part of PR8873. by Eli Friedman · 13 years ago
  21. 49e163b Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode. Update the ARM disassembler for this change. by Owen Anderson · 13 years ago
  22. 8938183 Have tblgen produce code that tolerates operands that return an invalid match class. by Kevin Enderby · 13 years ago
  23. 20722b6 Eliminate "const" from extern const to fix breakeage since r135184 on msvc. by NAKAMURA Takumi · 13 years ago
  24. 5196c12 Add a new field to MCOperandInfo that contains information about the type of the Operand. by Benjamin Kramer · 13 years ago
  25. c60f9b7 Next round of MC refactoring. This patch factor MC table instantiations, MC by Evan Cheng · 13 years ago
  26. 154c535 though it isn't the case here, the key of a StringMap can by Chris Lattner · 13 years ago
  27. eb9a85f Change Intrinsic::getDeclaration and friends to take an ArrayRef. by Benjamin Kramer · 13 years ago
  28. 1688441 Add a target-indepedent entry to MCInstrDesc to describe the encoded size of an opcode. Switch ARM over to using that rather than its own special MCInstrDesc bits. by Owen Anderson · 13 years ago
  29. afd5426 struct Init -> class Init by David Greene · 13 years ago
  30. 83ab070 Range checking for CDP[2] immediates. by Jim Grosbach · 13 years ago
  31. 619e0d6 Give the ARM BKPT instruction the right operand type. by Jim Grosbach · 13 years ago
  32. d568b3f Revert r134921, 134917, 134908 and 134907. They're causing failures by Eric Christopher · 13 years ago
  33. 5e3cb47 Use get(0 Instead of Create() by David Greene · 13 years ago
  34. 9bcc399 struct Init -> class Init. by Evan Cheng · 13 years ago
  35. 1bb6e28 Fix Build by David Greene · 13 years ago
  36. d4a9066 [AVX] Make Inits Foldable by David Greene · 13 years ago
  37. 7ae0df4 Resynchronize EDInfo.h and EDEmitter.cpp. by Shantonu Sen · 13 years ago
  38. 59ee62d - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo by Evan Cheng · 13 years ago
  39. 6bb5fe3 lit/LitConfig.py: Demote Win32 message "Unable to find 'bash.exe'" from Warning to Note. by NAKAMURA Takumi · 13 years ago
  40. 6043548 Fix dangling pointer. by Eli Friedman · 13 years ago
  41. fbc38d2 Fix a dangling reference. Patch by Dave Abrahams. pr10311 by Evan Cheng · 13 years ago
  42. 86f9adb TableGen'erated MC lowering for simple pseudo-instructions. by Jim Grosbach · 13 years ago
  43. ebdeeab Eliminate asm parser's dependency on TargetMachine: by Evan Cheng · 13 years ago
  44. 0ddff1b Compute feature bits at time of MCSubtargetInfo initialization. by Evan Cheng · 13 years ago
  45. e727d67 Add isCodeGenOnly value to the CodeGenInstruction class. by Jim Grosbach · 13 years ago
  46. 66c9ee7 Typo. by Jim Grosbach · 13 years ago
  47. 806fcc0 Don't require pseudo-instructions to carry encoding information. by Jim Grosbach · 13 years ago
  48. e234cd9 Allow tagless builds and fix debug build configuration. by David Greene · 13 years ago
  49. 68ae5b4 Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo. by Evan Cheng · 13 years ago
  50. 2f494b6 Use subprocess.Popen instead of popen2 to stop a deprecation warning when running lit on OS X by Jordy Rose · 13 years ago
  51. 5b1b4489 Rename TargetSubtarget to TargetSubtargetInfo for consistency. by Evan Cheng · 13 years ago
  52. 9421470 - Added MCSubtargetInfo to capture subtarget features and scheduling by Evan Cheng · 13 years ago
  53. 4db3cff Hide the call to InitMCInstrInfo into tblgen generated ctor. by Evan Cheng · 13 years ago
  54. ff97eb0 Pseudo-ize the Thumb tTPsoft instruction. by Jim Grosbach · 13 years ago
  55. 4629d50 Pseudo-ize the Thumb tPOP_RET instruction. by Jim Grosbach · 13 years ago
  56. 276365d Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to by Evan Cheng · 13 years ago
  57. f6fd909 Remove redundant Thumb2 ADD/SUB SP instruction definitions. by Jim Grosbach · 13 years ago
  58. ae218de ARM RSCS* don't need explicit TableGen decoder checks. by Jim Grosbach · 13 years ago
  59. 74472b4 Refactor away tSpill and tRestore pseudos in ARM backend. by Jim Grosbach · 13 years ago
  60. 2e10b08 Change AsmName's type from StringRef to std::string. AsmName was pointing to a temporary string object that was destroyed. This is undefined behavior and MSVC didn't like it. by Francois Pichet · 13 years ago
  61. ab8be96 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC. by Evan Cheng · 13 years ago
  62. d5b03f2 Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. by Evan Cheng · 13 years ago
  63. 6844f7b Hide more details in tablegen generated MCRegisterInfo ctor function. by Evan Cheng · 13 years ago
  64. 94b01f6 Add MCInstrInfo registeration machinery. by Evan Cheng · 13 years ago
  65. 22fee2d Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc by Evan Cheng · 13 years ago
  66. e837dea - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and by Evan Cheng · 13 years ago
  67. 4987033f Alternative name enum should go into the enum portion. by Evan Cheng · 13 years ago
  68. 6b8f1e3 ARM Assembly support for Thumb mov-immediate. by Jim Grosbach · 13 years ago
  69. 4db3748 Remove RCBarriers from TargetInstrDesc. by Evan Cheng · 13 years ago
  70. bea6f61 Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. by Owen Anderson · 13 years ago
  71. ebbbfd0 More refactoring. MC doesn't need know about subreg indices. by Evan Cheng · 13 years ago
  72. 73f50d9 Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc by Evan Cheng · 13 years ago
  73. 025b37b Remove dead typedefs. by Evan Cheng · 13 years ago
  74. 5e6b460 Rename TargetRegisterDesc to MCRegisterDesc by Evan Cheng · 13 years ago
  75. 9c99cfe Revert "Shorten some ARM builtin names by removing unnecessary "neon" prefix." by Bob Wilson · 13 years ago
  76. e9e0e3a Shorten some ARM builtin names by removing unnecessary "neon" prefix. by Bob Wilson · 13 years ago
  77. f5fa52e - Add MCRegisterInfo registration machinery. Also added x86 registration routines. by Evan Cheng · 13 years ago
  78. 5c10b63 Make the generated InitXXXMCRegisterInfo function "static inline", so it doesn't get emitted into multiple object files. by Benjamin Kramer · 13 years ago
  79. a347f85 Starting to refactor Target to separate out code that's needed to fully describe by Evan Cheng · 13 years ago
  80. f2a5842 lit support for REQUIRES: asserts. by Andrew Trick · 13 years ago
  81. a7b1d17 Unbreak the CMake build by Francois Pichet · 13 years ago
  82. 0b6a44a Consolidate some TableGen diagnostic helper functions. by Jim Grosbach · 13 years ago
  83. 9b718e8 Skip fields that don't exist in the Register class. by Jakob Stoklund Olesen · 13 years ago
  84. 4ce25d5 Add a RegisterTuples class to Target.td and TableGen. by Jakob Stoklund Olesen · 13 years ago
  85. b231866 fix the varargs version of StructType::get to not require an LLVMContext, making usage by Chris Lattner · 13 years ago
  86. c6596e2 Use the correct comparator to avoid depending on pointer values. by Jakob Stoklund Olesen · 13 years ago
  87. abdbc84 Store CodeGenRegisters as pointers so they won't be reallocated. by Jakob Stoklund Olesen · 13 years ago
  88. 54c47c1 Remove MethodProtos/MethodBodies and allocation_order_begin/end. by Jakob Stoklund Olesen · 13 years ago
  89. b4c7048 Provide AltOrders for specifying alternative allocation orders. by Jakob Stoklund Olesen · 13 years ago
  90. 23b0766 Fix formatting. by Owen Anderson · 13 years ago
  91. 2559011 Prempt some obnoxious compiler from complaing about signed/unsigned compares. by Jakob Stoklund Olesen · 13 years ago
  92. 0cc0929 Make sure to pass an unsigned to a printf format that is always %u. by Jakob Stoklund Olesen · 13 years ago
  93. 05c087d Add support to lit for build mode requirements. e.g. by Andrew Trick · 13 years ago
  94. 77b4b13 Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match. by Owen Anderson · 13 years ago
  95. f14bacc Update the Clang diagnostic emitter to emit IDs for diagnostic categories. by John McCall · 13 years ago
  96. 3a3465b Add a new function attribute, nonlazybind, which inhibits lazy-loading by John McCall · 13 years ago
  97. 1e56a2a Replace the statically generated hashtables for checking register relationships with just scanning the (typically tiny) static lists. by Owen Anderson · 13 years ago
  98. 59f26aa Use a SetTheory instance to expand register lists in register classes. by Jakob Stoklund Olesen · 13 years ago
  99. ae1920b Give CodeGenRegisterClass a real sorted member set. by Jakob Stoklund Olesen · 13 years ago
  100. 393c404 Improve the heuristic to emit the alias if the number of hard-coded registers by Bill Wendling · 13 years ago