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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 16a76519a5aa0e3a351cfde8e7236119ffd8b7fb
  1. 16a7651 X86: optimization for -(x != 0) by Manman Ren · 13 years ago
  2. 7a3afa9 ARM: Diagnostics for out of range fixups. by Jim Grosbach · 13 years ago
  3. 887d095 Fix address calculation error from r155744. by Jakob Stoklund Olesen · 13 years ago
  4. e4f1b37 fix typo by Sebastian Pop · 13 years ago
  5. 1701105 test/CodeGen/X86/select.ll: remove spaces by Manman Ren · 13 years ago
  6. 238ae31 Tidy up. No functional change intended. by Chad Rosier · 13 years ago
  7. ddc693b Fix fastcc structure return with fast-isel on x86-32 by Derek Schuff · 13 years ago
  8. ff73d8f Don't introduce illegal types when creating vmull operations. <rdar://11324364> by Bob Wilson · 13 years ago
  9. 37bc5a2 It doesn't make sense to move symbol relocations to section relocations when by Eli Bendersky · 13 years ago
  10. 5ff30e7 Just mark the sign bit as known zero, rather than any other irrelevant bits by Duncan Sands · 13 years ago
  11. bfbab99 Second attempt at PR12573: by Bill Wendling · 13 years ago
  12. 38da2a8 Use an ArrayRef instead of explicit vector type. by Bill Wendling · 13 years ago
  13. 6d15e87 Code cleanup in RuntimeDyld: by Eli Bendersky · 13 years ago
  14. 6aa3327 Remove hack from r154987. The problem persists even with it, so it's not even a good hack. by Bill Wendling · 13 years ago
  15. 7d1e3dc No need to normalize index before calling Extract128BitVector by Craig Topper · 13 years ago
  16. 6942f70 Copied all the VEX prefix encoding code from X86MCCodeEmitter to the x86 JIT emitter. Needs some major refactoring as these two code emitters are almost identical by Pete Cooper · 13 years ago
  17. 9719cf3 Make sure HoistInsertPosition finds a position that is dominated by all inputs. by Rafael Espindola · 13 years ago
  18. 6610b1d Remove unneeded casts. No functionality change. by Jakub Staszak · 13 years ago
  19. 7988981 Remove superfluous 'inline' by Craig Topper · 13 years ago
  20. d77d2fe Simplify code a bit. No functional change intended. by Craig Topper · 13 years ago
  21. a04fe83 Update the documentation of CellSPU, in case it gets removed in 3.1. by Kalle Raiskila · 13 years ago
  22. 2b8d050 RegisterPressure: ArrayRefize some functions for better readability. No functionality change. by Benjamin Kramer · 13 years ago
  23. 5fe0198 Fix some formatting, grammar and style issues and add a couple of missing comments. by Eli Bendersky · 13 years ago
  24. 30183bf Remove redundant line (the memory manager is set above to the same object by Eli Bendersky · 13 years ago
  25. 3703baa SmallVector: Don't rely on having an assignment operator around in push_back for POD-like types. by Benjamin Kramer · 13 years ago
  26. bbd8e5d Fix comments from copy-paste to a more relevant meaning by Eli Bendersky · 13 years ago
  27. db0bbde Add constants for first and last integer vector types to be consistent with floating point. by Craig Topper · 13 years ago
  28. c7f7a9b Remove tab characters by Craig Topper · 13 years ago
  29. 9efb030 Mark the default cases of MVT::getVectorElementType and MVT:getVectorNumElements as unreachable to reduce code size. by Craig Topper · 13 years ago
  30. ff11c01 Don't update spill weights when joining intervals. by Jakob Stoklund Olesen · 13 years ago
  31. f4aee4c Spring cleaning - Delete dead code. by Jakob Stoklund Olesen · 13 years ago
  32. 1888303 If the __is_trivially_copyable type trait is available use it as the baseline for isPodLike. by Benjamin Kramer · 13 years ago
  33. 1dd346a Use the most basic superclass of SmallVector in ArrayRef. by Benjamin Kramer · 13 years ago
  34. 9b10dae Fix a problem with blocks that need to be split twice. by Jakob Stoklund Olesen · 13 years ago
  35. 2674a4a Reapply 155668: Fix the SD scheduler to avoid gluing the same node twice. by Andrew Trick · 13 years ago
  36. a9cc08f ARM: Thumb add(sp plus register) asm constraints. by Jim Grosbach · 13 years ago
  37. bb32f1d ARM: Tweak tADDrSP definition for consistent operand order. by Jim Grosbach · 13 years ago
  38. f3db6b8 Revert r155745 by Derek Schuff · 13 years ago
  39. 9dc28b0 Fix fastcc structure return with fast-isel on x86-32 by Derek Schuff · 13 years ago
  40. 456ff46 Track worst case alignment padding more accurately. by Jakob Stoklund Olesen · 13 years ago
  41. 0e47cfd Temporarily revert r155668: Fix the SD scheduler to avoid gluing. by Andrew Trick · 13 years ago
  42. 66ddd15 Use 'unsigned' instead of 'int' in several places when retrieving number of vector elements. by Craig Topper · 13 years ago
  43. a73b6fc Add x86-specific DAG combine to simplify: by Chad Rosier · 13 years ago
  44. 57d61de [Support/YAMLParser] Fix ASan found bugs. by Michael J. Spencer · 13 years ago
  45. b4a8aef Tidy up spacing. by Craig Topper · 13 years ago
  46. da71cca Make test less fragile. by Evan Cheng · 13 years ago
  47. e32e544 Don't vectorize target-specific types (ppc_fp128, x86_fp80, etc.). by Hal Finkel · 13 years ago
  48. f6d55df Change recurse depth limit to uint32 to fix warning. by David Blaikie · 13 years ago
  49. ca63acd Switch to c-style comments in a C file. by David Blaikie · 13 years ago
  50. 447989c Miscellaneous accumulated cleanups. by Dan Gohman · 13 years ago
  51. 7787800 Fix the order of the operands in the llvm.fma intrinsic patterns for ARM, by Lang Hames · 13 years ago
  52. 5dde20b Add an early bailout to IsValueFullyAvailableInBlock from deeply nested blocks. by Mon P Wang · 13 years ago
  53. 03e091f Reapply r155682, making constant folding more consistent, with a fix to work by Dan Gohman · 13 years ago
  54. 04a09a4 Fix ARM assembly parsing for upper case condition codes on IT instructions. by Richard Barton · 13 years ago
  55. a4c4df4 Remove a docs reference to the CBackend. by Jim Grosbach · 13 years ago
  56. 71275b1 Missed some register numbers. by Benjamin Kramer · 13 years ago
  57. a356e94 Update edis test for r155704. by Benjamin Kramer · 13 years ago
  58. 17c836c X86: Don't emit conditional floating point moves on when targeting pre-pentiumpro architectures. by Benjamin Kramer · 13 years ago
  59. c84f975 Update config.sub in the sample project. by Evgeniy Stepanov · 13 years ago
  60. 3f11998 [asan] small optimization: do not emit "x+0" instructions by Kostya Serebryany · 13 years ago
  61. 4d2f077 Refactor IT handling not to store the bottom bit of the condition code in the mask operand in the MCInst. by Richard Barton · 13 years ago
  62. d213ee7 Revert r155682, "Use ConstantExpr::getExtractElement when constant-folding vectors" by NAKAMURA Takumi · 13 years ago
  63. e507922 [tsan] Atomic support for ThreadSanitizer, patch by Dmitry Vyukov by Kostya Serebryany · 13 years ago
  64. 76c5897 Add mcpu to tests to prevent them from using AVX instructions on Sandy Bridge after r155618. by Craig Topper · 13 years ago
  65. afb3b5e Implement a bastardized ABI. by Evan Cheng · 13 years ago
  66. 97a4543 - thumbv6 shouldn't imply +thumb2. Cortex-M0 doesn't suppport 32-bit Thumb2 by Evan Cheng · 13 years ago
  67. 97b44f9 Use ConstantExpr::getExtractElement when constant-folding vectors by Dan Gohman · 13 years ago
  68. f9f1c7a Break up getProfitableChainIncrement(). by Jakob Stoklund Olesen · 13 years ago
  69. 70a1860 Turn IVChain into a struct. by Jakob Stoklund Olesen · 13 years ago
  70. c1fc5e4 Add instcombine patterns for the following transformations: by Chad Rosier · 13 years ago
  71. 0d5c323 DumpSegment64Command() wasn't returning correct result. Caught by static analyzer. rdar://11329354 by Evan Cheng · 13 years ago
  72. aec9240 Fix the SD scheduler to avoid gluing the same node twice. by Andrew Trick · 13 years ago
  73. 06e950e Defensively guard against calling malloc() with a size of zero. by Ted Kremenek · 13 years ago
  74. 9da7892 ARM: Thumb ldr(literal) base address alignment is 32-bits. by Jim Grosbach · 13 years ago
  75. dba86d8 Add note about returns_twice magic removal from LLVM itself. by Joerg Sonnenberger · 13 years ago
  76. c573b1f by Preston Gurd · 13 years ago
  77. 3c00db7 [CMake] Restructure how Clang, Polly and other external projects get included. by Michael J. Spencer · 13 years ago
  78. 60f3d92 [Support/YAML] Properly fix unitialized variable warning by inserting a by Michael J. Spencer · 13 years ago
  79. 5c77bc2 Fixed SmallMap test. The order of items is undefined in DenseMap. So being checking the increment for big mode, we can only check that all items are in map. by Stepan Dyatkovskiy · 13 years ago
  80. 37abe8d Use VLD1 in NEON extenting-load patterns instead of VLDR. by Tim Northover · 13 years ago
  81. e38993f Test commit. by Tim Northover · 13 years ago
  82. 1203f2f Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei7-avx, core-avx-i, and core-avx2 cpu names. by Craig Topper · 13 years ago
  83. 464bda3 Teach the reassociate pass to fold chains of multiplies with repeated by Chandler Carruth · 13 years ago
  84. cac31de Specify cpu to unbreak tests. by Evan Cheng · 13 years ago
  85. e67a416 If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assume by Evan Cheng · 13 years ago
  86. 4866363 Don't forget to reset 'first operand' flag when we're setting the MDNodeOperand value. by Bill Wendling · 13 years ago
  87. 6962106 Try to fix llvm-arm-linux builder with -mcpu. by Jakob Stoklund Olesen · 13 years ago
  88. 01c0dd1 Trivial change to make the test use -mcpu=generic so as to avoid by Preston Gurd · 13 years ago
  89. b856d55 Reapply the SmallMap patch with a fix. by Benjamin Kramer · 13 years ago
  90. 165324c Print IV chain numbers while collecting them. by Jakob Stoklund Olesen · 13 years ago
  91. a0b0219 Remove more dead code. by Jakob Stoklund Olesen · 13 years ago
  92. b56e411 Unify internal representation of ARM instructions with a register right-shifted by #32. These are stored as shifts by #0 in the MCInst and correctly marshalled when transforming from or to assembly representation. by Richard Barton · 13 years ago
  93. bdbf015 Revert "First implementation of:" by Eric Christopher · 13 years ago
  94. 76271a3 First implementation of: by Stepan Dyatkovskiy · 13 years ago
  95. 50e1d84 Simplify LiveIntervals::getApproximateInstructionCount(). by Jakob Stoklund Olesen · 13 years ago
  96. a62efd8 Remove a dead function. by Jakob Stoklund Olesen · 13 years ago
  97. 40a2b65 Remove the -disable-cross-class-join option. by Jakob Stoklund Olesen · 13 years ago
  98. a2404e3 Cross-class joining is winning. by Jakob Stoklund Olesen · 13 years ago
  99. 8030e1a Add ifdef around getSubtargetFeatureName in tablegen output file so that only targets that want the function get it. This prevents other targets from getting an unused function warning. by Craig Topper · 13 years ago
  100. c16f851 Use vector_shuffles instead of target specific unpack nodes for AVX ZERO_EXTEND/ANY_EXTEND combine. These will be converted to target specific nodes during lowering. This is more consistent with other code. by Craig Topper · 13 years ago