1. 1907a7b Lower some min/max idioms to minss/maxss when unsafe fp math is enabled. by Chris Lattner · 18 years ago
  2. e111303 Added option -disable-x86-shuffle-opti to disable X86 specific vector shuffle optimizations. by Evan Cheng · 18 years ago
  3. 83e6c99 Pattern match min/max nodes when we have sse. This implements by Chris Lattner · 18 years ago
  4. c548428 Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an by Evan Cheng · 18 years ago
  5. 13bf6c1 Fix PR933 and CodeGen/X86/2006-10-02-BoolRetCrash.ll by Chris Lattner · 18 years ago
  6. f38f543 silence warnings in release build by Chris Lattner · 18 years ago
  7. e87e115 Various random and minor code cleanups. by Chris Lattner · 18 years ago
  8. 70084fd Fix compile error. by Nick Lewycky · 18 years ago
  9. f824868 Adding codegeneration for StdCall & FastCall calling conventions by Anton Korobeynikov · 18 years ago
  10. bcb9770 Added some eye-candy for Subtarget type checking by Anton Korobeynikov · 18 years ago
  11. 93c2b37 Small fixes for supporting dll* linkage types by Anton Korobeynikov · 18 years ago
  12. b74ed07 Adding dllimport, dllexport and external weak linkage types. by Anton Korobeynikov · 18 years ago
  13. bfd68a7 Turn X < 0 -> TEST X,X js by Chris Lattner · 18 years ago
  14. 7a6366d The sense of this branch was inverted :( by Chris Lattner · 18 years ago
  15. f957051 Compile X > -1 -> text X,X; js dest This implements CodeGen/X86/jump_sign.ll. by Chris Lattner · 18 years ago
  16. c356a57 Reflects MachineConstantPoolEntry changes. by Evan Cheng · 18 years ago
  17. 734503b X86ISD::CMP now produces a chain as well as a flag. Make that the chain by Evan Cheng · 18 years ago
  18. 25ab690 Committing X86-64 support. by Evan Cheng · 18 years ago
  19. 8cf723d - Identify a vector_shuffle that can be turned into an undef, e.g. by Evan Cheng · 18 years ago
  20. ffc0b26 Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns by Chris Lattner · 18 years ago
  21. 5ea7a68 Revert this patch, the front-end has been fixed to make it unneccesary. by Chris Lattner · 18 years ago
  22. b5bc04d 'g' is handled by the front-end. by Chris Lattner · 18 years ago
  23. ad1ed01 Fix handling of 'g'. Closes 883 by Andrew Lenharth · 18 years ago
  24. d337295 Add the 'c' constraint as needed by the linux kernel by Andrew Lenharth · 18 years ago
  25. c63e56e Add support for S and D constraints, as needed to compile the linux kernel. by Andrew Lenharth · 18 years ago
  26. e219945 Eliminate use of getNode that takes a vector. by Chris Lattner · 18 years ago
  27. 64a752f Match tablegen changes. by Evan Cheng · 18 years ago
  28. 311ace0 Convert more calls of getNode() that takes a vector to pass in the start of an array. by Evan Cheng · 18 years ago
  29. bd564bf Start eliminating temporary vectors used to create DAG nodes. Instead, pass by Chris Lattner · 18 years ago
  30. f76d180 Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll. by Chris Lattner · 18 years ago
  31. 35d86fe Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC. by Chris Lattner · 18 years ago
  32. 6255180 This opt is now handled in DAG combine. by Evan Cheng · 18 years ago
  33. 1e1a88e A splat of a vector constant of all zero or all one is the vector constant. by Evan Cheng · 18 years ago
  34. 6d34657 Add information preventing several register class constraints from working. by Chris Lattner · 18 years ago
  35. f4dff84 Implement the inline asm 'A' constraint. This implements PR825 and by Chris Lattner · 18 years ago
  36. 1e60c09 Fixed stack objects do not specify alignments, but their offsets are known. by Evan Cheng · 18 years ago
  37. 5c5f4ca Mark internal function static by Chris Lattner · 18 years ago
  38. 206ee9d X86 target specific DAG combine: turn build_vector (load x), (load x+4), by Evan Cheng · 18 years ago
  39. 60c07e1 Reorg. No functionality change. by Evan Cheng · 18 years ago
  40. da08d2c Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary. by Evan Cheng · 18 years ago
  41. 015188f Type of vector extract / insert index operand should be iPTR. by Evan Cheng · 18 years ago
  42. b69d113 Add argument registers to the end of call operand list (partial fix). by Evan Cheng · 18 years ago
  43. b12223e Minor compilation speed improvement. by Evan Cheng · 18 years ago
  44. e8bd0a3 Added X86FunctionInfo subclass of MachineFunction to record whether the by Evan Cheng · 18 years ago
  45. 2675534 Typos by Evan Cheng · 18 years ago
  46. 04b2562 Remove a warning by Evan Cheng · 18 years ago
  47. 8f692e2 Remove dead code. by Evan Cheng · 18 years ago
  48. 6848be1 Change RET node to include signness information of the return values. i.e. by Evan Cheng · 18 years ago
  49. 3fddf24 Vector argument must be passed in memory location aligned on 16-byte boundary. by Evan Cheng · 18 years ago
  50. 1d6a9b3 Mac OS X ABI document lied. The first four XMM registers are used to pass by Evan Cheng · 18 years ago
  51. 052fb51 Minor update to make the code more clear by Evan Cheng · 18 years ago
  52. f9d62dc Update more comments. by Evan Cheng · 18 years ago
  53. f9ff7c5 Fix some comments. by Evan Cheng · 18 years ago
  54. 6f70799 No need to handle illegal types. by Evan Cheng · 18 years ago
  55. cc1fc22 Consistency by Evan Cheng · 18 years ago
  56. 25e71d1 Some clean up. by Evan Cheng · 18 years ago
  57. a9bb445 Remove some dead code. by Evan Cheng · 18 years ago
  58. 6b5783d Build breakage. by Evan Cheng · 18 years ago
  59. 32fe103 Switch X86 over to a call-selection model where the lowering code creates by Evan Cheng · 18 years ago
  60. c6d0567 Fix file header comment by Chris Lattner · 18 years ago
  61. 4db3af3 Better way to check for vararg. by Evan Cheng · 18 years ago
  62. 25caf63 Remove PreprocessCCCArguments and PreprocessFastCCArguments now that by Evan Cheng · 18 years ago
  63. 2d29709 Implement an annoying part of the Darwin/X86 abi: the callee of a struct by Chris Lattner · 18 years ago
  64. cdbaeb5 CSRet allows varargs by Chris Lattner · 18 years ago
  65. 4ac8974 Should pass by reference. by Evan Cheng · 18 years ago
  66. aa9406b Implement the custom lowering hook right, returning values for all of the by Chris Lattner · 18 years ago
  67. e7746c9 Fix a bug I introduced yesterday, which broke functions with *no* arguments. by Chris Lattner · 18 years ago
  68. 069287d X86 integer register classes naming changes. Make them consistent with FP, vector classes. by Evan Cheng · 18 years ago
  69. 8c0c10c Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend, by Chris Lattner · 18 years ago
  70. 03ea4c8 Dead variable by Chris Lattner · 19 years ago
  71. 80a7ecc Teach the X86 backend about non-i32 inline asm register classes. by Chris Lattner · 19 years ago
  72. bd04aa5 Teach the code generator to use cvtss2sd as extload f32 -> f64 by Chris Lattner · 19 years ago
  73. a69571c Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. by Owen Anderson · 19 years ago
  74. 347d5f7 Initial caller side support (for CCC only, not FastCC) of 128-bit vector by Evan Cheng · 19 years ago
  75. 43f3bd3 Implement four-wide shuffle with 2 shufps if no more than two elements come by Evan Cheng · 19 years ago
  76. 020c41f TargetLowering::LowerArguments should return a VBIT_CONVERT of by Evan Cheng · 19 years ago
  77. fea89c1 Make x86 isel lowering produce tailcall nodes. They are match to normal calls by Evan Cheng · 19 years ago
  78. 2fdd95e Support for passing 128-bit vector arguments via XMM registers. by Evan Cheng · 19 years ago
  79. 5fb03ce Oops by Evan Cheng · 19 years ago
  80. 85e3800 Bug fix: not updating NumIntRegs. by Evan Cheng · 19 years ago
  81. eda65fa - Clean up formal argument lowering code. Prepare for vector pass by value work. by Evan Cheng · 19 years ago
  82. 9191dbb Fix fastcc failures. by Evan Cheng · 19 years ago
  83. 1bc7804 Switching over FORMAL_ARGUMENTS mechanism to lower call arguments. by Evan Cheng · 19 years ago
  84. 0db9fe6 Separate LowerOperation() into multiple functions, one per opcode. by Evan Cheng · 19 years ago
  85. 37d1d9b Special case handling two wide build_vector(0, x). by Evan Cheng · 19 years ago
  86. c78d3b4 A little bit more build_vector enhancement for v8i16 cases. by Evan Cheng · 19 years ago
  87. 9293451 MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2 by Evan Cheng · 19 years ago
  88. 37efe67 JumpTable support! What this represents is working asm and jit support for by Nate Begeman · 19 years ago
  89. 1900c01 Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimization for shuffle of undef. by Evan Cheng · 19 years ago
  90. a083af1 Fix a performance regression. Use {p}shuf* when there are only two distinct elements in a build_vector. by Evan Cheng · 19 years ago
  91. ba05f72 Revamp build_vector lowering to take advantage of movss and movd instructions. by Evan Cheng · 19 years ago
  92. 017dcc6 Now generating perfect (I think) code for "vector set" with a single non-zero by Evan Cheng · 19 years ago
  93. 39623da - Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1> by Evan Cheng · 19 years ago
  94. 72cd9a9 Handle v2i64 BUILD_VECTOR custom lowering correctly. v2i64 is a legal type, by Evan Cheng · 19 years ago
  95. 94fe5eb isSplatMask() bug: first element can be an undef. by Evan Cheng · 19 years ago
  96. 80d428c - Added support to do aribitrary 4 wide shuffle with no more than three by Evan Cheng · 19 years ago
  97. 533a0aa Commute vector_shuffle to match more movlhps, movlp{s|d} cases. by Evan Cheng · 19 years ago
  98. cdfc3c8 Use movss to insert_vector_elt(v, s, 0). by Evan Cheng · 19 years ago
  99. 5edb8d2 Use two pinsrw to insert an element into v4i32 / v4f32 vector. by Evan Cheng · 19 years ago
  100. c575ca2 Implement v8i16, v16i8 splat using unpckl + pshufd. by Evan Cheng · 19 years ago