- 1c4b5ea Make intel asmprinter child of generic asmprinter, not x86 shared asm printer. This leads to some code duplication, which will be resolved later. by Anton Korobeynikov · 16 years ago
- 58dcb0e Add option to commuteInstruction() which forces it to create a new (commuted) instruction. by Evan Cheng · 16 years ago
- c9f5f3f Change target-specific classes to use more precise static types. by Dan Gohman · 16 years ago
- 9f8fea3 Constify the machine instruction passed into the by Bill Wendling · 16 years ago
- 52e724a Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented by Nicolas Geoffray · 17 years ago
- ca1267c Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. by Evan Cheng · 17 years ago
- 950a4c4 Add explicit keywords. by Dan Gohman · 17 years ago
- 6634e26 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. by Christopher Lamb · 17 years ago
- 1fab4a6 Recommitting parts of r48130. These do not appear to cause the observed failures. by Christopher Lamb · 17 years ago
- 4499e49 Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests. by Evan Cheng · 17 years ago
- 3feb017 Allow insert_subreg into implicit, target-specific values. by Christopher Lamb · 17 years ago
- ea7da50 Add lock prefix support to x86. Also add the instructions necessary for the atomic ops. They are still marked pseudo, since I cannot figure out what format to use, but they are the correct opcode. by Andrew Lenharth · 17 years ago
- 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 17 years ago
- 5fd79d0 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. by Evan Cheng · 17 years ago
- a22edc8 Simplify the side effect stuff a bit more and make licm/sinking by Chris Lattner · 17 years ago
- 749c6f6 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 17 years ago
- cc8cd0c remove MachineOpCode typedef. by Chris Lattner · 17 years ago
- 43dbe05 Move even more functionality from MRegisterInfo into TargetInstrInfo. by Owen Anderson · 17 years ago
- d94b6a1 Move some more functionality from MRegisterInfo to TargetInstrInfo. by Owen Anderson · 17 years ago
- 3100afa Machine LICM will check that operands are defined outside of the loop. Also by Bill Wendling · 17 years ago
- f6372aa Move some more instruction creation methods from RegisterInfo into InstrInfo. by Owen Anderson · 17 years ago
- 6410552 Fix a problem where lib/Target/TargetInstrInfo.h would include and use by Chris Lattner · 17 years ago
- d10fd97 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the by Owen Anderson · 17 years ago
- 6259d51 If we have a load of a global address that's not modified during the by Bill Wendling · 17 years ago
- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
- 627c00b Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I by Bill Wendling · 17 years ago
- 041b3f8 Reverting 44702. It wasn't correct to rename them. by Bill Wendling · 17 years ago
- 320c630 Renaming: by Bill Wendling · 17 years ago
- ee46574 Move getX86RegNum into X86RegisterInfo and use it by Duncan Sands · 17 years ago
- d45eddd Revert the earlier change that removed the M_REMATERIALIZABLE machine by Dan Gohman · 17 years ago
- 82a87a0 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 17 years ago
- 318093b Do not treat FP_REG_KILL as terminator in branch analysis (X86). by Dale Johannesen · 17 years ago
- c101e95 Add a target hook to allow loads from constant pools to be rematerialized, and an by Dan Gohman · 17 years ago
- 6ae3626 RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. by Evan Cheng · 17 years ago
- bb1ee05 Add support for our first SSSE3 instruction "pmulhrsw". by Bill Wendling · 18 years ago
- 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 18 years ago
- 19f2ffc - Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit by Evan Cheng · 18 years ago
- ba59a1e Match TargetInstrInfo changes. by Evan Cheng · 18 years ago
- c24ff8e add another target hook for branch folding. by Chris Lattner · 18 years ago
- 9cd6875 Implement support for branch condition reversal. by Chris Lattner · 18 years ago
- 7fbe972 Implement branch analysis/xform hooks required by the branch folding pass. by Chris Lattner · 18 years ago
- ae1dc40 expose DWARF_LABEL opcode# so the branch folder can update debug info properly. by Chris Lattner · 18 years ago
- d77ddbc remove some dead code by Chris Lattner · 18 years ago
- 25ab690 Committing X86-64 support. by Evan Cheng · 18 years ago
- aa3c141 Fix a build breaker. by Evan Cheng · 18 years ago
- d74ea2b Patches to make the LLVM sources more -pedantic clean. Patch provided by Chris Lattner · 18 years ago
- 751458d ImmMask should be 3 for a two-bit field; Compact X86II by Evan Cheng · 18 years ago
- 4083960 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) by Chris Lattner · 19 years ago
- 3c55c54 - Use xor to clear integer registers (set R, 0). by Evan Cheng · 19 years ago
- 9eb59ec Eliminate tabs and trailing spaces. by Jeff Cohen · 19 years ago
- f63be7d First round of support for doing scalar FP using the SSE2 ISA extension and by Nate Begeman · 19 years ago
- 0e0a7a45 * Remove trailing whitespace * Convert tabs to spaces by Misha Brukman · 20 years ago
- 41e431b Teach the code generator that shrd/shld is commutable if it has an immediate. by Chris Lattner · 20 years ago
- bcea4d6 Implement the convertToThreeAddress method, add support for inverting JP/JNP by Chris Lattner · 20 years ago
- c96bb81 Remove a bunch of ad-hoc target-specific flags that were only used by the by Chris Lattner · 20 years ago
- a35ce87 Eliminate 3 of the X86 printImplicit* flags. by Chris Lattner · 20 years ago
- 36f506e Implement insertGoto and reverseBranchCondition for the X86. by Alkis Evlogimenos · 20 years ago
- ab8decc Introduce a new FP instruction type to separate the compare cases from the by Chris Lattner · 20 years ago
- 2665383 Add support for the printImplicitDefsBefore flag by Chris Lattner · 21 years ago
- 4ffff9e Added the llvm.readport and llvm.writeport intrinsics for x86. These do by John Criswell · 21 years ago
- f1ac50e Wrap at 80 cols by Chris Lattner · 21 years ago
- 1c54a85 Add FP conditional move instructions, which annoyingly have special properties by Chris Lattner · 21 years ago
- 1ddf475 These two virtual methods are never called. by Chris Lattner · 21 years ago
- 5ab29b5 Each instruction now has both an ImmType and a MemType. This describes by Alkis Evlogimenos · 21 years ago
- 169584e Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}. by Alkis Evlogimenos · 21 years ago
- 915e5e5 Add support for the rep movs[bwd] instructions, and emit them when code by Chris Lattner · 21 years ago
- 79b1373 Add a new flag, which is only used for symmetry. by Chris Lattner · 21 years ago
- 5e30002 Add TargetInstrInfo::isMoveInstr() to support coalescing in register allocation. by Alkis Evlogimenos · 21 years ago
- 1e60a91 Rip JIT specific stuff out of TargetMachine, as per PR176 by Chris Lattner · 21 years ago
- d0fde30 Put all LLVM code into the llvm namespace, as per bug 109. by Brian Gaeke · 21 years ago
- 856ba76 Added LLVM copyright header. by John Criswell · 21 years ago
- 2959b6e Completely eliminate the isVoid TSFlag, shifting over all other fields by Chris Lattner · 21 years ago
- 4d18d5c Lump the base opcode in with the X86 TargetSpecific flags by Chris Lattner · 21 years ago
- d7908f6 Nice tasty llc fixes. These should fix LLC for x86 for everything in by Brian Gaeke · 21 years ago
- 12745c5 Reword to remove reference to how things worked in the past. by Misha Brukman · 21 years ago
- e9d8838 Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface. by Misha Brukman · 21 years ago
- 3501fea Rename MachineInstrInfo -> TargetInstrInfo by Chris Lattner · 22 years ago
- 0c514f4 * Some instructions take 64 bit integers, add an Arg type for it by Chris Lattner · 22 years ago
- 0ef73f3 * Remove implementations of previously pure virtual functions that are not any longer. by Chris Lattner · 22 years ago
- 4c299f5 Add FP instr prefix byte support Add Pseudo instr class by Chris Lattner · 22 years ago
- a0f38c8 Rename MemArg* to Arg* by Chris Lattner · 22 years ago
- 86764d7 Target/X86/Printer.cpp: Add sizePtr function, and use it instead of by Brian Gaeke · 22 years ago
- 4aff928 Eliminate OtherFrm by Chris Lattner · 22 years ago
- 15207f4 Add fixme by Chris Lattner · 22 years ago
- 85b39f2 Add support for /0 /1, etc type instructions by Chris Lattner · 22 years ago
- 11e53e3 Add new prefix flag by Chris Lattner · 22 years ago
- f21dfcd Expose base opcode by Chris Lattner · 22 years ago
- 6aab9cf Start to add more information to instr.def by Chris Lattner · 22 years ago
- 239dcfd Add instruction annotation about whether it has a 0x0F opcode prefix by Chris Lattner · 22 years ago
- 927dd09 Arrange to have a TargetMachine available in X86InstrInfo::print by Chris Lattner · 22 years ago
- dbb61c6 Reorganize printing interface a bit by Chris Lattner · 22 years ago
- 9d17740 Add flag to specify when no value is produced by an instruction by Chris Lattner · 22 years ago
- 055c965 Rename X86InstructionInfo to X86InstrInfo by Chris Lattner · 22 years ago
- 33f53b5 Minor renaming by Chris Lattner · 22 years ago
- 9bbf439 Implement MachineInstrInfo interface by Chris Lattner · 22 years ago
- 75276f1 Initial stab at MachineInstr'ication by Chris Lattner · 22 years ago
- 7261408 Initial checkin of X86 backend. by Chris Lattner · 22 years ago