- 1cbf3ab Next round of PPC CR optimizations. For the following code: by Nate Begeman · 20 years ago
- 16ac709 Change codegen for setcc to read the bit directly out of the condition by Nate Begeman · 20 years ago
- f8b0294 Make pattern isel default for ppc by Nate Begeman · 20 years ago
- 7bfba7d Implement multi-way branches through logical ops on condition registers. by Nate Begeman · 20 years ago
- 1b7f7fb Start allocating condition registers. Almost all explicit uses of CR0 are by Nate Begeman · 20 years ago
- 3664cef Implement the fold shift X, zext(Y) -> shift X, Y at the target level, by Nate Begeman · 20 years ago
- eea805e Disbale the broken fold of shift + sz[ext] for now by Nate Begeman · 20 years ago
- 519f40b remove one more occurance of this that snuck in by Chris Lattner · 20 years ago
- c951d87 Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit by Chris Lattner · 20 years ago
- b882752 Fold shift by size larger than type size to undef by Nate Begeman · 20 years ago
- 9765c25 Implement setcc op, -1 sequences by Nate Begeman · 20 years ago
- 9f833d3 Implement bitfield clears Implement divide by negative power of two by Nate Begeman · 20 years ago
- c7bd482 Add recording variants of ISD::AND and ISD::OR. This kills almost 1000 by Nate Begeman · 20 years ago
- 709c806 Fix another fixme: factor out the constant fp generation code. by Nate Begeman · 20 years ago
- c5b1cd2 Fix 64 bit argument loading that straddles the args in regs / args on stack by Nate Begeman · 20 years ago
- 27499e3 Make sure that BRCOND branches can be converted into long branches too. by Nate Begeman · 20 years ago
- a0e3e94 Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod. by Nate Begeman · 20 years ago
- 706471e fix ISD::BRCONDTWOWAY codegen to not deference the end() iterator by Nate Begeman · 20 years ago
- 91277ea do not set the root to null if an argument is dead by Chris Lattner · 20 years ago
- cd08e4c Add rlwnm instruction for variable rotate by Nate Begeman · 20 years ago
- af4ab1b Optimize FSEL a bit for fneg arguments. This fixes the recently added test by Nate Begeman · 20 years ago
- 644db4e This target does not yet support ISD::BRCONDTWOWAY by Chris Lattner · 20 years ago
- e88aa5b 64b: Expand S/UREM by Nate Begeman · 20 years ago
- 7e7fadd Optimized code sequences for setcc reg, 0 by Nate Begeman · 20 years ago
- cbd06fc PowerPC zero extends setcc results by Chris Lattner · 20 years ago
- 7ddecb4 Pattern match bitfield insert, which helps shift long by immediate, among by Nate Begeman · 20 years ago
- 27b4c23 Fixed version of optimized integer divide is now fixed. Calculate the by Nate Begeman · 20 years ago
- 8f52980 Turn off the div -> mul optimization until it works correctly 100% of the time. by Nate Begeman · 20 years ago
- 815d6da Add support for MULHS and MULHU nodes by Nate Begeman · 20 years ago
- c8c5c8f Back out the previous change to SelectBranchCC, since there are cases it by Nate Begeman · 20 years ago
- 439b444 Rename canUseAsImmediateForOpcode to getImmediateForOpcode to better by Nate Begeman · 20 years ago
- 80196b1 Implement SDIV by power of 2 as srawi/addze rather than load imm, divw by Nate Begeman · 20 years ago
- 93075ec Pattern match fp mul-add, mul-sub, neg-mul-add, and neg-mul-sub by Nate Begeman · 20 years ago
- d860aa6 Make sure that arg regs used by the call instruction are marked as such, so by Nate Begeman · 20 years ago
- c3e2db4 i1 loads should also be from the low byte of the argument word. by Nate Begeman · 20 years ago
- e584668 Fix i64 return, fix CopyFromReg by Nate Begeman · 20 years ago
- 6644d4c Full varargs support. All of UnitTests now passes by Nate Begeman · 20 years ago
- 4ec0cbd Pass the correct value for the chain to the store by Nate Begeman · 20 years ago
- fa55470 Fix SHL_PARTS Start implementation of integer varargs by Nate Begeman · 20 years ago
- aa73a9f Keeping up with the Joneses. Implement not, nor, nand, and eqv by Nate Begeman · 20 years ago
- 27eeb00 Set shift amount to Extend by Nate Begeman · 20 years ago
- 43fdea0 This target doesn't support fabs/fneg yet. by Chris Lattner · 20 years ago
- 27523a1 Fix i64 returns Generate PowerPC 'subfic' instruction when appropriate by Nate Begeman · 20 years ago
- fc1b1da Add ISD::UNDEF node by Nate Begeman · 20 years ago
- 6cb2e1b Fix Olden/bh, CR0 was being set in the wrong order by Nate Begeman · 20 years ago
- 31318e4 Also apply Chris's fix to FP select and SETCC by Nate Begeman · 20 years ago
- 3071019 Move the selection of the arms of the select operation up to the conditional by Chris Lattner · 20 years ago
- a7e11a4 Fix stores to global addresses Fix calls with no arguments by Nate Begeman · 20 years ago
- 0473036 Support indexed loads and stores. This drops Shootout/matrix time from by Nate Begeman · 20 years ago
- 6b55997 Implement FP_TO_SINT and FP_TO_UINT by Nate Begeman · 20 years ago
- 6d369cc Add support for adding 0.0 and -0.0 to the constant pool, since we lie and by Nate Begeman · 20 years ago
- dffcfcc Factor out common code, support FP comparison in folded SetCC by Nate Begeman · 20 years ago
- 3e89716 fsel generation for f32 and f64 select by Nate Begeman · 20 years ago
- 96fc681 Pass the correct values to the chain argument for node construction during by Nate Begeman · 20 years ago
- 74d7345 Rewrite LowerCallTo and Select(ISD::CALL) to properly handle float varargs by Nate Begeman · 20 years ago
- fdcf341 Fix calls whose arguments fit entirely in registers to not break the Chain. by Nate Begeman · 20 years ago
- 58f718c Fix frame index code to generate legal PowerPC instructions. About half of by Nate Begeman · 20 years ago
- 01d0526 Fix external symbol printing in the AsmPrinter. Tell the ISel that we by Nate Begeman · 20 years ago
- 23afcfb Fix BranchCC (it's still dumb), and implement FP select (also dumb) by Nate Begeman · 20 years ago
- 7474786 Implement integer select and i1 sign extend by Nate Begeman · 20 years ago
- 3316252 Implement SetCC, fix ZERO_EXTEND_INREG by Nate Begeman · 20 years ago
- 848132d fix a warning in the optimized build by Chris Lattner · 20 years ago
- f3d08f3 Implement div, rem, and frameindex by Nate Begeman · 20 years ago
- f70b576 Pattern ISel: fix argument loading for i64s (thanks chris) by Nate Begeman · 20 years ago
- ca12a2b Remove fake instruction 'subc' (mnemonic for subfc). More pattern isel updates by Nate Begeman · 20 years ago
- 9db505c Implement proper loads and zero-extends of all types by Nate Begeman · 20 years ago
- 7532e2f Fix that pesky floats in integer regs problem by assigning the f32 type to by Nate Begeman · 20 years ago
- f7e4338 Get closer to having varargs working. There's still something strange by Nate Begeman · 20 years ago
- f262261 Make 64bit args and float args work correct with calls. Thanks to Chris by Nate Begeman · 20 years ago
- 307e744 Next round of pattern isel changes, mostly dealing with calls. by Nate Begeman · 20 years ago
- c7b09f1 Support global addresses and fix call returns. Varargs still aren't by Nate Begeman · 20 years ago
- 9e3e1b5 Implement next round of Pattern ISel fixes by Nate Begeman · 20 years ago
- 5e96661 Implement more of the PPC32 Pattern ISel: by Nate Begeman · 20 years ago
- 246fa63 Fix silly "no newline at end of file" warning by Chris Lattner · 20 years ago
- a9795f8 Addition of the PPC32 Pattern ISel. While it is far from complete, it will by Nate Begeman · 20 years ago