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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 1d159838a380d239fd280cb15e5a04c664f9cd61 / lib / Target
  1. 1d15983 add a deadargelim note. by Chris Lattner · 15 years ago
  2. 6d94926 This testcase is actually only partially redundant, and requires by Chris Lattner · 15 years ago
  3. 20ce7c0 this (and probably several others) are now done. by Chris Lattner · 15 years ago
  4. cc3d0eb Teach memdep to phi translate bitcasts. This allows us to compile by Chris Lattner · 15 years ago
  5. 5d5261c Teach basicaa that x|c == x+c when the c bits of x are clear. This by Chris Lattner · 15 years ago
  6. f6ac4d9 teach basicaa that A[i] != A[i+1]. by Chris Lattner · 15 years ago
  7. 9c6a0dc update some notes slightly by Chris Lattner · 15 years ago
  8. 308f663 Rollback changes r89516: Added two SubtargetFeatures::AddFeatures methods, which accept a comma-separated string or already parsed command line parameters as input, and some code re-factoring to use these new methods. by Viktor Kutuzov · 15 years ago
  9. de9b1da Tail duplicate indirect branches for PowerPC, too. by Bob Wilson · 15 years ago
  10. 1c3451f Avoid some possibly unsafe uses of StringRef::data(). by Benjamin Kramer · 15 years ago
  11. 65dbc90 Use StringRef (again) in DebugInfo interface. by Devang Patel · 15 years ago
  12. 4a66e5b Based on the testcase for pr3120, running on my MacPro with Xeon processors, by Bob Wilson · 15 years ago
  13. d71cebf Support PIC loading of constant pool entries by Bruno Cardoso Lopes · 15 years ago
  14. 5f9b9ef Sketch structure for X86 disassembler. by Daniel Dunbar · 15 years ago
  15. 37fd537 Use endianess dependent offsets for load/store of doubles when by Bruno Cardoso Lopes · 15 years ago
  16. 0106a0a Fix compiler warnings. by Dale Johannesen · 15 years ago
  17. 5f222b1 Only include in the callee saved regs the sub registers to avoid by Bruno Cardoso Lopes · 15 years ago
  18. 302525b Add proper emission of load/store double to stack slots for mips1 targets! by Bruno Cardoso Lopes · 15 years ago
  19. 7dbc610 Revert r89803. by Devang Patel · 15 years ago
  20. f8c4cfb Refactor target hook for tail duplication as requested by Chris. by Bob Wilson · 15 years ago
  21. f7801b4 Do not store R31 into the caller's link area on PPC. by Dale Johannesen · 15 years ago
  22. eac7917 Enable debug info for ppc-darwin. by Devang Patel · 15 years ago
  23. d7f0810 Enable predication of NEON instructions in Thumb2 mode. by Evan Cheng · 15 years ago
  24. b60d519 Make capitalization of names starting "is" more consistent. by Dale Johannesen · 15 years ago
  25. 9d172d5 Data type suffix must come after predicate. by Evan Cheng · 15 years ago
  26. 5cdc3a9 Materialize global addresses via movt/movw pair, this is always better by Anton Korobeynikov · 15 years ago
  27. 6935efc 80 column violations by Jim Grosbach · 15 years ago
  28. 108c838 * Move stub allocation inside the JITEmitter, instead of exposing a by Jeffrey Yasskin · 15 years ago
  29. 735afe1 Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used. by Dan Gohman · 15 years ago
  30. 0261d79 Allow more than one stub to be being generated at the same time. by Jeffrey Yasskin · 15 years ago
  31. f81bf15 Massive refactoring of NEON instructions. Separate opcode from data size specifier suffix, move \t up stream to instruction format, and fix more 80 column violations. by Evan Cheng · 15 years ago
  32. 77b02be move fconst[sd] to UAL. <rdar://7414913> by Jim Grosbach · 15 years ago
  33. da1aea4 Partially revert r84730 by removing N2VDup from ARMInstrFormats.td and modifying by Johnny Chen · 15 years ago
  34. 15e6ef8 fold immediate of a + Const into the user as a subtract if it can fit as a negated two-part immediate. by Jim Grosbach · 15 years ago
  35. b16ed11 Revert r84572 by removing N3VImm from ARMInstrFormats.td now that we can specify by Johnny Chen · 15 years ago
  36. 7ebd32a Partially revert r89377 by removing NLdStLN class definition from by Johnny Chen · 15 years ago
  37. 131c4a5 Make it clear that the index bit(s) of Vector Get Lane and Vector Set Lane by Johnny Chen · 15 years ago
  38. 7776452 Minor itinerary fixes for FP instructions. by David Goodwin · 15 years ago
  39. a37aa54 Move default FrameReg val to getFrameIndexReference(). Otherwise, debug info can get bogus values. by Jim Grosbach · 15 years ago
  40. 50f8516 Generate more correct debug info for frame indices. by Jim Grosbach · 15 years ago
  41. 1722f06 Minor optimization: when doing eq/ne comparions and RHS is a constant - swap operands, this will allow us to fold imm into comparison. by Anton Korobeynikov · 15 years ago
  42. ef4e604 Drop unsupported imm operands by Anton Korobeynikov · 15 years ago
  43. 3741be3 Use 2-byte alignment for functions. 4 bytes are clear overkill here. by Anton Korobeynikov · 15 years ago
  44. 3c97fc9 Use semicolon as assembler comment string by Anton Korobeynikov · 15 years ago
  45. 21ce2e3 Revert 89562. We're being sneakier than I was giving us credit for, and this by Jim Grosbach · 15 years ago
  46. f3b33d0 Darwin requires a frame pointer for all non-leaf functions to support correct by Jim Grosbach · 15 years ago
  47. ac0869d Add predicate operand to NEON instructions. Fix lots (but not all) 80 col violations in ARMInstrNEON.td. by Evan Cheng · 15 years ago
  48. bef8888 We are not using DBG_STOPPOINT anymore. by Devang Patel · 15 years ago
  49. 054b52c Added two SubtargetFeatures::AddFeatures methods, which accept a comma-separated string or already parsed command line parameters as input, and some code re-factoring to use these new methods. by Viktor Kutuzov · 15 years ago
  50. d9e05cd Fix a thinko that caused spurious @GOTOFFs. by Dan Gohman · 15 years ago
  51. 71a4196 Update for new getBlockAddress signature. by Dan Gohman · 15 years ago
  52. 29cbade Target-independent support for TargetFlags on BlockAddress operands, by Dan Gohman · 15 years ago
  53. b9e6b34 Recommitting PALIGNR shift width fixes. by Sean Callanan · 15 years ago
  54. 5ca1246 Remove an incorrect overaggressive optimization (PPC specific). by Dale Johannesen · 15 years ago
  55. 1bbf6d1 Reverting PALIGNR fix until I figure out how this broke the Clang testsuite. by Sean Callanan · 15 years ago
  56. 201dfa7 Fixed PALIGNR to take 8-bit rotations in all cases. by Sean Callanan · 15 years ago
  57. 4aedb61 Remat VLDRD from constpool. Clean up some instruction property specifications. by Evan Cheng · 15 years ago
  58. a956256 The verify() call of CPEIsInRange() isn't right for the assertion check of by Jim Grosbach · 15 years ago
  59. de8b1db Remove verifySizes() since it's not adding much value. by Jim Grosbach · 15 years ago
  60. 9b82425 Also CSE non-pic load from constant pools. by Evan Cheng · 15 years ago
  61. 9ef4835 Fix codegen of conditional move of immediates. We were not making use of the immediate forms of cmov instructions at all. by Evan Cheng · 15 years ago
  62. 0dde971 Update comment to reflect instruction. by Eric Christopher · 15 years ago
  63. 4d8e90a When placing constant islands and adjusting for alignment padding, inline by Jim Grosbach · 15 years ago
  64. 07ba906 Refactor cmov selection code out to a separate function. No functionality change. by Evan Cheng · 15 years ago
  65. fb7634f Reverting the EH table patches. by Bill Wendling · 15 years ago
  66. 5c376ff Added NLdStLN which is similar to NLdSt with the exception that op7_4 is not by Johnny Chen · 15 years ago
  67. dec6de9 fix typo by Jim Grosbach · 15 years ago
  68. 57474fa Fix a typo in a comment. by Dan Gohman · 15 years ago
  69. ed54de4 80 col violation. by Evan Cheng · 15 years ago
  70. 2ef9c8a More consistent thumb1 asm printing. by Evan Cheng · 15 years ago
  71. 5b397c9 Shrink ldr / str [sp, imm0-1024] to 16-bit instructions. by Evan Cheng · 15 years ago
  72. a64ce45 Eliminate more * 4 in Thumb1 asm printing for consistency sake. by Evan Cheng · 15 years ago
  73. 2045c47 - Add sugregister logic to handle f64=(f32,f32). by Bruno Cardoso Lopes · 15 years ago
  74. 0046de0 Only use small sections for non linux targets! by Bruno Cardoso Lopes · 15 years ago
  75. 01c6937 The "ReadOnlyWithRel" enum seems to apply more to what Darwin does with the EH by Bill Wendling · 15 years ago
  76. bea7df5 Add XCore support for indirectbr / blockaddress. by Richard Osborne · 15 years ago
  77. ec04458 Attempt #2: by Bill Wendling · 15 years ago
  78. e823db8 Added getDefaultSubtargetFeatures method to SubtargetFeatures class which returns a correct feature string for given triple. by Viktor Kutuzov · 15 years ago
  79. ebb5cb9 Add ARMv6 itineraries. by David Goodwin · 15 years ago
  80. a300300 Fix a few places that were missed when we converted to unified syntax. by Bob Wilson · 15 years ago
  81. 834b08a Add a target hook to allow changing the tail duplication limit based on the by Bob Wilson · 15 years ago
  82. 5eea342 The llvm-gcc front-end and the pass manager use two separate TargetData objects. by Bill Wendling · 15 years ago
  83. f04777b Enable arm jumpt table adjustment. by Jim Grosbach · 15 years ago
  84. bce3dbd Both Darwin as and GNU as violate ARM docs wrt printing of addrmode6 by Anton Korobeynikov · 15 years ago
  85. a9ea9ec Set Inst{15-12} (Rd/Rt) to 0b1111 (PC) for BR_JTadd, BR_JTr, and BR_JTm to by Johnny Chen · 15 years ago
  86. d15ac2f Re-apply 89011. It's not to be blamed. by Evan Cheng · 15 years ago
  87. 6db07ea Revert 89011. Buildbot thinks it might be breaking stuff. by Evan Cheng · 15 years ago
  88. a0a95a3 When moving a block for table jumps, make sure the prior block terminator by Jim Grosbach · 15 years ago
  89. 6cccc30 MOV64rm should be marked isReMaterializable. by Evan Cheng · 15 years ago
  90. 574186f A few more instructions that should be marked re-materializable. by Evan Cheng · 15 years ago
  91. 9d52e8d Set Rm bits of BX_RET to 0b1110 (R14); and set condition code bits of BRIND to by Johnny Chen · 15 years ago
  92. d1ba06b Make X86-64 in the Large model always emit 64-bit calls. by Jeffrey Yasskin · 15 years ago
  93. 600c043 - Check memoperand alignment instead of checking stack alignment. Most load / store folding instructions are not referencing spill stack slots. by Evan Cheng · 15 years ago
  94. 7bde297 Make the pass class name more explicit. by Jim Grosbach · 15 years ago
  95. 074fb02 make pass name a bit more clear by Jim Grosbach · 15 years ago
  96. 08cbda5 Simplify thumb2 jump table adjustments. Remove unnecessary calculation and by Jim Grosbach · 15 years ago
  97. 9249efe clarify comment by Jim Grosbach · 15 years ago
  98. b2e86bb back off for a bit. tracking down weirdness by Jim Grosbach · 15 years ago
  99. ca215e7 Analyze has to be before checking the condition, obviously. Properly construct an iterator for prior. by Jim Grosbach · 15 years ago
  100. add2076 Disable ldc1/sdc1 instructions for mips1 targets. by Bruno Cardoso Lopes · 15 years ago