1. 2320a44 Make SPU backend not assert on jump tables. by Kalle Raiskila · 15 years ago
  2. 34dcc6f Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it by Dan Gohman · 15 years ago
  3. 746ad69 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. by Evan Cheng · 15 years ago
  4. c7f3ace use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() by Chris Lattner · 15 years ago
  5. 93d6a7e Teach AnalyzeBranch, RemoveBranch and the branch by Dale Johannesen · 15 years ago
  6. 864e2ef Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of by Dan Gohman · 16 years ago
  7. 072a56e Remove Streams.h from the targets. by Benjamin Kramer · 16 years ago
  8. 23ed527 Remove unused member functions. by Eli Friedman · 16 years ago
  9. c23197a llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. by Torok Edwin · 16 years ago
  10. dac237e Implement changes from Chris's feedback. Finish converting lib/Target. by Torok Edwin · 16 years ago
  11. 2578ba2 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. by Evan Cheng · 16 years ago
  12. f2c3f6a Remember to set def-flag on register loaded from stack slot in CellSPU. by Jakob Stoklund Olesen · 16 years ago
  13. 587daed Change MachineInstrBuilder::addReg() to take a flag instead of a list of by Bill Wendling · 16 years ago
  14. 7ea02ff CellSPU: by Scott Michel · 16 years ago
  15. 6e1d147 CellSPU: by Scott Michel · 16 years ago
  16. 9735761 Factor out the code to add a MachineOperand to a MachineInstrBuilder. by Dan Gohman · 16 years ago
  17. 01b36e6 Remove non-DebugLoc versions of BuildMI from Alpha and Cell. by Dale Johannesen · 17 years ago
  18. 21b5541 Eliminate a couple of non-DebugLoc BuildMI variants. Modify callers. by Dale Johannesen · 17 years ago
  19. d1c321a Move debug loc info along when the spiller creates new instructions. by Bill Wendling · 17 years ago
  20. dc54d31 Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty by Evan Cheng · 17 years ago
  21. 770bcc7 Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. by Evan Cheng · 17 years ago
  22. 19c10e6 Untabify code. by Scott Michel · 17 years ago
  23. c9c8b2a CellSPU: by Scott Michel · 17 years ago
  24. d1e8d9c CellSPU: by Scott Michel · 17 years ago
  25. 04ee5a1 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. by Evan Cheng · 17 years ago
  26. 93c65c8 Fix off-by-one error in traversing an array; this fixes a test. by Misha Brukman · 17 years ago
  27. dd95009 CellSPU: by Scott Michel · 17 years ago
  28. 52d0001 CellSPU: by Scott Michel · 17 years ago
  29. 9bd7a37 - Make copyRegToReg use the "LR" assembler synonym for "OR". Makes finding by Scott Michel · 17 years ago
  30. 02d711b - Start moving target-dependent nodes that could be represented by an by Scott Michel · 17 years ago
  31. f0569be - Remove Tilmann's custom truncate lowering: it completely hosed over by Scott Michel · 17 years ago
  32. aedc637 CellSPU: by Scott Michel · 17 years ago
  33. c54baa2 Split foldMemoryOperand into public non-virtual and protected virtual by Dan Gohman · 17 years ago
  34. 9c0c6b2 CellSPU: by Scott Michel · 17 years ago
  35. cbad42c Add more const qualifiers. This fixes build breakage from r59540. by Dan Gohman · 17 years ago
  36. 8e8b8a2 Const-ify several TargetInstrInfo methods. by Dan Gohman · 17 years ago
  37. d735b80 Switch the MachineOperand accessors back to the short names like by Dan Gohman · 17 years ago
  38. 940f83e Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested by Owen Anderson · 17 years ago
  39. 8e5f2c6 Pool-allocation for MachineInstrs, MachineBasicBlocks, and by Dan Gohman · 17 years ago
  40. 9f1c831 - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. by Evan Cheng · 17 years ago
  41. eecfa36 Remove more iostream header includes. Needed to implement a "FlushStream" by Bill Wendling · 17 years ago
  42. 5e09da2 cell really does support cross-regclass moves, because R3 is in lots of different regclasses, and the code is not consistent when it comes to value tracking. by Chris Lattner · 17 years ago
  43. a59d469 Merge current work back to tree to minimize diffs and drift. Major highlights by Scott Michel · 17 years ago
  44. 5fd79d0 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. by Evan Cheng · 18 years ago
  45. 7f9ba9b More cleanups for CellSPU: by Scott Michel · 18 years ago
  46. cc8cd0c remove MachineOpCode typedef. by Chris Lattner · 18 years ago
  47. 43dbe05 Move even more functionality from MRegisterInfo into TargetInstrInfo. by Owen Anderson · 18 years ago
  48. f6372aa Move some more instruction creation methods from RegisterInfo into InstrInfo. by Owen Anderson · 18 years ago
  49. 6410552 Fix a problem where lib/Target/TargetInstrInfo.h would include and use by Chris Lattner · 18 years ago
  50. d10fd97 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the by Owen Anderson · 18 years ago
  51. 8aa797a Add new shorter predicates for testing machine operands for various types: by Chris Lattner · 18 years ago
  52. 9a1ceae Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm by Chris Lattner · 18 years ago
  53. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  54. 86c041f More working CellSPU tests: by Scott Michel · 18 years ago
  55. 170783a Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.ll by Scott Michel · 18 years ago
  56. 9999e68 Add new immed16.ll test case, fix CellSPU errata to make test case work. by Scott Michel · 18 years ago
  57. 504c369 - Restore some i8 functionality in CellSPU - New test case: nand.ll by Scott Michel · 18 years ago
  58. 2466c37 Updated source file headers to llvm coding standard. by Scott Michel · 18 years ago
  59. 6637752 More files in the CellSPU drop... by Scott Michel · 18 years ago