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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 25ad1cc32af8d526eb72893a513a486bc28c5106 / lib
  1. 25ad1cc Twinify GraphWriter a little bit. by Benjamin Kramer · 13 years ago
  2. d1bfc30 Check all overlaps when looking for used registers. by Jakob Stoklund Olesen · 13 years ago
  3. f4a5084 Make use of MachinePointerInfo::getFixedStack. by Jay Foad · 13 years ago
  4. 8c2e352 Remove some unnecessary includes of PseudoSourceValue.h. by Jay Foad · 13 years ago
  5. bf8356b Fix typo in comment. by Jay Foad · 13 years ago
  6. 978e0df Make use of MachinePointerInfo::getFixedStack. This removes all mention by Jay Foad · 13 years ago
  7. d9190c0 Remove some unnecessary includes of PseudoSourceValue.h. by Jay Foad · 13 years ago
  8. 44ec9fd Fix PR11370 for real. Prevents converting 256-bit FP instruction to AVX2 256-bit integer instructions when AVX2 isn't enabled. by Craig Topper · 13 years ago
  9. f178418 Set SeenStore to true to prevent loads from being moved; also eliminates a non-deterministic behavior. by Evan Cheng · 13 years ago
  10. 3273c89 Rather than trying to use the loop block sequence *or* the function by Chandler Carruth · 13 years ago
  11. 4c077a1 Properly qualify AVX2 specific parts of execution dependency table. Also enable converting between 256-bit PS/PD operations when AVX1 is enabled. Fixes PR11370. by Craig Topper · 13 years ago
  12. eaa192a Add vmov.f32 to materialize f32 immediate splats which cannot be handled by by Evan Cheng · 13 years ago
  13. bfc9429 ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions. by Jim Grosbach · 13 years ago
  14. e7c1aef Move WEAK marking to the declaration. by Nick Lewycky · 13 years ago
  15. c2ecf3e Break false dependencies before partial register updates. by Jakob Stoklund Olesen · 13 years ago
  16. 2947f73 Track register ages more accurately. by Jakob Stoklund Olesen · 13 years ago
  17. ec381a4 Fix linking for some users who already have tsan enabled code and are trying to by Nick Lewycky · 13 years ago
  18. dd47e0b ARM parsing datatype suffix variants for non-writeback VST1 instructions. by Jim Grosbach · 13 years ago
  19. e052b9a ARM parsing datatype suffix variants for non-writeback VLD1 instructions. by Jim Grosbach · 13 years ago
  20. 04db7f7 Add explanatory comment. by Jim Grosbach · 13 years ago
  21. 0530d0d Split out the plain '.{8|16|32|64}' suffix handling. by Jim Grosbach · 13 years ago
  22. ef44876 ARM parsing optional datatype suffix for VAND/VEOR/VORR instructions. by Jim Grosbach · 13 years ago
  23. 2c42b8c Supporting inline memmove isn't going to be worthwhile. The only way to avoid by Chad Rosier · 13 years ago
  24. ffc658b ARM VLDR/VSTR instructions don't need a size suffix. by Jim Grosbach · 13 years ago
  25. 8899024 Refactor capture tracking (which already had a couple flags for whether returns by Nick Lewycky · 13 years ago
  26. 909cb4f Add support for inlining small memcpys. rdar://10412592 by Chad Rosier · 13 years ago
  27. e489af8 Fix a performance regression from r144565. Positive offsets were being lowered by Chad Rosier · 13 years ago
  28. 02e3d92 ARM assembly parsing type suffix options for VLDR/VSTR. by Jim Grosbach · 13 years ago
  29. 8aee7d8 Avoid dereferencing off the beginning of lists. by Evan Cheng · 13 years ago
  30. 41e0017 At -O0, multiple uses of a virtual registers in the same BB are being marked by Evan Cheng · 13 years ago
  31. 4d0a9ff Add support for tsan annotations (thread sanitizer, a valgrind-based tool). by Nick Lewycky · 13 years ago
  32. 76c8f08 Add a missing pattern for X86ISD::MOVLPD. rdar://10436044 by Evan Cheng · 13 years ago
  33. 57b2997 Add support for Thumb load/stores with negative offsets. rdar://10412592 by Chad Rosier · 13 years ago
  34. 6296ee3 Unbreak Release builds. by Benjamin Kramer · 13 years ago
  35. 2a4410d Teach two-address pass to re-schedule two-address instructions (or the kill by Evan Cheng · 13 years ago
  36. a77214a Changed SSE4/AVX <2 x i64> extract and insert ops to be Custom lowered by Pete Cooper · 13 years ago
  37. b518cae Fold ConstantVector::isAllOnesValue into Constant::isAllOnesValue and simplify it. by Benjamin Kramer · 13 years ago
  38. 788dc0f 32-to-64-bit extended load. by Akira Hatanaka · 13 years ago
  39. 4961709 AnalyzeCallOperands function for N32/64. by Akira Hatanaka · 13 years ago
  40. bad53f4 Modify LowerFormalArguments to correctly handle vaarg arguments for Mips64. by Akira Hatanaka · 13 years ago
  41. a3f7e22 PTX: Let LLVM use loads/stores for all mem* intrinsics, instead of relying on custom implementations. by Justin Holewinski · 13 years ago
  42. 47a4ab8 Remove variable that keeps the size of area used to save byval or variable by Akira Hatanaka · 13 years ago
  43. f054e19 Fix early-clobber handling in shrinkToUses. by Jakob Stoklund Olesen · 13 years ago
  44. 96b685b Disable generation of compact unwind encodings. <rdar://problem/10441578> by Bob Wilson · 13 years ago
  45. 430052b Tidy up. 80 column. by Jim Grosbach · 13 years ago
  46. aa5354c Make headers standalone, move a virtual method out of line. by Benjamin Kramer · 13 years ago
  47. f5e47ac It helps to deallocate memory as well as allocate it. =] This actually by Chandler Carruth · 13 years ago
  48. bc83fcd Remove an over-eager assert that was firing on one of the ARM regression by Chandler Carruth · 13 years ago
  49. fa97658 Begin chipping away at one of the biggest quadratic-ish behaviors in by Chandler Carruth · 13 years ago
  50. 340d596 Under the hood, MBPI is doing a linear scan of every successor every by Chandler Carruth · 13 years ago
  51. c4e1562 Reuse the logic in getEdgeProbability within getHotSucc in order to by Chandler Carruth · 13 years ago
  52. 2770c14 Fix an overflow bug in MachineBranchProbabilityInfo. This pass relied on by Chandler Carruth · 13 years ago
  53. dcce244 Add AVX2 version of instructions to load folding tables. Also add a bunch of missing SSE/AVX instructions. by Craig Topper · 13 years ago
  54. 3426a3e Add neverHasSideEffects, mayLoad, and mayStore to many patternless SSE/AVX instructions. Remove MMX check from LowerVECTOR_SHUFFLE since MMX vector types won't go through it anyway. by Craig Topper · 13 years ago
  55. dc9205d Add support for ARM halfword load/stores and signed byte loads with negative by Chad Rosier · 13 years ago
  56. 194eb71 Use getVNInfoBefore() when it makes sense. by Jakob Stoklund Olesen · 13 years ago
  57. b5856c8 Teach machine block placement to cope with unnatural loops. These don't by Chandler Carruth · 13 years ago
  58. 6c9cc21 Use kill slots instead of the previous slot in shrinkToUses. by Jakob Stoklund Olesen · 13 years ago
  59. c0f05b3 Cleanup some 80-columns violations and poor formatting. These snuck by by Chandler Carruth · 13 years ago
  60. 1f81e31 Terminate all dead defs at the dead slot instead of the 'next' slot. by Jakob Stoklund Olesen · 13 years ago
  61. d14614e Simplify early clobber slots a bit. by Jakob Stoklund Olesen · 13 years ago
  62. 10252db Enhance the assertion mechanisms in place to make it easier to catch by Chandler Carruth · 13 years ago
  63. 2debd48 Rename SlotIndexes to match how they are used. by Jakob Stoklund Olesen · 13 years ago
  64. e6a6277 Add BLSI, BLSMSK, and BLSR to getTargetNodeName. by Craig Topper · 13 years ago
  65. 6527ecc Teach MBP to force-merge layout successors for blocks with unanalyzable by Chandler Carruth · 13 years ago
  66. f3fc005 Hoist another gross nested loop into a helper method. by Chandler Carruth · 13 years ago
  67. 729bec8 Add a missing doxygen comment for a helper method. by Chandler Carruth · 13 years ago
  68. 9fd4e05 Hoist a nested loop into its own method. by Chandler Carruth · 13 years ago
  69. df23435 Rewrite #3 of machine block placement. This is based somewhat on the by Chandler Carruth · 13 years ago
  70. 9eb6748 The order in which the predicate is added differs between Thumb and ARM mode. Fix predicate when in ARM mode and restore SelectIntrinsicCall. by Chad Rosier · 13 years ago
  71. a517ab1 Temporarily disable SelectIntrinsicCall when in ARM mode. This is causing failures. by Chad Rosier · 13 years ago
  72. 5be833d Fix comments. by Chad Rosier · 13 years ago
  73. b29b950 Add support for emitting both signed- and zero-extend loads. Fix by Chad Rosier · 13 years ago
  74. 569561c Prune more RALinScan. RALinScan was also here! by NAKAMURA Takumi · 13 years ago
  75. 0cb80d9 More dead code elimination in VirtRegMap. by Jakob Stoklund Olesen · 13 years ago
  76. cb39064 Stop tracking spill slot uses in VirtRegMap. by Jakob Stoklund Olesen · 13 years ago
  77. 3cb0b0e Remove dead code and data from VirtRegMap. by Jakob Stoklund Olesen · 13 years ago
  78. 929e4da Stop tracking unused registers in VirtRegMap. by Jakob Stoklund Olesen · 13 years ago
  79. 334575e Remove the -color-ss-with-regs option. by Jakob Stoklund Olesen · 13 years ago
  80. 6e49be7 Delete VirtRegRewriter. by Jakob Stoklund Olesen · 13 years ago
  81. c3f2722 Switch PBQP to VRM's trivial rewriter. by Jakob Stoklund Olesen · 13 years ago
  82. f5eeaf2 Delete the old spilling framework from LiveIntervalAnalysis. by Jakob Stoklund Olesen · 13 years ago
  83. 5d9b109 Delete the 'standard' spiller with used the old spilling framework. by Jakob Stoklund Olesen · 13 years ago
  84. cfa8101 Switch PBQP to the modern InlineSpiller framework. by Jakob Stoklund Olesen · 13 years ago
  85. 799c1ed Delete the linear scan register allocator. by Jakob Stoklund Olesen · 13 years ago
  86. 7be5dfd Add more AVX2 shift lowering support. Move AVX2 variable shift to use patterns instead of custom lowering code. by Craig Topper · 13 years ago
  87. d7ecff4 Don't try to loop on iterators that are potentially invalidated inside the loop. Fixes PR11361! by Nick Lewycky · 13 years ago
  88. 7386612 Fix typo. by Akira Hatanaka · 13 years ago
  89. 6df3e7b Implement Mips64's handling of byval arguments in LowerCall. by Akira Hatanaka · 13 years ago
  90. afe153c Fixed the MCJIT so that it can emit not only instance by Sean Callanan · 13 years ago
  91. 3a5257d Implement Mips64's handling of byval arguments in LowerFormalArguments. by Akira Hatanaka · 13 years ago
  92. deab22a 64-bit arbitrary immediate pattern. by Akira Hatanaka · 13 years ago
  93. 2c5d652 Function for handling byval arguments. by Akira Hatanaka · 13 years ago
  94. b8ebca8 build: Attempt to rectify inconsistencies between CMake and LLVMBuild versions of explicit dependencies. by Daniel Dunbar · 13 years ago
  95. 75f69e3 Make sure scalarrepl picks the correct alloca when it rewrites a bitcast. Fixes PR11353. by Eli Friedman · 13 years ago
  96. d1ac3a4 The dwarf standard says that the only differences between a out-of-line by Rafael Espindola · 13 years ago
  97. 9588c10 ARM refactor simple immediate asm operand render methods. by Jim Grosbach · 13 years ago
  98. 5018524 Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029. by Eli Friedman · 13 years ago
  99. 742c4ba Re-apply 144430, this time with the associated isel and disassmbler bits. by Jim Grosbach · 13 years ago
  100. 0e3642a Some cleanup and bulletproofing for node replacement in LegalizeDAG. To maintain LegalizeDAG invariants, whenever we a node is replaced, we must attempt to delete it, and if it still by Eli Friedman · 13 years ago