- 9fa200d remove a bogus pattern, which had the same pattern as STDU by Chris Lattner · 15 years ago
- 9f03641 Eliminate some uses of immAllOnes, just use -1, it does by Chris Lattner · 15 years ago
- 3a84dae Add support for calls through function pointers in the 64-bit PowerPC SVR4 ABI. by Tilmann Scheller · 16 years ago
- 3d90dbe Add PowerPC codegen for indirect branches. by Bob Wilson · 16 years ago
- 533297b Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a by Dan Gohman · 16 years ago
- 8dffc81 Model the carry bit on ppc32. Without this we could by Dale Johannesen · 16 years ago
- 6b16eff Add support for the PowerPC 64-bit SVR4 ABI. by Tilmann Scheller · 16 years ago
- 2a9ddfb Refactor ABI code in the PowerPC backend. by Tilmann Scheller · 16 years ago
- 15511cf Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. by Dan Gohman · 17 years ago
- 41474ba Add a sanity-check to tablegen to catch the case where isSimpleLoad by Dan Gohman · 17 years ago
- b384ab9 Add a RM pseudoreg for the rounding mode, which by Dale Johannesen · 17 years ago
- 639076f Mark defs and uses of CTR and LR correctly. by Dale Johannesen · 17 years ago
- f5aeb1a Rename ConstantSDNode::getValue to getZExtValue, for consistency by Dan Gohman · 17 years ago
- bdab93a Implement 32 & 64 bit versions of PPC atomic binary primitives. by Dale Johannesen · 17 years ago
- 140a8bb Remove PPC-specific lowering for atomics; the generic stuff works fine. by Dale Johannesen · 17 years ago
- 5f0cfa2 Rewrite ppc code generated for __sync_{bool|val}_compare_and_swap by Dale Johannesen · 17 years ago
- 5330192 Implement llvm.atomic.cmp.swap.i32 on PPC. Patch by Gary Benson! by Evan Cheng · 17 years ago
- 30e62c0 Tail call optimization improvements: by Arnold Schwaighofer · 17 years ago
- 8608f2e 64-bit atomic operations. by Evan Cheng · 17 years ago
- da47e6e Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. by Evan Cheng · 17 years ago
- af8ee84 Add support for ppc64 shifts with 7-bit (oversized) shift amount (e.g. PPCshl). by Chris Lattner · 17 years ago
- 834f1ce rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. by Chris Lattner · 18 years ago
- 2e48a70 rename isStore -> mayStore to more accurately reflect what it captures. by Chris Lattner · 18 years ago
- c8478d8 Change the 'isStore' inferrer to look for 'SDNPMayStore' by Chris Lattner · 18 years ago
- 9c9fbf8 remove some isStore flags that are now inferred automatically. by Chris Lattner · 18 years ago
- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
- 152b7e1 Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with right callee-saved defs set for ppc64. by Evan Cheng · 18 years ago
- 071a279 Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. by Evan Cheng · 18 years ago
- 67c906d Fix for PR1613: added 64-bit rotate left PPC instructions and patterns. by Evan Cheng · 18 years ago
- caf778a Some out operands were incorrectly specified as input operands. by Evan Cheng · 18 years ago
- ffbacca No more noResults. by Evan Cheng · 18 years ago
- d5f181a Oops. These stores actually produce results. by Evan Cheng · 18 years ago
- 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 18 years ago
- ccde4cb add support for 128-bit add/sub on ppc64 by Chris Lattner · 18 years ago
- ec58d9f The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules by Nicolas Geoffray · 18 years ago
- ef3c030 The ELF ABI specifies F1-F8 registers as argument registers for double, not by Nicolas Geoffray · 18 years ago
- b6ead97 Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll by Chris Lattner · 18 years ago
- 63f8fb1 Differentiate between the MachO and the ELF ABI the CALL instruction. by Nicolas Geoffray · 18 years ago
- 1fa3d9e one important bugfix: PPC32 didn't have both elf and macho support for by Chris Lattner · 18 years ago
- 9f0bc65 implement support for the linux/ppc function call ABI. Patch by by Chris Lattner · 18 years ago
- ba74cdf Patterns no longer needed due to fix in the DAG combiner. by Jim Laskey · 19 years ago
- 3522355 Not all test cases are created equal. This fix is needed. by Jim Laskey · 19 years ago
- 182a5ac Not needed. Misinterpreted error message from other bug (Missing load/store by Jim Laskey · 19 years ago
- c4a81dc Provide 64-bit support for i64 sextload<i8>. by Jim Laskey · 19 years ago
- 78f97f3 Reduce number of instructions to load 64-bit constants. by Jim Laskey · 19 years ago
- 94c96cc implement sextinreg i8->i64 and i16->i64 by Chris Lattner · 19 years ago
- 2f616bf by Jim Laskey · 19 years ago
- 1b0a2d8 fix a regression that I introduced. stdu should scale the offset by 4 by Chris Lattner · 19 years ago
- 80df01d add ppc64 r+i stores with update. by Chris Lattner · 19 years ago
- 8e28b5c Stop using isTwoAddress, switching to operand constraints instead. by Chris Lattner · 19 years ago
- 0851b4f fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri by Chris Lattner · 19 years ago
- 5e14b82 Fix the PPC regressions last night by Chris Lattner · 19 years ago
- 6a5339b Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls by Chris Lattner · 19 years ago
- a94a203 implement proper PPC64 prolog/epilog codegen. by Chris Lattner · 19 years ago
- d181c01 Mark operands as symbol lo instead of imm32 so that they print lo(x) around by Chris Lattner · 19 years ago
- 94e509c implement preinc support for r+i loads on ppc64 by Chris Lattner · 19 years ago
- 8b2794a Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. by Evan Cheng · 19 years ago
- 466685d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 19 years ago
- 7c395ad Shift amounts are always 32-bits, even in 64-bit mode. This fixes by Chris Lattner · 19 years ago
- 303c695 Make the implicit def instructions look like other instrs. by Chris Lattner · 19 years ago
- 518f9c7 Add missing PPC64 extload/truncstores by Chris Lattner · 19 years ago
- cccef1c Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :) by Chris Lattner · 19 years ago
- e4172be Add a pattern for i64 sra. Print 8-byte units with a space between the .quad by Chris Lattner · 19 years ago
- 2e6b77d Add 64-bit MTCTR so that indirect calls work. by Chris Lattner · 19 years ago
- 1fd8110 Fix an incorrect store pattern. This fixes em3d. by Chris Lattner · 19 years ago
- 563ecfb Implement 64-bit undef, sub, shl/shr, srem/urem by Chris Lattner · 19 years ago
- 00659b1 Add zextload from i32 -> i64, with this, perimeter works. by Chris Lattner · 19 years ago
- 041e9d3 Rearrange compares, add ADDI8, add sext from 32-to-64 bit register by Chris Lattner · 19 years ago
- b410dc9 Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file by Chris Lattner · 19 years ago
- f2c5bca add some logical ops by Chris Lattner · 19 years ago
- 3ae5eef Add some more immediate patterns. This allows us to compile: by Chris Lattner · 19 years ago
- eded521 Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is by Chris Lattner · 19 years ago
- 0ea70b2 Add some 64-bit logical ops. by Chris Lattner · 19 years ago
- f27bb6d Add some patterns for globals, so we can now compile this: by Chris Lattner · 19 years ago
- 047854f Add some patterns for ppc64 by Chris Lattner · 19 years ago
- a24b761 Upgrade some load/store instructions to use the proper addressing mode stuff. by Chris Lattner · 19 years ago
- 059ca0f fix some assumptions that pointers can only be 32-bits. With this, we can by Chris Lattner · 19 years ago
- 956f43c Split 64-bit instructions out into a separate .td file by Chris Lattner · 19 years ago