- 2824a65 Fix PR3391 and PR3864. Reg allocator infinite looping. by Evan Cheng · 15 years ago
- 49c8aa0 Convert VirtRegMap to a MachineFunctionPass. by Owen Anderson · 15 years ago
- 1ed5b71 Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. No (intended) functionality change. by Owen Anderson · 15 years ago
- 04ee5a1 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. by Evan Cheng · 16 years ago
- d0deec2 Make linear scan's trivial coalescer slightly more aggressive. by Evan Cheng · 16 years ago
- d68a076 Tidy up #includes, deleting a bunch of unnecessary #includes. by Dan Gohman · 16 years ago
- 5489893 - More pre-split fixes: spill slot live interval computation bug; restore point bug. by Evan Cheng · 16 years ago
- d0e32c5 - Rewrite code that update register live interval that's split. by Evan Cheng · 16 years ago
- f5cd4f0 Committing a good chunk of the pre-register allocation live interval splitting pass. It's handling simple cases and appear to do good things. Next: avoid splitting an interval multiple times; renumber registers when possible; record stack slot live intervals for coloring; rematerialize defs when possible. by Evan Cheng · 16 years ago
- b8cab92 Fix command-line option printing to print two spaces where needed, by Dan Gohman · 16 years ago
- 95dad83 Add an option to enable StrongPHIElimination, for ease of testing. by Owen Anderson · 16 years ago
- dc37786 Re-apply 56835 along with header file changes. by Evan Cheng · 16 years ago
- 46292be Revert commit 56835 since it breaks the build. by Duncan Sands · 16 years ago
- d41474d If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. by Evan Cheng · 16 years ago
- 86b49f8 Next round of earlyclobber handling. Approach the by Dale Johannesen · 16 years ago
- 34d8f75 Teach coalescer about earlyclobber bits. Check bits for preferred register. by Dale Johannesen · 16 years ago
- 5e8d9de Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. by Evan Cheng · 16 years ago
- d6bd733 Make earlyclobber stuff work when virtual regs by Dale Johannesen · 16 years ago
- fa48f94 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis by Dale Johannesen · 16 years ago
- 841ee1a Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. by Evan Cheng · 16 years ago
- 91aac10 Add a bit to mark operands of asm's that conflict by Dale Johannesen · 16 years ago
- 5530216 Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. by Evan Cheng · 16 years ago
- ae73dc1 Tidy up several unbeseeming casts from pointer to intptr_t. by Dan Gohman · 16 years ago
- cd1dcbd Convert several std::vectors over to SmallVector, and use reserve() as appropriate for cases where std::vector is still used. by Owen Anderson · 16 years ago
- 9738216 Get rid of a use of std::map. by Owen Anderson · 16 years ago
- 03857b2 Make the allocation of LiveIntervals explicit, rather than holding them in the r2iMap_ by value. This will prevent references to them from being invalidated by Owen Anderson · 16 years ago
- 496bac5 Fix a compile-time regression introduced by my heuristic-changing patch. I forgot by Owen Anderson · 16 years ago
- a1566f2 Change the heuristics used in the coalescer, register allocator, and within by Owen Anderson · 16 years ago
- 51cd9d6 A brief survey of priority_queue usage in the tree turned this up by Dan Gohman · 16 years ago
- 3e17225 Enhanced heuristic to determine the *best* register to spill. Instead of picking the register with the lowest spill weight. Consider (up to) 2 additional registers with spill weights that are close to the lowest spill weight. The one with fewest defs and uses that conflicts with the current interval (weighted by loop depth) is the spill candidate. by Evan Cheng · 16 years ago
- 9c3c221 Refine stack slot interval weight computation. by Evan Cheng · 16 years ago
- 3f32d65 Add a stack slot coloring pass. Not yet enabled. by Evan Cheng · 16 years ago
- f2b24ca Do not add empty live intervals to handled_. They should never be undone for backtracking. by Evan Cheng · 16 years ago
- f30a49d Special handling of zero-sized live intervals. by Evan Cheng · 16 years ago
- af8c563 Add an assertion to catch register of illegal class. by Evan Cheng · 16 years ago
- c438f35 Undo tweak. It had no obvious benefit. by Evan Cheng · 16 years ago
- 676dd7c When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. by Evan Cheng · 16 years ago
- 524f961 Temporarily revert 48175. by Evan Cheng · 16 years ago
- a341380 If the register allocator ran out of registers, just abort for now. by Evan Cheng · 16 years ago
- fe42462 Use a smallvector for inactiveCounts and initialize it lazily by Chris Lattner · 16 years ago
- e6d088a Rename PrintableName to Name. by Bill Wendling · 16 years ago
- 74ab84c Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool by Bill Wendling · 16 years ago
- 4aefd6b Fix newly-introduced 4.3 warnings by Anton Korobeynikov · 16 years ago
- 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 16 years ago
- 67d65bb Don't recalculate the loop info and loop dominators analyses if they're by Bill Wendling · 17 years ago
- 84bc542 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea by Chris Lattner · 17 years ago
- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
- 22f07ff Switch over to MachineLoopInfo. by Evan Cheng · 17 years ago
- 81a0382 Live interval splitting: by Evan Cheng · 17 years ago
- 5b8318a Adding debug output during coalescing. by Bill Wendling · 17 years ago
- 87075ca Need to increment the iterator. by Bill Wendling · 17 years ago
- f2fbca6 Refactor some code. by Evan Cheng · 17 years ago
- 9aeaf75 If an interval is being undone clear its preference as well since the source interval may have been undone as well. by Evan Cheng · 17 years ago
- c92da38 There are times when the coalescer would not coalesce away a copy but the copy by Evan Cheng · 17 years ago
- a5bfc97 Apply Chris' suggestions. by Evan Cheng · 17 years ago
- 3f4b80e Clean up code that calculate MBB live-in's. by Evan Cheng · 17 years ago
- 11923cc Some clean up. by Evan Cheng · 17 years ago
- 10136e7 Some clean up. by Evan Cheng · 17 years ago
- 2c17c4d by David Greene · 17 years ago
- 549f27d3 Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized. by Evan Cheng · 17 years ago
- 2513330 Factor live variable analysis so it does not do register coalescing by David Greene · 17 years ago
- e23e00d Change names from RA to something unique to get rid of naming conflicts with by Bill Wendling · 17 years ago
- 1997473 Drop 'const' by Devang Patel · 17 years ago
- 3e15bf3 Use 'static const char' instead of 'static const int'. by Devang Patel · 17 years ago
- 794fd75 Do not use typeinfo to identify pass in pass manager. by Devang Patel · 17 years ago
- 6c087e5 Match MachineFunction::UsedPhysRegs changes. by Evan Cheng · 17 years ago
- 92efbfc Clean up. by Evan Cheng · 17 years ago
- 20b0abc Copy coalescing change to prevent a physical register from being pin to a by Evan Cheng · 17 years ago
- 2638e1a First cut trivial re-materialization support. by Evan Cheng · 17 years ago
- bc025fb Only add liveinterval to livein set if it isn't assigned a stack slot. by Evan Cheng · 17 years ago
- b371f45 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. by Evan Cheng · 17 years ago
- a284cbf For PR1207: by Reid Spencer · 17 years ago
- e1fd682 Do not add livein's to entry MBB twice. by Evan Cheng · 17 years ago
- 9fc508f Add live-ins to every BB. by Evan Cheng · 17 years ago
- cd3245a Eliminate static ctors from Statistics by Chris Lattner · 18 years ago
- ac0b6ae Detemplatize the Statistic class. The only type it is instantiated with by Chris Lattner · 18 years ago
- 4c7e227 eliminate fp statistic by Chris Lattner · 18 years ago
- 97af751 Unbreak VC++ build. by Jeff Cohen · 18 years ago
- 54fcc7f Replace std::cerr uses of the "DEBUG" macro with "DOUT" instead. Removes by Bill Wendling · 18 years ago
- d6c3422 Remove redundant <cmath>. by Jim Laskey · 18 years ago
- 7902c75 Use correct value for float HUGH_VAL. by Jim Laskey · 18 years ago
- e719d9f LinearScanner hotspot. by Jim Laskey · 18 years ago
- a4f0b3a s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| by Chris Lattner · 18 years ago
- eb577ba Final polish on machine pass registries. by Jim Laskey · 18 years ago
- 13ec702 Introducing plugable register allocators and instruction schedulers. by Jim Laskey · 18 years ago
- ed41f1b Reduce number of exported symbols by Andrew Lenharth · 18 years ago
- f8c68f6 Shave another 27K off libllvmgcc.dylib with visibility hidden by Chris Lattner · 18 years ago
- 3b6d56c If the register allocator cannot find a register to spill, try the aliases. If by Evan Cheng · 18 years ago
- 5d02eaf Backing out previous check-in. by Evan Cheng · 18 years ago
- 1f30019 If the live interval legnth is essentially zero, i.e. in every live range by Evan Cheng · 18 years ago
- c8e2c55 Add some comments. by Chris Lattner · 18 years ago
- ffab422 Code cleanups, no functionality change by Chris Lattner · 18 years ago
- 2c2c6c6 Add explicit #includes of <iostream> by Chris Lattner · 19 years ago
- 3005961 HB is *the* code janitor. by Duraid Madina · 19 years ago
- e0b632a I think I know what you meant here, but just to be safe I'll let you do it. :) by Duraid Madina · 19 years ago
- ac28fbd Add section switching to common code generator code. Add a couple of asserts. by Chris Lattner · 19 years ago
- 3c3fe46 Expose the LiveInterval interfaces as public headers. by Chris Lattner · 19 years ago
- e836ad6 When checking the fixed intervals, don't forget to check for register aliases. by Chris Lattner · 19 years ago
- b980578 Keep track of which registers are related to which other registers. by Chris Lattner · 19 years ago
- a411cbc Try to avoid scanning the fixed list. On architectures with a non-stupid by Chris Lattner · 19 years ago