1. 2a6411b Reduce code duplication on the TLS implementation. by Rafael Espindola · 16 years ago
  2. 523249f remove unused arguments. by Rafael Espindola · 16 years ago
  3. 4d95232 X86 address mode isel tweak. If the base of the address is also used by a CopyToReg (i.e. it's likely live-out), do not fold the sub-expressions into the addressing mode to avoid computing the address twice. The CopyToReg use will be isel'ed to a LEA, re-use it for address instead. by Evan Cheng · 16 years ago
  4. 73f24c9 When optimzing a mul by immediate into two, the resulting mul's should get a x86 specific node to avoid dag combiner from hacking on them further. by Evan Cheng · 16 years ago
  5. a0a4f07 Use array_lengthof by Rafael Espindola · 16 years ago
  6. e4d5d34 Use less hard coded constants to make the code less brittle. by Rafael Espindola · 16 years ago
  7. 9a49d31 Don't forego folding of loads into 64-bit adds when the other by Dan Gohman · 16 years ago
  8. 77502c9 Enhance address-mode folding of ISD::ADD to handle cases where the by Dan Gohman · 16 years ago
  9. 8d13f8f Remove non-DebugLoc versions of BuildMI from X86. by Dale Johannesen · 16 years ago
  10. 1823c92 fix the X86 backend to just drop llvm.declare nodes for VLAs instead of by Chris Lattner · 16 years ago
  11. 6f38cb6 Use getDebugLoc forwarder instead of getNode()->getDebugLoc. by Dale Johannesen · 16 years ago
  12. 2d0a1cc Refactor some repeated logic into a separate function. by Dan Gohman · 16 years ago
  13. ed2eee6 Get rid of one more non-DebugLoc getNode and by Dale Johannesen · 16 years ago
  14. dd64c41 Patch up omissions in DebugLoc propagation. by Dale Johannesen · 16 years ago
  15. d839254 DebugLoc propgation by Dale Johannesen · 16 years ago
  16. c03e9a1 Simplify findNonImmUse; return the result using the return value by Dan Gohman · 16 years ago
  17. e8ecf48 Eliminate unnecessary operands-list traversals. by Dan Gohman · 16 years ago
  18. 5b2e589 Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start. by Evan Cheng · 16 years ago
  19. 1ef4d8f Fix a recent regression. ClrOpcode is not set for i8; for i8, if by Dan Gohman · 16 years ago
  20. 2722e7b DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it. by Evan Cheng · 16 years ago
  21. 8e27826 Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode. by Evan Cheng · 16 years ago
  22. 79ce276 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph by Dan Gohman · 16 years ago
  23. f2accb5 80 col violation. by Evan Cheng · 16 years ago
  24. 6bb14ca Some code clean up. by Evan Cheng · 16 years ago
  25. 884c70c On x86 favors folding short immediate into some arithmetic operations (e.g. add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size. by Evan Cheng · 16 years ago
  26. bc5cbb8 Move the code that inserts X87 FP_REG_KILL instructions from a by Dan Gohman · 16 years ago
  27. 27cae7b The 32-bit displacement field in an x86 address is signed. Arrange for it by Dan Gohman · 16 years ago
  28. 8be6bbe Eliminate the ISel priority queue, which used the topological order for a by Dan Gohman · 16 years ago
  29. f6503a0 The ANDMask node folds to a constant, and isn't the node that needs to by Dan Gohman · 16 years ago
  30. 8ad4c00 by David Greene · 16 years ago
  31. 6520e20 Teach DAGCombine to fold constant offsets into GlobalAddress nodes, by Dan Gohman · 16 years ago
  32. f522068 Trim #includes. by Dan Gohman · 16 years ago
  33. 552e3be Fix indentation. by Evan Cheng · 16 years ago
  34. 7b8e964 When doing the very-late shift-and address-mode optimization, by Dan Gohman · 16 years ago
  35. e76225a It is possible that all functions in one module are not being by Devang Patel · 16 years ago
  36. 880ae36 Make atomic Swap work, 64-bit on x86-32. Make it all work in non-pic mode. by Dale Johannesen · 16 years ago
  37. 1b54c7f Pass MemOperand through for 64-bit atomics on 32-bit, by Dale Johannesen · 16 years ago
  38. da8ac5f Avoid creating two TargetLowering objects for each target. by Dan Gohman · 16 years ago
  39. 38217fe Remove an unused field. by Dan Gohman · 16 years ago
  40. d735b80 Switch the MachineOperand accessors back to the short names like by Dan Gohman · 16 years ago
  41. 48c1bc2 Handle some 64-bit atomics on x86-32, some of the time. by Dale Johannesen · 16 years ago
  42. 4ae641f Remove OptimizeForSize global. Use function attribute optsize. by Devang Patel · 16 years ago
  43. f06c835 Optimize SelectionDAG's AssignTopologicalOrder even further. by Dan Gohman · 16 years ago
  44. 57c3dac Move the GlobalBaseReg field out of X86ISelDAGToDAG.cpp by Dan Gohman · 16 years ago
  45. 02a4da2 Unbreak build. by Daniel Dunbar · 16 years ago
  46. b7a75a5 Implement "punpckldq %xmm0, $xmm0" as "pshufd $0x50, %xmm0, %xmm" unless optimizing for code size. by Evan Cheng · 16 years ago
  47. 7810bfe Rename ConstantSDNode's getSignExtended to getSExtValue, for by Dan Gohman · 16 years ago
  48. 97135e1 Factor out the code for determining when symblic addresses by Dan Gohman · 16 years ago
  49. da43bcf Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc. by Evan Cheng · 16 years ago
  50. fe29e77 Delete an unused function. by Dan Gohman · 16 years ago
  51. 8b74696 Move the code for initializing the global base reg out of by Dan Gohman · 16 years ago
  52. 682d5a8 Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and draw by Dan Gohman · 16 years ago
  53. 056292f Reverting r56249. On further investigation, this functionality isn't needed. by Bill Wendling · 16 years ago
  54. 9468a9b - Change "ExternalSymbolSDNode" to "SymbolSDNode". by Bill Wendling · 16 years ago
  55. f5aeb1a Rename ConstantSDNode::getValue to getZExtValue, for consistency by Dan Gohman · 16 years ago
  56. 93c53e5 fix a bunch of 80-col violations by Gabor Greif · 16 years ago
  57. ba36cb5 erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics by Gabor Greif · 16 years ago
  58. 99a6cb9 disallow direct access to SDValue::ResNo, provide a getter instead by Gabor Greif · 16 years ago
  59. ab6c3bb Try approach to moving call address load inside of callseq_start. Now it's done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot. by Evan Cheng · 16 years ago
  60. f350b27 Move the point at which FastISel taps into the SelectionDAGISel by Dan Gohman · 16 years ago
  61. ad3460c Simplify SelectRoot's interface, and factor out some common code by Dan Gohman · 16 years ago
  62. 0bfa1bf Move the handling of ANY_EXTEND, SIGN_EXTEND_INREG, and TRUNCATE by Dan Gohman · 16 years ago
  63. 0ac3fc2 Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return junk in higher bits. Patch by Nate Begeman. by Evan Cheng · 16 years ago
  64. ea9587b Oops, check in these files too, for the FastISel -> Fast rename. by Dan Gohman · 16 years ago
  65. 50dd1d0 Some fixes for x86-64 JIT. Make it use small code by Dale Johannesen · 16 years ago
  66. 475871a Rename SDOperand to SDValue. by Dan Gohman · 16 years ago
  67. 8968450 Tidy SDNode::use_iterator, and complete the transition to have it by Dan Gohman · 16 years ago
  68. 462dc7f Add titles to the various SelectionDAG viewGraph calls by Dan Gohman · 16 years ago
  69. e8be6c6 Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk by Dan Gohman · 16 years ago
  70. 2fbdf0e Fix the result type of X86's truncate to i8. by Dan Gohman · 16 years ago
  71. 4576f6d Do not use computationally expensive scheduling heuristics with -fast. by Evan Cheng · 16 years ago
  72. db8d56b Split scheduling from instruction selection. by Evan Cheng · 16 years ago
  73. fab8387 Unbreak DECLARE isel in pic mode. by Evan Cheng · 16 years ago
  74. 851bc04 Rather than avoiding to wrap ISD::DECLARE GV operand in X86ISD::Wrapper, simply handle it at dagisel time with x86 specific isel code. by Evan Cheng · 16 years ago
  75. 83ec4b6 Wrap MVT::ValueType in a struct to get type safety by Duncan Sands · 16 years ago
  76. d35121a Fix a tblgen problem handling variable_ops in tblgen instruction by Dan Gohman · 16 years ago
  77. cd0baf2 Use movlps / movhps to modify low / high half of 16-byet memory location. by Evan Cheng · 16 years ago
  78. d880b97 Handle a few more cases of folding load i64 into xmm and zero top bits. by Evan Cheng · 16 years ago
  79. 7e2ff77 Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine. by Evan Cheng · 16 years ago
  80. 419ace9 Not checking for intrinsics which do not have a chain operand. by Evan Cheng · 16 years ago
  81. cdda25d - Switch from std::set to SmallPtrSet. - Add comments. by Evan Cheng · 16 years ago
  82. 25453ea Loosen up an assertion to allow intrinsics. I really have no by Chris Lattner · 16 years ago
  83. dc1adac Re-commit of the r48822, where the infinite looping problem discovered by Roman Levenstein · 17 years ago
  84. 90ce87b Cosmetic by Evan Cheng · 17 years ago
  85. 6397c64 Backing out 48222 temporarily. by Evan Cheng · 17 years ago
  86. e326332 Use a linked data structure for the uses lists of an SDNode, just like by Roman Levenstein · 17 years ago
  87. 920c37a remove Evan's "ugly hack" that sorta attempted to get by Chris Lattner · 17 years ago
  88. c929823 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. by Christopher Lamb · 17 years ago
  89. 6634e26 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. by Christopher Lamb · 17 years ago
  90. 1fab4a6 Recommitting parts of r48130. These do not appear to cause the observed failures. by Christopher Lamb · 17 years ago
  91. 447ff68 Change the model for FP Stack return to use fp operands on the by Chris Lattner · 17 years ago
  92. 03fdec0 Don't emit FP_REG_KILL into a block that just returns. Nothing by Chris Lattner · 17 years ago
  93. 4499e49 Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests. by Evan Cheng · 17 years ago
  94. 3feb017 Allow insert_subreg into implicit, target-specific values. by Christopher Lamb · 17 years ago
  95. 6fa2f9c rename FpGETRESULT32 -> FpGET_ST0_32 etc. Add support for by Chris Lattner · 17 years ago
  96. 07b7ea1 Remove -always-fold-and-in-test. by Evan Cheng · 17 years ago
  97. e526d8a Set to default: x86 no longer fold and into test if it has more than one use. by Evan Cheng · 17 years ago
  98. 5459143 Revert the assert for MUL_LOHI with an unused high result; Chris by Dan Gohman · 17 years ago
  99. c2d9b5f Add an assert to verify that we don't see an by Dan Gohman · 17 years ago
  100. fcf81db Remove the hack that turned an {S,U}MUL_LOHI with an unused high by Dan Gohman · 17 years ago