- 2c5c111 X86 TLS: Implement review feedback. by Lauro Ramos Venancio · 18 years ago
- c67bdc2 Revert Christopher Lamb's load/store alignment changes. by Reid Spencer · 18 years ago
- 2330e4d by Christopher Lamb · 18 years ago
- 0d3b678 Allow the lowering of ISD::GLOBAL_OFFSET_TABLE. by Lauro Ramos Venancio · 18 years ago
- b3a0417 Implement "general dynamic", "initial exec" and "local exec" TLS models for by Lauro Ramos Venancio · 18 years ago
- 61a4c07 allow SRL to simplify its operands, as it doesn't demand all bits as input. by Chris Lattner · 18 years ago
- ec06e9a When replacing a node in SimplifyDemandedBits, if the old node used any by Chris Lattner · 18 years ago
- 0a16a1f fix a pasto by Chris Lattner · 18 years ago
- 8c7d2d5 Fix a bug in my previous patch, grabbing the shift amount width from the by Chris Lattner · 18 years ago
- 895c4ab Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used. by Chris Lattner · 18 years ago
- 95a5e05 SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits by Chris Lattner · 18 years ago
- bed2946 Removed tabs everywhere except autogenerated & external files. Add make by Anton Korobeynikov · 18 years ago
- 1c35968 disable switch lowering using shift/and. It still breaks ppc bootstrap for by Chris Lattner · 18 years ago
- e01017b Fix PR1325: Case range optimization was performed in the case it by Anton Korobeynikov · 18 years ago
- 3ff9817 disable shift/and lowering to work around PR1325 for now. by Chris Lattner · 18 years ago
- 8085bcf Fix PR1323 : we haven't updated phi nodes in good manner :) by Anton Korobeynikov · 18 years ago
- 3a508c9 the result of an inline asm copy can be an arbitrary VT that the register by Chris Lattner · 18 years ago
- 4829b1c fold noop vbitconvert instructions by Chris Lattner · 18 years ago
- c294177 Fix weirdness handling single element vectors. by Chris Lattner · 18 years ago
- f75b874 For PR1284: Implement the "part_set" intrinsic. by Reid Spencer · 18 years ago
- c24bbad fix an infinite loop compiling ldecod, notice by JeffC. by Chris Lattner · 18 years ago
- 1eba01e Fix this harder. by Chris Lattner · 18 years ago
- c56a81d don't create shifts by zero, fix some problems with my previous patch by Chris Lattner · 18 years ago
- 20a35c3 Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often by Chris Lattner · 18 years ago
- 1982ef2 Codegen integer abs more efficiently using the trick from the PPC CWG. This by Chris Lattner · 18 years ago
- 18da072 For PR1146: by Reid Spencer · 18 years ago
- c6eb6d7 apparently some people commit without building the tree, or they forget to by Chris Lattner · 18 years ago
- 2da8da4 No longer needed. by Jeff Cohen · 18 years ago
- 2b95fd6 remove dead target hooks. by Chris Lattner · 18 years ago
- b445d0c remove some dead target hooks, subsumed by isLegalAddressingMode by Chris Lattner · 18 years ago
- 54e2b14 Use integer log for metric calculation by Anton Korobeynikov · 18 years ago
- efc3662 Unbreak VC++ build. by Jeff Cohen · 18 years ago
- 4198c58 Next stage into switch lowering refactoring by Anton Korobeynikov · 18 years ago
- 5694b6e For PR1146: by Reid Spencer · 18 years ago
- 1a6acc2 implement CodeGen/X86/inline-asm-x-scalar.ll:test3 by Chris Lattner · 18 years ago
- ff33cc4 add some assertions by Chris Lattner · 18 years ago
- 4b993b1 Fix PR1316 by Chris Lattner · 18 years ago
- 921169b Fix for CodeGen/X86/2007-04-08-InlineAsmCrash.ll and PR1314 by Chris Lattner · 18 years ago
- e303ac9 minor comment fix by Chris Lattner · 18 years ago
- 3f108cb Change the bit_part_select (non)implementation from "return 0" to abort. by Reid Spencer · 18 years ago
- addd11d Implement the llvm.bit.part_select.iN.iN.iN overloaded intrinsic. by Reid Spencer · 18 years ago
- 5502bf6 Properly emit range comparisons for switch cases, where neighbour cases by Anton Korobeynikov · 18 years ago
- c9dc114 1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL. by Scott Michel · 18 years ago
- a4f9c4d For PR1297: by Reid Spencer · 18 years ago
- 577cc32 For PR1297: Change getOperationName to return std::string instead of const char* by Reid Spencer · 18 years ago
- c8d288f move a bunch of code out of the sdisel pass into its own opt pass "codegenprepare". by Chris Lattner · 18 years ago
- d2f340b switch TL::getValueType to use MVT::getValueType. by Chris Lattner · 18 years ago
- 1436bb6 add one addressing mode description hook to rule them all. by Chris Lattner · 18 years ago
- 2041a0e Fix incorrect combination of different loads. Reenable zext-over-truncate by Dale Johannesen · 18 years ago
- b0b6c76 Disable load width reduction xform of variant (zext (truncate load x)) for by Evan Cheng · 18 years ago
- 7aff11a Scale 1 is always ok. by Evan Cheng · 18 years ago
- caaf691 Remove isLegalAddressImmediate. by Evan Cheng · 18 years ago
- baeccc8 GEP index sinking fixes: by Evan Cheng · 18 years ago
- dd43321 Remove dead code by Anton Korobeynikov · 18 years ago
- b17b08d Split big monster into small helpers. No functionality change. by Anton Korobeynikov · 18 years ago
- d0083bc SDISel does not preserve all, it changes CFG and other info. by Evan Cheng · 18 years ago
- 15213b7 SIGN_EXTEND_INREG requires one extra operand, a ValueType node. by Evan Cheng · 18 years ago
- 3a84b9b First step of switch lowering refactoring: perform worklist-driven by Anton Korobeynikov · 18 years ago
- 5df99b3 Implement support for vector operands to inline asm, implementing by Chris Lattner · 18 years ago
- c13dd1c implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll by Chris Lattner · 18 years ago
- 065421f Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll by Chris Lattner · 18 years ago
- 4234f57 switch TargetLowering::getConstraintType to take the entire constraint, by Chris Lattner · 18 years ago
- 82dcb4f don't rely on ADL by Chris Lattner · 18 years ago
- dae54ce Adjust offset to compensate for big endian machines. by Evan Cheng · 18 years ago
- e177e30 Make sure SEXTLOAD of the specific type is supported on the target. by Evan Cheng · 18 years ago
- b37b80c Also replace uses of SRL if that's also folded during ReduceLoadWidth(). by Evan Cheng · 18 years ago
- 0b063de A couple of bug fixes for reducing load width xform: by Evan Cheng · 18 years ago
- ecb7a77 Change uses of Function::front to Function::getEntryBlock for readability. by Dan Gohman · 18 years ago
- c88138f More opportunities to reduce load size. by Evan Cheng · 18 years ago
- fa4bce2 repair x86 performance, dejagnu problems from previous change by Dale Johannesen · 18 years ago
- 007b69e fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits)) by Evan Cheng · 18 years ago
- 8e59e16 do not share old induction variables when this would result in invalid by Dale Johannesen · 18 years ago
- c01a530 Fix some VC++ warnings. by Jeff Cohen · 18 years ago
- a0a26b7 Code clean up. by Lauro Ramos Venancio · 18 years ago
- 29a68fb Minor bug. by Evan Cheng · 18 years ago
- 8334b9f CopyToReg source operand can be a physical register. by Lauro Ramos Venancio · 18 years ago
- db264ae Use SmallSet instead of std::set. by Evan Cheng · 18 years ago
- 2edd563 If sdisel has decided to sink GEP index expression into any BB. Replace all uses by Evan Cheng · 18 years ago
- 9e2d86a Turn on GEP index sinking by default. by Evan Cheng · 18 years ago
- 9f5ead9 Stupid bug. by Evan Cheng · 18 years ago
- 3cd4e50 Sink a binary expression into its use blocks if it is a loop invariant by Evan Cheng · 18 years ago
- 14245a9 Added isLegalAddressExpression hook to test if the given expression can be by Evan Cheng · 18 years ago
- c6deb3d Estimate a cost using the possible number of scratch registers required and use by Evan Cheng · 18 years ago
- 61230d1 Try schedule def + use closer whne Sethi-Ullman numbers are the same. by Evan Cheng · 18 years ago
- c289faf More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. by Evan Cheng · 18 years ago
- 6dfc680 implement support for floating point constants used as inline asm memory operands. by Chris Lattner · 18 years ago
- b4ddac9 make this fail even in non-assert builds. by Chris Lattner · 18 years ago
- d0b82b3 Refactoring of formal parameter flags. Enable properly use of by Anton Korobeynikov · 18 years ago
- 83060c5 Avoid combining indexed load further. by Evan Cheng · 18 years ago
- edf2e8d big endian 32-bit systems (e.g. ppc32) want to return the high reg first, not by Chris Lattner · 18 years ago
- 0db79d8 Enumerate SDISel formal parameter attributes. Make use of new enumeration. by Anton Korobeynikov · 18 years ago
- ca5183d Unbreak VC++ build. by Jeff Cohen · 18 years ago
- b654176 fold away addc nodes when we know there cannot be a carry-out. by Chris Lattner · 18 years ago
- bcf2484 generalize by Chris Lattner · 18 years ago
- 9115368 canonicalize constants to the RHS of addc/adde. If nothing uses the carry out of by Chris Lattner · 18 years ago
- 175415e eliminate some ops if they have an undef RHS by Chris Lattner · 18 years ago
- 8b2d42c Fix CodeGen/Generic/fpowi-promote.ll and PR1239 by Chris Lattner · 18 years ago
- a9569f1 Add an expand action for ISD label which just deletes the label. by Chris Lattner · 18 years ago
- 0b4711b Lower eh filter intrinsic. by Jim Laskey · 18 years ago
- 8782d48 Chain is on second operand. by Jim Laskey · 18 years ago