1. 2e95afa Cleanup stack/frame register define/kill states. This fixes two bugs: by Hal Finkel · 13 years ago
  2. fed4d19 Make CR spill and restore use a reserved register. These operations cannot use the register scavenger because the scavenger can only scavenge one register and frame-index elimination may have already grabbed it. by Hal Finkel · 13 years ago
  3. 234bb38 make CR spill and restore 64-bit clean (no functional change), and fix some other problems found with -verify-machineinstrs by Hal Finkel · 13 years ago
  4. 6d0e014 make base register selection used in eliminateFrameIndex 64-bit clean by Hal Finkel · 13 years ago
  5. d21e930 add RESTORE_CR and support CR unspills by Hal Finkel · 13 years ago
  6. 16588e7 remove old FIXME by Hal Finkel · 13 years ago
  7. 3fd0018 enable PPC register scavenging by default (update tests and remove some FIXMEs) by Hal Finkel · 13 years ago
  8. 9489487 don't include CR bit subregs in callee-saved list by Hal Finkel · 13 years ago
  9. 2e313ca add register pressure for CR regs by Hal Finkel · 13 years ago
  10. 8a8d479 Move global variables in TargetMachine into new TargetOptions class. As an API by Nick Lewycky · 13 years ago
  11. 768c65f add basic PPC register-pressure feedback; adjust the vaarg test to match the new register-allocation pattern by Hal Finkel · 13 years ago
  12. 966aeb5 Refactor PPC target to separate MC routines from Target routines. by Evan Cheng · 13 years ago
  13. 2d28617 Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for by Evan Cheng · 13 years ago
  14. 0e6a052 Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down by Evan Cheng · 13 years ago
  15. c60f9b7 Next round of MC refactoring. This patch factor MC table instantiations, MC by Evan Cheng · 13 years ago
  16. d5b03f2 Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. by Evan Cheng · 13 years ago
  17. 6844f7b Hide more details in tablegen generated MCRegisterInfo ctor function. by Evan Cheng · 13 years ago
  18. 73f50d9 Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc by Evan Cheng · 13 years ago
  19. a347f85 Starting to refactor Target to separate out code that's needed to fully describe by Evan Cheng · 13 years ago
  20. 951cd02 Fix a few places where 32bit instructions/registerset were used on PPC64. by Roman Divacky · 13 years ago
  21. 6e03294 Use the dwarf->llvm mapping to print register names in the cfi directives. by Rafael Espindola · 13 years ago
  22. 67dc113 Split ppc dwarf regnums into ppc64 and ppc32 flavours. by Rafael Espindola · 13 years ago
  23. 16c29b5 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. by Anton Korobeynikov · 14 years ago
  24. c8bd78c Restore the behavior of frame lowering before my refactoring. by Anton Korobeynikov · 14 years ago
  25. 94c5ae0 Move more PEI-related hooks to TFI by Anton Korobeynikov · 14 years ago
  26. d9e3385 Move getInitialFrameState() to TargetFrameInfo by Anton Korobeynikov · 14 years ago
  27. d0c3817 Move hasFP() and few related hooks to TargetFrameInfo. by Anton Korobeynikov · 14 years ago
  28. 3346491 First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place by Anton Korobeynikov · 14 years ago
  29. fcb4a8e Simplify eliminateFrameIndex() interface back down now that PEI doesn't need by Jim Grosbach · 14 years ago
  30. 38cb138 PPC doesn't supported VLA with large alignment. This was by Dale Johannesen · 14 years ago
  31. 7431bea Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and by Bill Wendling · 14 years ago
  32. ed2ae13 Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false. by Evan Cheng · 14 years ago
  33. 42d075c Remove the TargetRegisterClass member from CalleeSavedInfo by Rafael Espindola · 14 years ago
  34. 6f07bd6 cleanup by Rafael Espindola · 14 years ago
  35. 5f07d52 The PPC MFCR instruction implicitly uses all 8 of the CR by Dale Johannesen · 14 years ago
  36. b92187a Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what by Bill Wendling · 14 years ago
  37. 8c5358c Make naked functions work on PPC. by Dale Johannesen · 14 years ago
  38. e566763 Implement -disable-non-leaf-fp-elim which disable frame pointer elimination by Evan Cheng · 14 years ago
  39. 82bcd23 EnablePPC64RS and EnablePPC32RS are used in multiple files, so they by Dan Gohman · 14 years ago
  40. b357983 Fix a bunch of namespace polution. by Dan Gohman · 14 years ago
  41. a267b00 remove the MMI pointer from MachineFrameInfo. by Chris Lattner · 14 years ago
  42. c7f3ace use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() by Chris Lattner · 14 years ago
  43. 34247a0 Make isInt?? and isUint?? template specializations of the generic versions. This by Benjamin Kramer · 14 years ago
  44. 63d7836 get MMI out of the label uniquing business, just go to MCContext by Chris Lattner · 14 years ago
  45. 2e9919a Now that DBG_LABEL is updated, we can finally make MachineMove by Chris Lattner · 14 years ago
  46. 6ffccca change the DBG_LABEL MachineInstr to always be created by Chris Lattner · 14 years ago
  47. dff4b4c Change the Value argument to eliminateFrameIndex to a type-tagged value. This by Jim Grosbach · 14 years ago
  48. ee25bc2 This should have gone in with 26015, see comments there. by Dale Johannesen · 15 years ago
  49. 518bb53 move target-independent opcodes out of TargetInstrInfo by Chris Lattner · 15 years ago
  50. 1797ed5 Rename the PerformTailCallOpt variable to GuaranteedTailCallOpt to reflect by Dan Gohman · 15 years ago
  51. f7801b4 Do not store R31 into the caller's link area on PPC. by Dale Johannesen · 15 years ago
  52. b60d519 Make capitalization of names starting "is" more consistent. by Dale Johannesen · 15 years ago
  53. 3f2bf85 by David Greene · 15 years ago
  54. b19a5e9 Modify how the prologue encoded the "move" information for the FDE. GCC by Bill Wendling · 15 years ago
  55. b58f498 Add register-reuse to frame-index register scavenging. When a target uses by Jim Grosbach · 15 years ago
  56. c0823fe Simplify RegScavenger::FindUnusedReg. by Jakob Stoklund Olesen · 15 years ago
  57. 6b16eff Add support for the PowerPC 64-bit SVR4 ABI. by Tilmann Scheller · 15 years ago
  58. 2cfd52c Give getPointerRegClass() a "kind" value so that targets can by Chris Lattner · 15 years ago
  59. c23197a llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. by Torok Edwin · 15 years ago
  60. c25e758 assert(0) -> LLVM_UNREACHABLE. by Torok Edwin · 15 years ago
  61. dac237e Implement changes from Chris's feedback. Finish converting lib/Target. by Torok Edwin · 15 years ago
  62. 6a3a1ba Various small changes related to the Condition Register on PowerPC. by Tilmann Scheller · 15 years ago
  63. 2a9ddfb Refactor ABI code in the PowerPC backend. by Tilmann Scheller · 15 years ago
  64. ffd0200 Implement the SVR4 ABI for PowerPC. by Tilmann Scheller · 15 years ago
  65. d18e31a Add new function attribute - noredzone. by Devang Patel · 15 years ago
  66. 587daed Change MachineInstrBuilder::addReg() to take a flag instead of a list of by Bill Wendling · 15 years ago
  67. 022a27e fix warning in -asserts build. by Chris Lattner · 15 years ago
  68. 0f8b53f Fix a bunch of Doxygen syntax issues. Escape special characters, by Dan Gohman · 16 years ago
  69. 536a2f1 Remove refs to non-DebugLoc version of BuildMI from PowerPC. by Dale Johannesen · 16 years ago
  70. 770bcc7 Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. by Evan Cheng · 16 years ago
  71. 9e79091 Respect the DisableRedZone flag on PowerPC. by Dan Gohman · 16 years ago
  72. b384ab9 Add a RM pseudoreg for the rounding mode, which by Dale Johannesen · 16 years ago
  73. c12e581 Rewrite logic to figure out whether LR needs to by Dale Johannesen · 16 years ago
  74. d735b80 Switch the MachineOperand accessors back to the short names like by Dan Gohman · 16 years ago
  75. d5d8191 Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc: by Bill Wendling · 16 years ago
  76. 36a5502 Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0. by Evan Cheng · 16 years ago
  77. 014278e Remove isImm(), isReg(), and friends, in favor of by Dan Gohman · 16 years ago
  78. dc2fbdd Trim unnecessary #includes. by Dan Gohman · 16 years ago
  79. 2d97918 Simplify this use of BuildMI. This is also in preparation for by Dan Gohman · 16 years ago
  80. 4406604 Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating by Dan Gohman · 16 years ago
  81. 30e62c0 Tail call optimization improvements: by Arnold Schwaighofer · 16 years ago
  82. 3541af7 Reverse sense of unwind-tables option. This means by Dale Johannesen · 16 years ago
  83. 4e1b794 Implement new llc flag -disable-required-unwind-tables. by Dale Johannesen · 16 years ago
  84. e004062 Cosmetic changes per EH patch review feedback. by Dale Johannesen · 16 years ago
  85. 1532f3d Recommitting EH patch; this should answer most of the by Dale Johannesen · 16 years ago
  86. b6d5b14 Revert 49006 for the moment. by Dale Johannesen · 16 years ago
  87. 1544e47 Emit exception handling info for functions which are by Dale Johannesen · 16 years ago
  88. ca1267c Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. by Evan Cheng · 16 years ago
  89. 71a2cb2 detabify llvm, patch by Mike Stump! by Chris Lattner · 16 years ago
  90. 82e4289 Disable prolog code that aligns the stack when a by Dale Johannesen · 16 years ago
  91. 4a66e9a Change the "enable/disable" mechanism so that we can enable PPC register by Bill Wendling · 16 years ago
  92. 0404cd9 Add description of individual bits in CR. This fix PR1765. by Nicolas Geoffray · 16 years ago
  93. 2b5fab6 Removed spurious EnablePPCRS check. by Bill Wendling · 17 years ago
  94. 880d0f6 Use a command-line option to turn register scavenging on/off for PPC. by Bill Wendling · 17 years ago
  95. 7194aaf This is the initial check-in for adding register scavenging to PPC. (Currently, by Bill Wendling · 17 years ago
  96. a1998d1 Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR. by Chris Lattner · 17 years ago
  97. 6f0d024 Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 17 years ago
  98. 1b08bbc Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. by Evan Cheng · 17 years ago
  99. bb81d97 Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution. by Evan Cheng · 17 years ago
  100. 0a75538 Makes the same change in ppc backend: avoid inserting prologue before debug labels. by Evan Cheng · 17 years ago