1. 2eff6e7 More spelling and grammar tweaks. by Duncan Sands · 15 years ago
  2. 9ddfb94 More spelling fixes. by Benjamin Kramer · 15 years ago
  3. 65b0e39 Spelling fixes. by Duncan Sands · 15 years ago
  4. f435c41 more tweaks by Chris Lattner · 15 years ago
  5. a637737 Remove an inappropriate line in the description of the by Duncan Sands · 15 years ago
  6. cfb92fe continue decoding chris scribble. by Chris Lattner · 15 years ago
  7. 60f0340 remove some dead passes by Chris Lattner · 15 years ago
  8. 39c0e67 checkpoint. by Chris Lattner · 15 years ago
  9. 5a2d875 fix broken anchors. by Chris Lattner · 15 years ago
  10. f9920fa use a typedef instead of spelling out an insane type. Yay for auto someday. by Chris Lattner · 15 years ago
  11. 433a0db Change jump threading to use the new SSAUpdater class instead of by Chris Lattner · 15 years ago
  12. 93f3bcf Implement an efficient and fully general SSA update mechanism that by Chris Lattner · 15 years ago
  13. f681127 add some WeakVH::operator='s. Without these, assigning by Chris Lattner · 15 years ago
  14. fc61aef change some static_cast into cast, pointed out by Gabor. by Chris Lattner · 15 years ago
  15. ceaa457 add a version of PHINode::getIncomingBlock that takes a raw by Chris Lattner · 15 years ago
  16. 2d7f1d2 random tidying by Chris Lattner · 15 years ago
  17. bcea859 Create a new InstrEmitter class for translating SelectionDAG nodes by Dan Gohman · 15 years ago
  18. c81b783 Make getMachineNode return a MachineSDNode* instead of a generic SDNode* by Dan Gohman · 15 years ago
  19. 4e6f7a0 Remove a no-longer-necessary #include. by Dan Gohman · 15 years ago
  20. 3731bc0 Replace X86's CanRematLoadWithDispOperand by calling the target-independent by Dan Gohman · 15 years ago
  21. 5bf7c2a Fix a missing initialization of PostRAScheduler's AA member. by Dan Gohman · 15 years ago
  22. 98976e4 The ScheduleDAG framework now requires an AliasAnalysis argument, though by Dan Gohman · 15 years ago
  23. cda49a0 Update this test; the code is the same but it gets counted as one fewer remat. by Dan Gohman · 15 years ago
  24. 59ac571 Mark the LDR instruction with isReMaterializable, as it is rematerializable by Dan Gohman · 15 years ago
  25. a70dca1 Factor out LiveIntervalAnalysis' code to determine whether an instruction by Dan Gohman · 15 years ago
  26. ac1ceb3 Extract scope information from the variable itself, instead of relying on alloca or llvm.dbg.declare location. by Devang Patel · 15 years ago
  27. c89d27a ExecutionEngine::clearGlobalMappingsFromModule failed to remove reverse by Jeffrey Yasskin · 15 years ago
  28. 769b7f8 Add a const qualifier. by Dan Gohman · 15 years ago
  29. bdb984b Use names instead of numbers for some of the magic by Dale Johannesen · 15 years ago
  30. d7894f1 Added another bit of the ARM target assembler to llvm-mc to parse register by Kevin Enderby · 15 years ago
  31. 599a87a isTriviallyReMaterializable checks the by Dan Gohman · 15 years ago
  32. 11596ed Fix the x86 test-shrink optimization so that it doesn't shrink comparisons by Dan Gohman · 15 years ago
  33. 83815ae Merge a bunch of NEON tests into larger files so they run faster. by Bob Wilson · 15 years ago
  34. 91e69c3 Add basic infrastructure and x86 support for preserving MachineMemOperand by Dan Gohman · 15 years ago
  35. c525472 Check invalid debug info for enums. This may happen when underlyng enum is optimized away. Eventually DwarfChecker will clean this up during llvm verification stage. by Devang Patel · 15 years ago
  36. 71c8dc9 when previous scratch register is killed, flag the value as no longer tracking by Jim Grosbach · 15 years ago
  37. e8e72be Convert some ARM tests with lots of greps to use FileCheck. by Bob Wilson · 15 years ago
  38. 7a72195 Revert r83606 and add comments explaining why it isn't safe. by Dan Gohman · 15 years ago
  39. 0c536be As it turns out, the bug fixes in GC codegen did not make it by Nicolas Geoffray · 15 years ago
  40. 7b2e71b 80-columns! by Nicolas Geoffray · 15 years ago
  41. e83ae23 Add initial information on VMKit. by Nicolas Geoffray · 15 years ago
  42. a8f4214 more random updates. by Chris Lattner · 15 years ago
  43. 64efb55 Give Dan and my recent changes, machine LICM is now code size neutral. by Evan Cheng · 15 years ago
  44. 4517850 checkpoint. by Chris Lattner · 15 years ago
  45. 3dc326b Fix a logic error that caused non-rematable loop invariants loads to be licm'ed out of loop. by Evan Cheng · 15 years ago
  46. 6ee62f8 checkpoint. by Chris Lattner · 15 years ago
  47. aba210b Slight rewording. by Mikhail Glushenkov · 15 years ago
  48. 0b59939 Omit the 'out_file_index != -1' check when possible. by Mikhail Glushenkov · 15 years ago
  49. 3ab6889 Use llvm-as only for compiling .ll -> .bc. by Mikhail Glushenkov · 15 years ago
  50. 8795070 Commit one last NEON test to use FileCheck. That's all of them now! by Bob Wilson · 15 years ago
  51. 0305dd7 Convert more NEON tests to use FileCheck. by Bob Wilson · 15 years ago
  52. 28d0274 update clang section. by Chris Lattner · 15 years ago
  53. 17d70ab Raise the limit on built-in plugins in llvmc to 10. by Mikhail Glushenkov · 15 years ago
  54. bdd040f Reconfigure automatically when Base.td.in is changed. by Mikhail Glushenkov · 15 years ago
  55. 35ca920 Reset kill markers after live interval is reconstructed. by Evan Cheng · 15 years ago
  56. 48bff92 Indentation. by Evan Cheng · 15 years ago
  57. 4db3581 Preserve HasNSW and HasNUW when constructing SCEVs for Add and Mul instructions. by Dan Gohman · 15 years ago
  58. e91b9a3 When considering whether to inline Callee into Caller, by Dale Johannesen · 15 years ago
  59. 3645b01 Add the ability to track HasNSW and HasNUW on more kinds of SCEV expressions. by Dan Gohman · 15 years ago
  60. 5631139 Add codegen support for NEON vst4lane intrinsics with 128-bit vectors. by Bob Wilson · 15 years ago
  61. 8cdb269 Add codegen support for NEON vst3lane intrinsics with 128-bit vectors. by Bob Wilson · 15 years ago
  62. c5c6edb Add codegen support for NEON vst2lane intrinsics with 128-bit vectors. by Bob Wilson · 15 years ago
  63. 4cf0189 Convert more NEON tests to use FileCheck. by Bob Wilson · 15 years ago
  64. 62e053e Add codegen support for NEON vld4lane intrinsics with 128-bit vectors. by Bob Wilson · 15 years ago
  65. 9c80680 Remove code that makes no sense. by Evan Cheng · 15 years ago
  66. 5d78275 Convert more NEON tests to use FileCheck. by Bob Wilson · 15 years ago
  67. 0bf7d99 Add codegen support for NEON vld3lane intrinsics with 128-bit vectors. by Bob Wilson · 15 years ago
  68. c6f520b Update CMake build yet again after a source file was removed by Douglas Gregor · 15 years ago
  69. 26c6cf4 It's possible for a global variable to be optimized out of a metadata object. So by Bill Wendling · 15 years ago
  70. 632606c Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via movt/movw pair. by Anton Korobeynikov · 15 years ago
  71. 85d29e2 Clear variable debug info map at the end of the function. by Devang Patel · 15 years ago
  72. 30aea9d Add codegen support for NEON vld2lane intrinsics with 128-bit vectors. by Bob Wilson · 15 years ago
  73. cd7e327 Clean up some unnecessary initializations. by Bob Wilson · 15 years ago
  74. af4a891 Clean up a comment (indentation was wrong). by Bob Wilson · 15 years ago
  75. 5fcbf0d Add a SelectionDAG getTargetInsertSubreg convenience function, by Bob Wilson · 15 years ago
  76. eda3121 Do not record line number to implicitly mark start of function if function has arguments. Extra line number entries trip gdb in some cases. by Devang Patel · 15 years ago
  77. bfa19bf Add missing names for the XCore specific LADD and LSUB nodes. by Richard Osborne · 15 years ago
  78. 8a261e4 Add a form of addPreserved which takes a string argument, to allow passes by Dan Gohman · 15 years ago
  79. d4a537b some updates from users of llvm by Chris Lattner · 15 years ago
  80. c96c8e0 Add some peepholes for signed comparisons using ashr X, X, 32. by Richard Osborne · 15 years ago
  81. 80ed255 all content split into sections, still much work to be done. by Chris Lattner · 15 years ago
  82. 8ef2751 remove LoopVR pass. According to Nick: by Chris Lattner · 15 years ago
  83. 7b0a681 checkpoint, this is still not comprehendible. by Chris Lattner · 15 years ago
  84. 976248d Unbreak the build. by Mikhail Glushenkov · 15 years ago
  85. 67a6103 Convert more NEON tests to use FileCheck. by Bob Wilson · 15 years ago
  86. deb3141 Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors. by Bob Wilson · 15 years ago
  87. 6d80d2b Make the Base plugin understand -MF and -MT. by Mikhail Glushenkov · 15 years ago
  88. 39482dd Input files should go before all other options. by Mikhail Glushenkov · 15 years ago
  89. 1f30dcb Cleanup up unused R3LiveIn tracking. by Jim Grosbach · 15 years ago
  90. 65c58da Re-enable register scavenging in Thumb1 by default. by Jim Grosbach · 15 years ago
  91. e40bf5f bugfix. The target may use virtual registers that aren't tracked for re-use but are allocated by the scavenger. The re-use algorithm needs to watch for that. by Jim Grosbach · 15 years ago
  92. 5adf60c Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors. by Bob Wilson · 15 years ago
  93. 24e04c5 Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors. by Bob Wilson · 15 years ago
  94. 4306963 In instcombine's debug output, avoid printing ADD for instructions that are by Jeffrey Yasskin · 15 years ago
  95. 0ea38bb Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors. by Bob Wilson · 15 years ago
  96. fe27c51 Convert more NEON tests to use FileCheck. by Bob Wilson · 15 years ago
  97. c67160c Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors. by Bob Wilson · 15 years ago
  98. fe897b2 Fix the OProfile part of PR5018. This fixes --without-oprofile, makes by Jeffrey Yasskin · 15 years ago
  99. a428808 Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors. by Bob Wilson · 15 years ago
  100. 9f3a559 reverting thumb1 scavenging default due to test failure while I figure out what's up. by Jim Grosbach · 15 years ago