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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 3197b4453d214aa96de3a42da8f8fe189fff2077
  1. 3197b44 Add an option to turn off the expensive GVN load PRE part of GVN. by Bill Wendling · 12 years ago
  2. 29f60f3 Add predicates for checking whether targets have free FNEG and FABS operations, and prevent the DAGCombiner from turning them into bitwise operations if they do. by Owen Anderson · 12 years ago
  3. be9fe49 During two-address lowering, rescheduling an instruction does not untie by Lang Hames · 12 years ago
  4. ce16784 No need to run llvm-as. by Rafael Espindola · 12 years ago
  5. a551a48 Initial 64 bit direct object support. by Akira Hatanaka · 12 years ago
  6. 70272aa The binutils for the IBM BG/P are too old to support CFI. by Hal Finkel · 12 years ago
  7. a47406c Add triple support for the IBM BG/P and BG/Q supercomputers. by Hal Finkel · 12 years ago
  8. 60777d8 Turn on the accelerator tables for Darwin. by Eric Christopher · 12 years ago
  9. aad9c3f Fast fix for PR12343: http://llvm.org/bugs/show_bug.cgi?id=12343 by Stepan Dyatkovskiy · 12 years ago
  10. 466958c Implement the SVR4 byval alignment for aggregates. Fixing a FIXME. by Roman Divacky · 12 years ago
  11. 545b962 Second part for the 153874 one by Silviu Baranga · 12 years ago
  12. 50ac2e9 Added fix in TableGen instruction decoder generation. The decoder now breaks for every leaf node. by Silviu Baranga · 12 years ago
  13. 5004e98 Add missing 'd'. by Rafael Espindola · 12 years ago
  14. 8ba9405 Hack the hack. If we have a situation where an ASM object is defined but isn't by Bill Wendling · 12 years ago
  15. 9433859 Emit the asm writer's mnemonic table with SequenceToOffsetTable. by Benjamin Kramer · 12 years ago
  16. c97ef61 Move getOpcodeName from the various target InstPrinters into the superclass MCInstPrinter. by Benjamin Kramer · 12 years ago
  17. fab3f7e Reorder fields in MatchEntry and OperandMatchEntry to reduce padding. A bit tricky due to the target specific sizes for some of the fields so the ordering is only optimal for the targets in the tree. by Craig Topper · 12 years ago
  18. 44b5e6d Optimizing swizzles of complex shuffles may generate additional complex shuffles. by Nadav Rotem · 12 years ago
  19. 7c0b3c1 Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. by Craig Topper · 12 years ago
  20. 79e22d8 Fix CXXFLAGS for huge_val.m4. by Eric Christopher · 12 years ago
  21. 17463b3 Make MCInstrInfo available to the MCInstPrinter. This will be used to remove getInstructionName and the static data it contains since the same tables are already in MCInstrInfo. by Craig Topper · 12 years ago
  22. 1fcbca0 It could come about that we parse the inline ASM before we get a potential by Bill Wendling · 12 years ago
  23. a4bd58b Use SequenceToOffsetTable to generate instruction name table for AsmWriter. by Craig Topper · 12 years ago
  24. caa2c40 Start cleaning up the InlineCost class. This switches to sentinel values by Chandler Carruth · 12 years ago
  25. b66e943 Fix some 80-col. violations I introduced with the A2 PPC64 core. by Hal Finkel · 12 years ago
  26. 19aa2b5 Enable prefetch generation on PPC64. by Hal Finkel · 12 years ago
  27. 730acfb Add LdStSTD* itin. for the PPC64 A2 core. by Hal Finkel · 12 years ago
  28. 4ac9081 This commit contains a few changes that had to go in together. by Nadav Rotem · 12 years ago
  29. 16d6eae Fix typo. by Lang Hames · 12 years ago
  30. 3f31d49 Set the default PPC node scheduling preference to ILP (for the embedded cores). by Hal Finkel · 12 years ago
  31. 800125f Add ppc440 itin. entries for LdStSTD* by Hal Finkel · 12 years ago
  32. 97c9d4c Use full anti-dep. breaking with post-ra sched. on the embedded ppc cores. by Hal Finkel · 12 years ago
  33. 4d989ac Add instruction itinerary for the PPC64 A2 core. by Hal Finkel · 12 years ago
  34. 413b2e7 Use SequenceToOffsetTable to create instruction name table. Saves space particularly on X86 where AVX instructions just add a 'v' to the front of other instructions. by Craig Topper · 12 years ago
  35. 243018f Emit the LLVM<->DWARF register mapping as a sorted table and use binary search to do the lookup. by Benjamin Kramer · 12 years ago
  36. dafe48e Belatedly address some code review from Chris. by Chandler Carruth · 12 years ago
  37. 48ec3b5 Add some more testing to cover the remaining two cases where by Chandler Carruth · 12 years ago
  38. 6052eef Fix a pretty scary bug I introduced into the always inliner with by Chandler Carruth · 12 years ago
  39. 0b42f9d Replace four tiny tests with various uses of grep and not with a single by Chandler Carruth · 12 years ago
  40. 830da40 misched: Add finalizeScheduler to complete the target interface. by Andrew Trick · 12 years ago
  41. d9182d6 Removing a file that's no longer being used after the recent refactorings by Eli Bendersky · 12 years ago
  42. 20b529b Split the LdStGeneral PPC itin. class into LdStLoad and LdStStore. by Hal Finkel · 12 years ago
  43. 6226c49 Add a workaround for building with old versions of clang. by Rafael Espindola · 12 years ago
  44. f10037b Add a triple to the test. by Rafael Espindola · 12 years ago
  45. 95d594c Teach CodeGen's version of computeMaskedBits to understand the range metadata. by Rafael Espindola · 12 years ago
  46. 5b00cea Fix dynamic linking on PPC64. by Hal Finkel · 12 years ago
  47. f5f256c Fix a typo reported in IRC by someone reviewing this code. by Chandler Carruth · 12 years ago
  48. b594a84 Give the always-inliner its own custom filter. It shouldn't have to pay by Chandler Carruth · 12 years ago
  49. 45de584 Remove a bunch of empty, dead, and no-op methods from all of these by Chandler Carruth · 12 years ago
  50. f2286b0 Initial commit for the rewrite of the inline cost analysis to operate by Chandler Carruth · 12 years ago
  51. 7384530 Add support to the InstVisitor for visiting a generic callsite. The by Chandler Carruth · 12 years ago
  52. 7baa27d Move trivial functions into the class definition. by Bill Wendling · 12 years ago
  53. deee238 Trim headers. by Bill Wendling · 12 years ago
  54. c94c562 Indent according to LLVM's style guide. by Bill Wendling · 12 years ago
  55. ab53bc7 Cleanup whitespace and trim some of the #includes. by Bill Wendling · 12 years ago
  56. 1955c9c Internalize: Remove reference of @llvm.noinline, it was replaced with the noinline attribute a long time ago. by Benjamin Kramer · 12 years ago
  57. f2cc2ee These strings aren't 'const char *' but 'char *'. by Bill Wendling · 12 years ago
  58. 76b13ed Cleanup whitespace. by Bill Wendling · 12 years ago
  59. caf71d4 Free the codegen options when deleting LTO code generator object. by Bill Wendling · 12 years ago
  60. 168f142 Cleanup whitespace and remove unneeded 'extern' keyword on function definitions. by Bill Wendling · 12 years ago
  61. 426d571 Clean up the naming in this test. Someone pointed this out in review at by Chandler Carruth · 12 years ago
  62. c3e9559 FileCheck-ize this test, and generally tidy it up prior to changing by Chandler Carruth · 12 years ago
  63. 4000afe I noticed in passing that the Metadata getIfExists method was creating a new by Duncan Sands · 12 years ago
  64. 6173ed9 Correctly vectorize powi. by Hal Finkel · 12 years ago
  65. 9f2a9d7 comment typo by Andrew Trick · 12 years ago
  66. b2874df Select static relocation model if it is jitting. by Akira Hatanaka · 12 years ago
  67. dd9a501 Introduce Register Units: Give each leaf register a number. by Andrew Trick · 12 years ago
  68. 3ee3661 Add a 2 byte safety margin in offset computations. by Jakob Stoklund Olesen · 12 years ago
  69. 101c03a Add more debugging output to ARMConstantIslandPass. by Jakob Stoklund Olesen · 12 years ago
  70. 5ff4bc2 * Set the scope attributes for the ASM symbol we added to be the value passed by Bill Wendling · 12 years ago
  71. cef670a Rip out emission of the regIsInRegClass function for the asm printer. by Benjamin Kramer · 12 years ago
  72. bf3c322 ARM fix encoding fixup resolution for ldrd and friends. by Jim Grosbach · 12 years ago
  73. c19f72b Use SequenceToOffsetTable in emitRegisterNameString. by Jakob Stoklund Olesen · 12 years ago
  74. 0d4e2ea Reapply 153764 and 153761 with a fix. by Jakob Stoklund Olesen · 12 years ago
  75. 77ff8bb Revert 153764 and 153761. They broke a --enable-optimized --enable-assertions by Rafael Espindola · 12 years ago
  76. ad353c6 ARM assembler should prefer non-aliases encoding of cmp. by Jim Grosbach · 12 years ago
  77. a45e374 ARM encoding for VSWP got the second operand incorrect. by Jim Grosbach · 12 years ago
  78. 8f1148b ARM can only use narrow encoding for low regs. by Jim Grosbach · 12 years ago
  79. ecf2d9f Compress SimpleValueType lists by sharing. by Jakob Stoklund Olesen · 12 years ago
  80. 8f36b0b Compress register lists by sharing suffixes. by Jakob Stoklund Olesen · 12 years ago
  81. 184440e Add a SequenceToOffsetTable to TableGen. by Jakob Stoklund Olesen · 12 years ago
  82. 2d30d94 ARM integrated assembler should encoding choice for add/sub imm. by Jim Grosbach · 12 years ago
  83. 092c5cc Handle unreachable code in the dominates functions. This changes users when by Rafael Espindola · 12 years ago
  84. 0e4fa5f Re-factored RuntimeDyLd: by Danil Malyshev · 12 years ago
  85. c0164f8 ARM assembly parsing needs to be paranoid about negative immediates. by Jim Grosbach · 12 years ago
  86. 7c7121e Add computeMaskedBitsLoad back, as it was the change to instsimplify that by Rafael Espindola · 12 years ago
  87. 2f1abe9 Add a note about a missed cmov -> sbb opportunity. by Benjamin Kramer · 12 years ago
  88. 8fd3fcd Cleanup whitespace. Doxygenize comments. And indent to llvm coding standards. by Bill Wendling · 12 years ago
  89. cb0809b Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch. by James Molloy · 12 years ago
  90. 1c80f56 ARM target should allow codegenprep to duplicate ret instructions to enable tailcall opt. rdar://11140249 by Evan Cheng · 12 years ago
  91. c459d31 Testcase for r153710. by Bill Wendling · 12 years ago
  92. 4108bd3 Add testcase for r153705 by Bill Wendling · 12 years ago
  93. 84364a4 If we have a VLA that has a "use" in a metadata node that's then used by Bill Wendling · 12 years ago
  94. f9e894d Change the constant in this testcase so that it results in a constant pool load. by Lang Hames · 12 years ago
  95. 288967d Revert r153694. It was causing failures in the buildbots. by Bill Wendling · 12 years ago
  96. 7a4c071 Invalidate liveness in ARMConstantIslandPass. by Jakob Stoklund Olesen · 12 years ago
  97. ccca22e Prefer even-odd D-register pairs. by Jakob Stoklund Olesen · 12 years ago
  98. 803d134 Filecheck-ize this test so that it actually tests something reasonable. by Chandler Carruth · 12 years ago
  99. c0a9f82 Try using vmov.i32 to materialize FP32 constants that can't be materialized by by Lang Hames · 12 years ago
  100. 4b0b8ef Re-factored RuntimeDyld. Added ExecutionEngine/MCJIT tests. by Danil Malyshev · 12 years ago