- 3370dd7 Yet more APInt-ification. by Dan Gohman · 17 years ago
- 6c6cd1c More APInt-ification. by Dan Gohman · 17 years ago
- 050f550 More APInt-ification. by Dan Gohman · 17 years ago
- 4a23d72 Go through the machine instruction's operands to make sure that we're not by Bill Wendling · 17 years ago
- a0a570c Make the register scavenger update the bookkeeping values for sub/super by Bill Wendling · 17 years ago
- 988a578 Multiple instructions can be inserted when eliminating frame indexes. We need by Bill Wendling · 17 years ago
- 26ed869 all but CAS working on x86 by Andrew Lenharth · 17 years ago
- 3c8b59c Add MVT::is128BitVector and is64BitVector. Shrink by Dale Johannesen · 17 years ago
- 84d4a2b Refactor / clean up code; remove td list scheduler special tie breaker (no real benefit). by Evan Cheng · 17 years ago
- 05548eb Don't fill eh frames even though these are text sections. by Evan Cheng · 17 years ago
- 97e3c01 If we reload a virtual register that's already been assigned, we want to mark by Bill Wendling · 17 years ago
- 4f658e9 Fix PR2112: don't run loop aligner if target doesn't have a TargetLowering object. by Evan Cheng · 17 years ago
- bec2c0c No need for coalescer to update kills. Only copies are coalesced and those instructions will be deleted. Doh. by Evan Cheng · 17 years ago
- 8f14da1 Remove redundant #include. by Evan Cheng · 17 years ago
- 6c23150 More APInt-ification. by Dan Gohman · 17 years ago
- c7773bf Use the new convertFromAPInt instead of convertFromZeroExtendedInteger, by Dan Gohman · 17 years ago
- c6f9a06 Use the new APInt-enabled form of getConstant instead of converting by Dan Gohman · 17 years ago
- d703ed6 Added option -align-loops=<true/false> to disable loop aligner pass. by Evan Cheng · 17 years ago
- 28d08fd Interface of getByValTypeAlignment differed between by Dale Johannesen · 17 years ago
- cd9f174 Fix an assertion message. by Dale Johannesen · 17 years ago
- 643afa5 Keep track how many commutes are performed by the scheduler. by Evan Cheng · 17 years ago
- e07415d implement expand for ISD::DECLARE by just deleting it. by Chris Lattner · 17 years ago
- fb8075d Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. by Evan Cheng · 17 years ago
- 8155d64 Handle load/store of misaligned vectors that are the by Dale Johannesen · 17 years ago
- 21b3f31 Fix a bug in dead spill slot elimination. by Evan Cheng · 17 years ago
- 18714ae Remove the `else', at Evan's insistence. by Dan Gohman · 17 years ago
- 052e976 Add a FIXME about the VECTOR_SHUFFLE evil hack. by Duncan Sands · 17 years ago
- 077f9b2 LegalizeTypes support for EXTRACT_VECTOR_ELT. The by Duncan Sands · 17 years ago
- 8745b52 LegalizeTypes support for legalizing the mask by Duncan Sands · 17 years ago
- 4f069e6 LegalizeTypes support for INSERT_VECTOR_ELT. by Duncan Sands · 17 years ago
- be680dc Don't track max alignment during stack object allocations since they can be deleted later. Let PEI compute it. by Evan Cheng · 17 years ago
- e90a615 Support for legalizing MEMBARRIER. by Duncan Sands · 17 years ago
- 6ef781f Final de-tabification. by Bill Wendling · 17 years ago
- d365312 Spiller now remove unused spill slots. by Evan Cheng · 17 years ago
- 1953ecb Teach Legalize how to expand an EXTRACT_ELEMENT. by Dan Gohman · 17 years ago
- b3564aa Convert the last remaining users of the non-APInt form of by Dan Gohman · 17 years ago
- 7b8d4a9 Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt. by Dan Gohman · 17 years ago
- fe42462 Use a smallvector for inactiveCounts and initialize it lazily by Chris Lattner · 17 years ago
- e6d088a Rename PrintableName to Name. by Bill Wendling · 17 years ago
- 74ab84c Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool by Bill Wendling · 17 years ago
- 4d535ca Enable -coalescer-commute-instrs by default. by Evan Cheng · 17 years ago
- d4cf992 Avoid aborting on invalid shift counts. by Dan Gohman · 17 years ago
- aeecb6c Fix PR2096, a regression introduced with my patch last night. This by Chris Lattner · 17 years ago
- 212a11c Fix a nasty bug in LegalizeTypes (spotted in by Duncan Sands · 17 years ago
- f059deb De-tabify. by Bill Wendling · 17 years ago
- c886c46 This is possible: by Evan Cheng · 17 years ago
- 0254e70 Fix isNegatibleForFree to not return true for ConstantFP nodes by Chris Lattner · 17 years ago
- 5c80760 Refactor inline asm constraint matching code out of SDIsel into TargetLowering. by Evan Cheng · 17 years ago
- f6283fd Make some static variables const. by Dan Gohman · 17 years ago
- 2e68b6f Convert MaskedValueIsZero and all its users to use APInt. Also add by Dan Gohman · 17 years ago
- e83a275 All remat'ed loads cannot be folded into two-address code. Not just argument loads. This change doesn't really have any impact on codegen. by Evan Cheng · 17 years ago
- 1a9c9df In debug builds check that the key property holds: all by Duncan Sands · 17 years ago
- 79a0c1e Correctly determine whether a argument load can be folded into its uses. by Evan Cheng · 17 years ago
- 14fd63c Add support to LegalizeTypes for building legal vectors by Duncan Sands · 17 years ago
- 181eb73 Some platforms use the same name for 32-bit and 64-bit registers (like by Bill Wendling · 17 years ago
- 249ded3 Rematerialization logic was overly conservative when it comes to loads from fixed stack slots. by Evan Cheng · 17 years ago
- 298bbe8 If remating a machine instr with virtual register operand, make sure the vr is avaliable at all uses regardless of whether it would be folded. by Evan Cheng · 17 years ago
- dd3465e Recognize loads of arguments as re-materializable first. Therefore if isReallyTriviallyReMaterializable() returns true it doesn't confuse it as a "normal" re-materializable instruction. by Evan Cheng · 17 years ago
- 313d4b8 Fix spill weight updating bug. by Evan Cheng · 17 years ago
- 672e550 Same isPhysRegAvailable bug as local register allocator. by Evan Cheng · 17 years ago
- bcfa1ca Really really bad local register allocator bug. On X86, it was never using ESI, EDI, and EBP because of a bug in RALocal::isPhysRegAvailable(). For example, when by Evan Cheng · 17 years ago
- 9af7090 Add debugging printfs. by Evan Cheng · 17 years ago
- b2fd65f Make sure reload of implicit uses are issued before remat's. by Evan Cheng · 17 years ago
- 08e78b1 Pass alignment on ByVal parameters, from FE, all by Dale Johannesen · 17 years ago
- d70dbb5 Enable re-materialization of instructions which have virtual register operands if by Evan Cheng · 17 years ago
- becda48 Fix compiler warning. by Evan Cheng · 17 years ago
- 9e255b7 Fix a regression in 403.gcc and 186.crafty introduced in 47383. To test by Dan Gohman · 17 years ago
- 69e6a8d Make the clobber analysis a bit more smart: we only are careful about by Chris Lattner · 17 years ago
- 0fe71e9 Treat clobber operands like early clobbers: if we have by Chris Lattner · 17 years ago
- 1d5e819 Clear PhysRegPartUse for the sub register as well. by Bill Wendling · 17 years ago
- 20b76ab Adjust the MaxAlignment for the special register scavenging spill slot. by Bill Wendling · 17 years ago
- 304983b Help testing. by Evan Cheng · 17 years ago
- c1c7bd6 Better names as per Evan's request by Andrew Lenharth · 17 years ago
- ab0b949 Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet by Andrew Lenharth · 17 years ago
- f9853bc Add support for matching mem operands. This fixes PR1133, patch by by Chris Lattner · 17 years ago
- 7cbeb24 Fix a (harmless) but where vregs were added to the used reg lists for by Chris Lattner · 17 years ago
- 063284c Clean up some spilling code using MachineRegisterInfo. by Evan Cheng · 17 years ago
- c927cc8 Remove one of the fixmes that I put in there. From Evan: by Bill Wendling · 17 years ago
- 55574c2 Improve some comments explaining the "handle kills" stuff better. by Bill Wendling · 17 years ago
- fe8276c Fix comment. by Bill Wendling · 17 years ago
- c40a84a assert is more effective reminder then FIXME tag for unimplemented features. by Devang Patel · 17 years ago
- f83b1f6 LegalizeTypes support for scalarizing a vector store by Duncan Sands · 17 years ago
- 91dc17b Convert Legalize to use the APInt form of ComputeMaskedBits. by Dan Gohman · 17 years ago
- b5660dc Add explicit keywords. by Dan Gohman · 17 years ago
- 948d8ea Convert DAGCombiner to use the APInt form of ComputeMaskedBits. by Dan Gohman · 17 years ago
- ca93a43 Use APInt::intersects. by Dan Gohman · 17 years ago
- 4aefd6b Fix newly-introduced 4.3 warnings by Anton Korobeynikov · 17 years ago
- 4c71dfe Update gcc 4.3 warnings fix patch with recent head changes by Anton Korobeynikov · 17 years ago
- ae9f3a3 Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings. by Anton Korobeynikov · 17 years ago
- 6d79474 Added some comments and reformatted others. No functionality change. by Bill Wendling · 17 years ago
- 420cdeb More constification of things. More comments added. No functionality by Bill Wendling · 17 years ago
- 19fc1d3 Fix an incredibly subtle bug exposed by Ted's change to APInt profiling. by Chris Lattner · 17 years ago
- 90a3868 No functionality change: by Bill Wendling · 17 years ago
- 40a0421 Add GetResultInst. First step for multiple return value support. by Devang Patel · 17 years ago
- 31886db PR1909: Tail merging pass ran wild. It makes no sense to merge blocks in order to save a single instruction since a branch will be inserted for each BB. by Evan Cheng · 17 years ago
- efec751 - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type. by Evan Cheng · 17 years ago
- a9407f5 - Remove the previous check which broke coalescer-commute3.ll by Evan Cheng · 17 years ago
- 8dd2528 New helper function getMBBFromIndex() that given an index in any instruction of an MBB returns a pointer the MBB. Reviewed by Evan. by Roman Levenstein · 17 years ago
- 96cfff0 For now, avoid commuting def MI for copy MI's whose source is not killed. That simply trade a live interval for another and because only the non-two-address operands can be folded into loads, may end up pessimising code. by Evan Cheng · 17 years ago
- d497d9f I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support. by Andrew Lenharth · 17 years ago