1. 37527d1 Adding ARM as supported architecture by Renato Golin · 11 years ago
  2. e57aaf0 Proper XFAILs for ARMv7 / v5 by Renato Golin · 11 years ago
  3. 3a42989 Fix PR15359. by Bill Schmidt · 11 years ago
  4. 86ab766 GCC 4.6.3 O3 miscompiles on ARM by Renato Golin · 11 years ago
  5. 8eec41f Unify clang/llvm attributes for asan/tsan/msan (LLVM part) by Kostya Serebryany · 11 years ago
  6. ce522ee Use a DenseMap instead of a std::map for AnalysisID -> Pass* maps. This reduces the pass-manager overhead from FPPassManager::runOnFunction() by about 10%. by Michael Ilseman · 11 years ago
  7. 70cdcd5 [mips] Use class RegDefsUses to track register defs and uses. by Akira Hatanaka · 11 years ago
  8. fe88aa0 [fast-isel] Make sure the FastLowerArguments function checks to make sure the by Chad Rosier · 11 years ago
  9. d09318f Refine fix to PR10499, no functionality change by Michael Liao · 11 years ago
  10. 5e6e15c Fix PR10499 by Michael Liao · 11 years ago
  11. b90cc2f Provide workaround for PR 15130. by Andrew Kaylor · 11 years ago
  12. ffa1dba Fix wording. by Chad Rosier · 11 years ago
  13. 823e95d Remove extraneous attribute number. by Chad Rosier · 11 years ago
  14. fd3417d [fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 or by Chad Rosier · 11 years ago
  15. 029f4fd pre-RA-sched fix: only reevaluate physreg interferences when necessary. by Andrew Trick · 11 years ago
  16. dca8318 [ms-inline asm] Add support for the pushad/popad mnemonics. rdar://13254235 by Chad Rosier · 11 years ago
  17. 035a1f4 ARM build docs easier for copy&paste by Renato Golin · 11 years ago
  18. 50e75bf 'Hexadecimal' has two 'a's and only one 'i'. by Matt Beaumont-Gay · 11 years ago
  19. fc7695a Fix missing relocation for TLS addressing peephole optimization. by Bill Schmidt · 11 years ago
  20. 7e6ffac Fix spelling noticed by Duncan. by Chandler Carruth · 11 years ago
  21. af23f8e Fix the root cause of PR15348 by correctly handling alignment 0 on by Chandler Carruth · 11 years ago
  22. de89ecd Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters. by Reed Kotler · 11 years ago
  23. 6172f02 DIBuilder: support structs with vtable pointers in the same way as classes by David Blaikie · 11 years ago
  24. 29cb259 Make psuedo FEXT_T8I816_ins into a custom emitter. by Reed Kotler · 11 years ago
  25. 4edd84d Fix PR14364. by Bill Schmidt · 11 years ago
  26. e8aa36a CVP: If we have a PHI with an incoming select, try to skip the select. by Benjamin Kramer · 11 years ago
  27. bd4b21e Fix invalid IR in test, missing incoming value for PHI node. by Benjamin Kramer · 11 years ago
  28. f4aa644 Typo by Francois Pichet · 11 years ago
  29. f8db447 Revert r169638 because it broke Mesa llvmpipe tests. by Nadav Rotem · 11 years ago
  30. 459d35c Make psuedo FEXT_T8I816_ins a custom inserter. It should be expanded by Reed Kotler · 11 years ago
  31. cc6137e Add a use of an otherwise unused variable to remove a warning in non-Asserts by Cameron Zwarich · 11 years ago
  32. eb1b725 TwoAddressInstructionPass::tryInstructionTransform() only potentially returns by Cameron Zwarich · 11 years ago
  33. c5a6349 TwoAddrInstructionPass::tryInstructionTransform() has a case where it calls by Cameron Zwarich · 11 years ago
  34. e7c6749 Add new base instruction def for cmpi, cmp, slt and sltu so that def/uses by Reed Kotler · 11 years ago
  35. 1ea93c7 TargetInstrInfo::commuteInstruction() doesn't actually return a new instruction by Cameron Zwarich · 11 years ago
  36. abafaba Add global structure vectorization to docs by Renato Golin · 11 years ago
  37. 4ff470e Some more tests for the global structure vectorizer by Renato Golin · 11 years ago
  38. 36bd16e X86: Disable cmov-memory patterns on subtargets without cmov. by Benjamin Kramer · 11 years ago
  39. 79f5ab1 Make some fixes for LiveInterval repair with debug info. Debug value by Cameron Zwarich · 11 years ago
  40. b4bd022 Fix a bug with the LiveIntervals updating in the two-address pass found by by Cameron Zwarich · 11 years ago
  41. 4c57942 Make TwoAddressInstructionPass::sink3AddrInstruction() LiveIntervals-aware. by Cameron Zwarich · 11 years ago
  42. 80885e5 Make rescheduleMIBelowKill() and rescheduleKillAboveMI() LiveIntervals-aware in by Cameron Zwarich · 11 years ago
  43. 50354a3 Expand pseudos/macros for Selt. This is the last of the complex by Reed Kotler · 11 years ago
  44. 1e8ed25 ARM: Convenience aliases for 'srs*' instructions. by Jim Grosbach · 11 years ago
  45. 3603e9a Fixed a careless mistake. by Michael Gottesman · 11 years ago
  46. 3ce51a9 Use getSplitDebugFilename when constructing the skeleton cu and by Eric Christopher · 11 years ago
  47. e4b6790 Add a field to the compile unit of where we plan on splitting out by Eric Christopher · 11 years ago
  48. 1683b30 Add a TODO and explain when we can get rid of the isMain field. by Eric Christopher · 11 years ago
  49. 4e7cd1c Formatting. by Eric Christopher · 11 years ago
  50. d99a5a3 SelectionDAG compile time improvement. by Nadav Rotem · 11 years ago
  51. 6068932 [mips] Emit call16 operator instead of got_disp. The former allows lazy binding. by Akira Hatanaka · 11 years ago
  52. 2de6d3b Fix test by matching movaps instead of AVX-only vmovaps by Peter Collingbourne · 11 years ago
  53. c4952bf x86_64: designate most general purpose and SSE registers as callee save under coldcc by Peter Collingbourne · 11 years ago
  54. e178c4f Revert "Test commit" by Peter Collingbourne · 11 years ago
  55. dc2a700 Test commit by Peter Collingbourne · 11 years ago
  56. 70c808f An Optional<T> is pod-like if the inner type is. by Benjamin Kramer · 11 years ago
  57. b7eb784 Remove unused CHECK lines copied from another test by Pete Cooper · 11 years ago
  58. fd4af7d More tests to global struct vectorizer by Renato Golin · 11 years ago
  59. 45b2c25 Made it more explicit that the self-referential llvm.loop identifier metadata by Pekka Jaaskelainen · 11 years ago
  60. 890dc92 R600/SI: Add pattern for sign extension of i1 to i32. by Michel Danzer · 11 years ago
  61. dd24703 R600/SI: Add pattern for logical or of i1 values. by Michel Danzer · 11 years ago
  62. 86f7e67 R600/SI: Add pattern for fceil. by Michel Danzer · 11 years ago
  63. 29e05fe Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions. by Kristof Beyls · 11 years ago
  64. 351b7a1 Use references to attribute groups on the call/invoke instructions. by Bill Wendling · 11 years ago
  65. 00ddc5a Fix a nomenclature mistake. Slt->Slti in the functions. The "i" refers by Reed Kotler · 11 years ago
  66. 7617d032 Expand mips16 SelT form pseudso/macros. by Reed Kotler · 11 years ago
  67. b704ffb Fix isa<> check which could never be true. by Pete Cooper · 11 years ago
  68. 667754e Remove code copied from GenRegisterInfo.inc. by Andrew Trick · 11 years ago
  69. 46e0d1d Code cleanup: pass Offset by pointer to parseInstruction to more explicitly by Eli Bendersky · 11 years ago
  70. bd2acfa Remove warning about default covering no cases. by Bill Wendling · 11 years ago
  71. d18e0b9 Add a bitmask for NoBuiltin. This should *not* be used. by Bill Wendling · 11 years ago
  72. 143d464 Implement the NoBuiltin attribute. by Bill Wendling · 11 years ago
  73. a931a12 Stop relying on physical register kill flags in isKilled() in the two-address by Cameron Zwarich · 11 years ago
  74. 7bf3d6a Previously, parsing capability of the .debug_frame section was added by Eli Bendersky · 11 years ago
  75. 0711d46 Limit cast machinery to preserve const and not accept temporaries by David Blaikie · 11 years ago
  76. e18bce5 Allow GlobalValues to vectorize with AliasAnalysis by Renato Golin · 11 years ago
  77. b489e29 Re-apply r175688, with the changes suggested by Jakob in PR15320. by Lang Hames · 11 years ago
  78. 5e5529c Remove dead code and whitespace. by Chad Rosier · 11 years ago
  79. 633e24d Clear the whole table including the tombstones, since the tombstone count will by Pedro Artigas · 11 years ago
  80. 700ed80 Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo by Eli Bendersky · 11 years ago
  81. fece442 Don't assert on empty attributes. by Bill Wendling · 11 years ago
  82. 6585d3b Hexagon: Expand cttz, ctlz, and ctpop for now. by Anshuman Dasgupta · 11 years ago
  83. 601158a Make RAFast::UsedInInstr indexed by register units. by Jakob Stoklund Olesen · 11 years ago
  84. b300455 Radar numbers don't belong in source code. by Evan Cheng · 11 years ago
  85. 399eafb Trivial cleanup by Bill Schmidt · 11 years ago
  86. 8f0696c add missing space which prevented the llvm.loop code-block from appearing in the by Paul Redmond · 11 years ago
  87. 53b0b0e Large code model support for PowerPC. by Bill Schmidt · 11 years ago
  88. f6c80bd Revert r175688 - It broke a test case (see PR15320). by Lang Hames · 11 years ago
  89. 8389f24 getX86SubSuperRegister has a special mode with High=true for i64 which by Eli Bendersky · 11 years ago
  90. f31bd0f DAGCombiner: Make the post-legalize vector op optimization more aggressive. by Benjamin Kramer · 11 years ago
  91. 1484904 R600/SI: inline V_ADD|SUB_F32 patterns by Christian Konig · 11 years ago
  92. 4fb9825 R600/SI: replace IMPLICIT_DEF with SIOperand.ZERO by Christian Konig · 11 years ago
  93. 1fbb3b3 R600/SI: replace SI_V_CNDLT with a pattern by Christian Konig · 11 years ago
  94. 664a061 R600/SI: use patterns for clamp, fabs, fneg by Christian Konig · 11 years ago
  95. 53f22df R600/SI: add all the other missing asm operands v2 by Christian Konig · 11 years ago
  96. ee44118 R600/SI: add the missing M*BUF|IMG asm operands by Christian Konig · 11 years ago
  97. f17d0d6 R600/SI: add the missing S_* asm operands by Christian Konig · 11 years ago
  98. b4dc10c R600/SI: rework VOP3 classes by Christian Konig · 11 years ago
  99. 7b3dab2 R600/SI: simplify VOPC_* pattern v2 by Christian Konig · 11 years ago
  100. 477963a R600/SI: rework VOP2_* pattern v2 by Christian Konig · 11 years ago