- 3965b5e Add a possibility to switch between CFI directives- and table-based frame description emission. Currently all the backends use table-based stuff. by Anton Korobeynikov · 15 years ago
- 9a1ef4e Add CFI directives-based frame information emission. Not hooked yet. by Anton Korobeynikov · 15 years ago
- d7e8ddc Split stuff as a preparation for CFI directives-based frame information emission by Anton Korobeynikov · 15 years ago
- f697c8a Support for precise scheduling of the instruction selection DAG, by Andrew Trick · 15 years ago
- 0422390 Try for the third time to teach getFirstTerminator() about debug values. by Jakob Stoklund Olesen · 15 years ago
- b6436e5 Revert r123419. It still breaks llvm-gcc-i386-linux-selfhost. by Jakob Stoklund Olesen · 15 years ago
- 67d9891 Set the insertion point correctly for instructions generated by load folding: by Chris Lattner · 15 years ago
- 09befe9 Try again to teach getFirstTerminator() about debug values. by Jakob Stoklund Olesen · 15 years ago
- eea666f Better terminator avoidance. by Jakob Stoklund Olesen · 15 years ago
- a6ada9f Temporary workaround for an i386 crash in LiveDebugVariables. by Jakob Stoklund Olesen · 15 years ago
- 4f28c1c Teach frame lowering to ignore debug values after the terminators. by Jakob Stoklund Olesen · 15 years ago
- a851fd8 Speculatively revert r123384 to make llvm-gcc-i386-linux-selfhost buildbot happy. by Devang Patel · 15 years ago
- 64f865c Teach MachineBasicBlock::getFirstTerminator to ignore debug values. by Jakob Stoklund Olesen · 15 years ago
- dd11ea4 Fix r123346 to handle scalar types too. by Dan Gohman · 15 years ago
- 668c9e3 Add missing space in debug output by Jakob Stoklund Olesen · 15 years ago
- b866543 Apply the patch from PR8958, which allows llc to get slightly by Dan Gohman · 15 years ago
- 25dc226 Try again enabling LiveDebugVariables. by Jakob Stoklund Olesen · 15 years ago
- f0704d2 Don't emit a DBG_VALUE for a spill slot that the rewriter decided not to use after all. by Jakob Stoklund Olesen · 15 years ago
- 12a4031 Fix braino in dominator tree walk. by Jakob Stoklund Olesen · 15 years ago
- f203627 Sometimes, old virtual registers can linger on DBG_VALUE instructions. by Jakob Stoklund Olesen · 15 years ago
- ee54709 Teach VirtRegRewriter to update slot indexes when erasing instructions. by Jakob Stoklund Olesen · 15 years ago
- 7fd747b Annotate VirtRegRewriter debug output with slot indexes. by Jakob Stoklund Olesen · 15 years ago
- fc69c37 Verify slot index ordering. by Jakob Stoklund Olesen · 15 years ago
- 7bd46da Verify that machine instruction parent pointers are consistent. by Jakob Stoklund Olesen · 15 years ago
- 2df5458 The world is not ready for LiveDebugVariables yet. by Jakob Stoklund Olesen · 15 years ago
- a518ccc Enable LiveDebugVariables by default. by Jakob Stoklund Olesen · 15 years ago
- b087737 Don't insert DBG_VALUE instructions after the first terminator. by Jakob Stoklund Olesen · 15 years ago
- a36478f Appropriately truncate debug info range in dwarf output. by Devang Patel · 15 years ago
- 93c7042 Move ExpandAtomic into the integer expansion routines - it's only used there. by Eric Christopher · 15 years ago
- 97fd9a5 Fix PR 8916 (qv for analysis), at least the immediate problem. by Dale Johannesen · 15 years ago
- 16c29b5 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. by Anton Korobeynikov · 15 years ago
- 622a11b fit in 80 cols and use MBB::isSuccessor instead of a hand rolled std::find. by Chris Lattner · 15 years ago
- c9df025 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 15 years ago
- 42e9c96 Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong results by Jakob Stoklund Olesen · 15 years ago
- 9dddf08 sort this. by Chris Lattner · 15 years ago
- be97e90 Teach TargetRegisterInfo how to cram stack slot indexes in with the virtual and by Jakob Stoklund Olesen · 15 years ago
- 2cfa5b4 Add a forgotten VireReg2IndexFunctor. by Jakob Stoklund Olesen · 15 years ago
- f78df5e Eliminate some extra hash table lookups. by Cameron Zwarich · 15 years ago
- e272dee Add an informative comment. by Cameron Zwarich · 15 years ago
- 0804ead Simplify LiveDebugVariables by storing MachineOperand copies locations instead by Jakob Stoklund Olesen · 15 years ago
- 00f93fc Shrink a BitVector that didn't mean to store bits for all physical registers. by Jakob Stoklund Olesen · 15 years ago
- 4314268 Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance. by Jakob Stoklund Olesen · 15 years ago
- 994c727 Use IndexedMap for MachineRegisterInfo as well. No functional change. by Jakob Stoklund Olesen · 15 years ago
- c7d67f9 Fix VirtRegMap to use TRI::index2VirtReg and TRI::virtReg2Index instead of by Jakob Stoklund Olesen · 15 years ago
- 98c5476 Fix a MachineVerifier loop that probably didn't mean to skip the last two by Jakob Stoklund Olesen · 15 years ago
- b421c56 Use an IndexedMap for LiveVariables::VirtRegInfo. by Jakob Stoklund Olesen · 15 years ago
- 358de24 Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister. by Jakob Stoklund Olesen · 15 years ago
- 7c88186 Fix coding style. by Cameron Zwarich · 15 years ago
- 80f6a50 Make more passes preserve dominators (or state that they preserve dominators if by Cameron Zwarich · 15 years ago
- 55d4200 Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call. by Evan Cheng · 15 years ago
- c36b706 Do not model all INLINEASM instructions as having unmodelled side effects. by Evan Cheng · 15 years ago
- 51a666f Speculatively revert r123032. by Devang Patel · 15 years ago
- 1dea232 Appropriately truncate debug info range in dwarf output. by Devang Patel · 15 years ago
- 30a343a DBG_VALUE does not have any side effects; it also makes no sense to mark it cheap as a copy. by Evan Cheng · 15 years ago
- 5e8b833 Add ARM patterns to match EXTRACT_SUBVECTOR nodes. by Bob Wilson · 15 years ago
- 67b067d Fix a comment typo. by Bob Wilson · 15 years ago
- 6736e19 Change EXTRACT_SUBVECTOR to require a constant index. by Bob Wilson · 15 years ago
- 8d90b71 Early exit if we don't have invokes. The 'Unwinds' vector isn't modified unless by Bill Wendling · 15 years ago
- d9aa800 Fix the other problem reported in PR8582. Testcase and patch by Nadav Rotem. by Duncan Sands · 15 years ago
- 8d93d19 Add some fairly duplicated code to let type legalization split illegal by Eric Christopher · 15 years ago
- 76a788c Emit 128 bit constant. This fixes PR 8913 crash. by Devang Patel · 15 years ago
- 0521928 Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy by Evan Cheng · 15 years ago
- 255874f Revert r122936. I'll re-implement the change. by Evan Cheng · 15 years ago
- 19bb35d Zap the last two -Wself-assign warnings in llvm. by Jakob Stoklund Olesen · 15 years ago
- 8bfe508 Add the SpillPlacement analysis pass. by Jakob Stoklund Olesen · 15 years ago
- 9a9d847 r105228 reduced the memcpy / memset inline limit to 4 with -Os to avoid blowing by Evan Cheng · 15 years ago
- d08e5b4 Avoid zero extend bit test operands to pointer type if all the masks fit in by Evan Cheng · 15 years ago
- 0b71d39 Optimize: by Evan Cheng · 15 years ago
- 6b705d4 Add a hidden command line option to display edge bundle graphs as they are by Jakob Stoklund Olesen · 15 years ago
- 762a17a 80-cols. by Eric Christopher · 15 years ago
- 2d31d14 Remove TODO, these appear to be implemented. by Eric Christopher · 15 years ago
- 8dd070e Turn the EdgeBundles class into a stand-alone machine CFG analysis pass. by Jakob Stoklund Olesen · 15 years ago
- 26db458 Switch to path halving from path compression for a small speedup. This also by Cameron Zwarich · 15 years ago
- 645b1d2 Eliminate repeated allocation of a per-BB DenseMap for a 4.6% reduction of time by Cameron Zwarich · 15 years ago
- fa3306a Clean up a funky pass registration that got passed over when I got rid of static constructors. by Owen Anderson · 15 years ago
- 53eeba5 Use a RecyclingAllocator to allocate values for MachineCSE's ScopedHashTable for by Cameron Zwarich · 15 years ago
- 9fc5cdf split dom frontier handling stuff out to its own DominanceFrontier header, by Chris Lattner · 15 years ago
- 8022036 Try to reuse the value when lowering memset. by Benjamin Kramer · 15 years ago
- 8c06aa1 Lower the i8 extension in memset to a multiply instead of a potentially long series of shifts and ors. by Benjamin Kramer · 15 years ago
- d16ad3e Use getVRegDef() instead of def_iterator. This leads to fewer defs being added by Cameron Zwarich · 15 years ago
- dd061b3 None of the other pass names in CodeGen have terminating periods. by Cameron Zwarich · 15 years ago
- 1558f5e Instead of processing every instruction when splitting interferences, only by Cameron Zwarich · 15 years ago
- 7fb95d4 Add a missing word to a comment. by Cameron Zwarich · 15 years ago
- 480b80a Add text explaining an assertion. by Cameron Zwarich · 15 years ago
- cb584d0 Simplify some code in MachineVerifier that was doing the correct thing, but not by Cameron Zwarich · 15 years ago
- 438e25c Revert the optimization in r122596. It is correct for all current targets, but by Cameron Zwarich · 15 years ago
- 92f0fcb6 Avoid iterating every operand of an instruction in StrongPHIElimination, since by Cameron Zwarich · 15 years ago
- 2aea490 Pacify the compiler. BestWeight cannot in fact be used uninitialized by Duncan Sands · 15 years ago
- c3ab20e Change an assertion to assert what the code actually relies upon. by Cameron Zwarich · 15 years ago
- 4e7f23b Land a first cut at StrongPHIElimination. There are only 5 new test failures by Cameron Zwarich · 15 years ago
- 4eee42c Add knowledge of phi-def and phi-kill valnos to MachineVerifier's predecessor by Cameron Zwarich · 15 years ago
- a75ce9f Minor cleanup related to my latest scheduler changes. by Andrew Trick · 15 years ago
- 2431223 Fix a few cases where the scheduler is not checking for phys reg copies. The scheduling node may have a NULL DAG node, yuck. by Andrew Trick · 15 years ago
- 2da8bc8 Various bits of framework needed for precise machine-level selection by Andrew Trick · 15 years ago
- 6e8f4c4 whitespace by Andrew Trick · 15 years ago
- ef485d8 Simplify a check for implicit defs and remove a FIXME. by Cameron Zwarich · 15 years ago
- 29d8f0c flags -> glue for selectiondag by Chris Lattner · 15 years ago
- a4359be sdisel flag -> glue. by Chris Lattner · 15 years ago
- 2902736 Reorganize ListScheduleBottomUp in preparation for modeling machine cycles and instruction issue. by Andrew Trick · 15 years ago
- 3d420cb Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows multiple nodes per cycle. by Andrew Trick · 15 years ago