- 3aef703 Update LLVM for merge to r171905. by Stephen Hines · 12 years ago
- 059800f Merge remote-tracking branch 'upstream/master' into merge-llvm by Stephen Hines · 12 years ago
- 251040b Renamed MCInstFragment to MCRelaxableFragment and added some comments. by Eli Bendersky · 12 years ago
- 00b53c1 ARM: Copy-paste error. by Jim Grosbach · 12 years ago
- 54f2187 ARM: Fix a few copy-paste errors. by Jim Grosbach · 12 years ago
- 3ebe59c Change SMRange to be half-open (exclusive end) instead of closed (inclusive) by Jordan Rose · 12 years ago
- 0c63e64 Add LICENSE.TXT covering contributions made by ARM. by Tim Northover · 12 years ago
- be04929 Move TargetTransformInfo to live under the Analysis library. This no by Chandler Carruth · 12 years ago
- aeef83c Switch TargetTransformInfo from an immutable analysis pass that requires by Chandler Carruth · 12 years ago
- 0b8c9a8 Move all of the header files which are involved in modelling the LLVM IR by Chandler Carruth · 12 years ago
- 58a2cbe Resort the #include lines in include/... and lib/... with the by Chandler Carruth · 12 years ago
- 8b62abd Remove the Function::getRetAttributes method in favor of using the AttributeSet accessor method. by Bill Wendling · 12 years ago
- 831737d Remove the Function::getFnAttributes method in favor of using the AttributeSet by Bill Wendling · 12 years ago
- 791dbb3 Use a std::string rather than a dynamically allocated char* buffer. by Benjamin Kramer · 12 years ago
- 4e23ebe Cleanup compiler warnings on discarding type qualifiers in casts. Switch to C++ style casts. by Benjamin Kramer · 12 years ago
- 38b0602 Remove duplicate includes. by Roman Divacky · 12 years ago
- e0f1d71 Add ARM cortex-r5 subtarget. by Quentin Colombet · 12 years ago
- be06aac Add an MF argument to MI::copyImplicitOps(). by Jakob Stoklund Olesen · 12 years ago
- b9efafe MachineInstrBuilderize ARM. by Jakob Stoklund Olesen · 12 years ago
- 103b4a5 Revert "Adding support for llvm.arm.neon.vaddl[su].* and" by Bob Wilson · 12 years ago
- 139e407 On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, by Evan Cheng · 12 years ago
- 6af228a Remove MCTargetAsmLexer and its derived classes now that edis, by Roman Divacky · 12 years ago
- 332bd79 Adding support for llvm.arm.neon.vaddl[su].* and by Renato Golin · 12 years ago
- fbf3b4a MC: Add MCInstrDesc::mayAffectControlFlow() method. by Jim Grosbach · 12 years ago
- 37a942c Remove the explicit MachineInstrBuilder(MI) constructor. by Jakob Stoklund Olesen · 12 years ago
- 733c6b1 LLVM sdisel normalize bit extraction of the form: by Evan Cheng · 12 years ago
- 759e3fa Remove edis - the enhanced disassembler. Fixes PR14654. by Roman Divacky · 12 years ago
- 0340557 Change TargetLowering::findRepresentativeClass to take an MVT, instead of EVT. by Patrik Hagglund · 12 years ago
- 034b94b Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future. by Bill Wendling · 12 years ago
- b519351 Disable ARM partial flag dependency optimization at -Oz by Quentin Colombet · 12 years ago
- bcc9a89 Repair bundles that were broken by removing and reinserting the first by Jakob Stoklund Olesen · 12 years ago
- 8413d2c Extract a method, no functional change intended. by Jakob Stoklund Olesen · 12 years ago
- 6290b93 [arm fast-isel] Minor cleanup. No functional change intended. by Chad Rosier · 12 years ago
- 316a5aa [arm fast-isel] Fast-isel only handles simple VTs, so make sure the necessary by Chad Rosier · 12 years ago
- 3d170e6 Revert/correct some FastISel changes in r170104 (EVT->MVT for by Patrik Hagglund · 12 years ago
- a827a47 Make sure the alternate PC+imm syntax of LDR instruction with a small by Kevin Enderby · 12 years ago
- a61b17c Change TargetLowering::getRegClassFor to take an MVT, instead of EVT. by Patrik Hagglund · 12 years ago
- 37c7461 Add ARM NONE and PREL31 relocation types. by Logan Chien · 12 years ago
- 946a3a9 Sorry about the churn. One more change to getOptimalMemOpType() hook. Did I by Evan Cheng · 12 years ago
- 7d34267 - Rename isLegalMemOpType to isSafeMemOpType. "Legal" is a very overloade term. by Evan Cheng · 12 years ago
- 61f4dfe Avoid using lossy load / stores for memcpy / memset expansion. e.g. by Evan Cheng · 12 years ago
- e202f8c Trim unneeded header #include. by Jim Grosbach · 12 years ago
- c8cd8aa ARM: Remove old testing option. by Jim Grosbach · 12 years ago
- 48aa2cf ARM: Remove old testing options. by Jim Grosbach · 12 years ago
- e07f85e Replace TargetLowering::isIntImmLegal() with by Evan Cheng · 12 years ago
- 34525f9 Revert EVT->MVT changes, r169836-169851, due to buildbot failures. by Patrik Hagglund · 12 years ago
- bade034 Change TargetLowering::findRepresentativeClass to take an MVT, instead of EVT. by Patrik Hagglund · 12 years ago
- 8163ca7 Change TargetLowering::getRegClassFor to take an MVT, instead of EVT. by Patrik Hagglund · 12 years ago
- 6a1b5cc Stylistic tweak. by Evan Cheng · 12 years ago
- 425e951 Fall back to the selection dag isel to select tail calls. by Chad Rosier · 12 years ago
- 376642e Some enhancements for memcpy / memset inline expansion. by Evan Cheng · 12 years ago
- 0c66e07 Simplify code. Sort includes. No functionality change. by Benjamin Kramer · 12 years ago
- 0956ae5 Fix a use-after-free bug found by ASan. You can't assign a temporary by Chandler Carruth · 12 years ago
- 6eb3e87 Added Mapping Symbols for ARM ELF by Tim Northover · 12 years ago
- c4e8ddf Add a 'using' declaration to suppress GCC's -Woverloaded-virtual while we by Matt Beaumont-Gay · 12 years ago
- 2766a47 Replace r169459 with something safer. Rather than having computeMaskedBits to by Evan Cheng · 12 years ago
- c9758b1 [arm fast-isel] Make the fast-isel implementation of memcpy respect alignment. by Chad Rosier · 12 years ago
- 8a7186d Let targets provide hooks that compute known zero and ones for any_extend by Evan Cheng · 12 years ago
- f2a1c83 Correct ARM NOP encoding by David Sehr · 12 years ago
- 14ccc90 Added a option to the disassembler to print immediates as hex. by Kevin Enderby · 12 years ago
- 105ab4f Appease GCC's -Wparentheses. by Matt Beaumont-Gay · 12 years ago
- c8e7045 ARM custom lower ctpop for vector types. Patch by Pete Couperus. by Evan Cheng · 12 years ago
- f659c0d Make NaCl naming consistent. The triple OSType is called NaCl and is represented by Eli Bendersky · 12 years ago
- a1514e2 Sort includes for all of the .h files under the 'lib' tree. These were by Chandler Carruth · 12 years ago
- f714156 Remove the old TRI::ResolveRegAllocHint() and getRawAllocationOrder() hooks. by Jakob Stoklund Olesen · 12 years ago
- 303da1b Implement ARMBaseRegisterInfo::getRegAllocationHints(). by Jakob Stoklund Olesen · 12 years ago
- d04a8d4 Use the new script to sort the includes of every file under lib. by Chandler Carruth · 12 years ago
- cb49530 Codegen failure for vmull with small vectors by Sebastian Pop · 12 years ago
- 1c83093 Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInst by Kevin Enderby · 12 years ago
- 8facb9e Add cortex-a5 subtarget to the supported ARM architectures by Quentin Colombet · 12 years ago
- 35b3df6 Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend. by Silviu Baranga · 12 years ago
- 350c008 ARM: Implement CanLowerReturn so large vectors get expanded into sret. by Benjamin Kramer · 12 years ago
- a9fa4fd Remove all references to TargetInstrInfoImpl. by Jakob Stoklund Olesen · 12 years ago
- 6e99a8c [arm fast-isel] Appease the machine verifier by using the proper register by Chad Rosier · 12 years ago
- b1146a2 [arm fast-isel] Appease the machine verifier by using the proper register by Chad Rosier · 12 years ago
- ac3158b [arm fast-isel] Appease the machine verifier by using the proper register by Chad Rosier · 12 years ago
- fc17ddd [arm fast-isel] Appease the machine verifier by using the proper register by Chad Rosier · 12 years ago
- ed9e442 Decouple MCInstBuilder from the streamer per Eli's request. by Benjamin Kramer · 12 years ago
- 391271f Add MCInstBuilder, a utility class to simplify MCInst creation similar to MachineInstrBuilder. by Benjamin Kramer · 12 years ago
- cb4028b ARM: Share applyFixup between ELF and Darwin. by Benjamin Kramer · 12 years ago
- 43147af Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete Couperus. by Eli Friedman · 12 years ago
- 8b149cb Rename methods like PairSRegs() to createSRegpairNode() to meet our coding by Weiming Zhao · 12 years ago
- e56764b Remove hard coded registers in ARM ldrexd and strexd instructions by Weiming Zhao · 12 years ago
- b1a392e Make sure FABS on v2f32 and v4f32 is legal on ARM NEON This fixes PR14359 by Anton Korobeynikov · 12 years ago
- 846ce8e Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missing by Eli Friedman · 12 years ago
- 79c07d2 Use empty parens for empty function parameter list instead of '(void)'. by Dmitri Gribenko · 12 years ago
- 116bd16 Revert changing FNEG of v4f32 to Expand. It's legal. by Craig Topper · 12 years ago
- b916904 Make FNEG and FABS of v4f32 Expand. by Craig Topper · 12 years ago
- 4901047 Add llvm.ceil, llvm.trunc, llvm.rint, llvm.nearbyint intrinsics. by Craig Topper · 12 years ago
- 50b6638 The code pattern "imm0_255_neg" is used for checking if an immediate value is a small negative number. by Nadav Rotem · 12 years ago
- 25efd6d Use TARGET2 relocation for TType references on ARM. by Anton Korobeynikov · 12 years ago
- 9b5caaa misched: Target-independent support for load/store clustering. by Andrew Trick · 12 years ago
- b341fac Disable the Thumb no-return call optimization: mov lr, pc b.w _foo by Evan Cheng · 12 years ago
- 12cfa11 Add ARM TARGET2 relocation. The testcase will follow with actualy use-case. by Anton Korobeynikov · 12 years ago
- b3235b1 Revert r167620; this can be implemented using an existing CL option. by Chad Rosier · 12 years ago
- d054eda Add support for -mstrict-align compiler option for ARM targets. rdar://12340498 by Chad Rosier · 12 years ago
- 214fd3d Recommit modified r167540. by Amara Emerson · 12 years ago
- 162d91c Revert r167540 until regression tests are updated. by Amara Emerson · 12 years ago
- 19a1fcf Improve ARM build attribute emission for architectures types. by Amara Emerson · 12 years ago
- 6aa6e5a [arm fast-isel] Appease the machine verifier by using the proper register by Chad Rosier · 12 years ago