1. 39bdc55 Shrink and reorder some fields in MCOperandInfo to fit it in 8 bytes to reduce size of static tables. by Craig Topper · 13 years ago
  2. faf72ff Fix the x86 disassembler to at least print the lock prefix if it is the first by Kevin Enderby · 13 years ago
  3. 89d8139 TableGen/CodeEmitterGen.cpp: Fix an expression of generating bitmask. by NAKAMURA Takumi · 13 years ago
  4. fac2598 Use uint16_t to store instruction implicit uses and defs. Reduces static data. by Craig Topper · 13 years ago
  5. 88d2fa4 Re-commit r152202 hopefully fixing the MSVC linker error. by Craig Topper · 13 years ago
  6. 3c77794 Revert r152202 as it's causing internal buildbot failures. by Chad Rosier · 13 years ago
  7. d3c9d94 Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. by Craig Topper · 13 years ago
  8. 4d0983a ARM more NEON VLD/VST composite physical register refactoring. by Jim Grosbach · 13 years ago
  9. c0fc450 ARM refactor more NEON VLD/VST instructions to use composite physregs by Jim Grosbach · 13 years ago
  10. 40530ad Fix support for encodings up to 64-bits in length. TableGen was silently truncating them to 32-bits prior to this. by Owen Anderson · 13 years ago
  11. f0c094b Use uint16_t to store indices into string table since C++ only allows 64K string literals so the index into the big string can never be larger than that. by Craig Topper · 13 years ago
  12. 904a018 Add asserts to ensure that values will fit into the tables. by Craig Topper · 13 years ago
  13. 7cc0426 Nuke a bit of dead code. by Jim Grosbach · 13 years ago
  14. c3384c9 ARM Refactor VLD/VST spaced pair instructions. by Jim Grosbach · 13 years ago
  15. 28f08c9 ARM refactor away a bunch of VLD/VST pseudo instructions. by Jim Grosbach · 13 years ago
  16. 52b89dd Shrink and reorder fields in MCRegisterClass to reduce size of static data. by Craig Topper · 13 years ago
  17. 9ebfbf8 Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size. by Craig Topper · 13 years ago
  18. e4fd907 Use uint16_t to store register overlaps to reduce static data. by Craig Topper · 13 years ago
  19. b6632ba Use uint16_t instead of unsigned to store registers in reg classes. Reduces static data size. by Craig Topper · 13 years ago
  20. 015f228 Use uint16_t to store registers in callee saved register tables to reduce size of static data. by Craig Topper · 13 years ago
  21. 991271d Use uint8_t instead of enums to store values in X86 disassembler table. Shaves 150k off the size of X86DisassemblerDecoder.o by Craig Topper · 13 years ago
  22. b08bb34 Perform the string table optimization for OperandMatchEntries too. by Benjamin Kramer · 13 years ago
  23. a4c5ecf Shrink the asm matcher tables. by Benjamin Kramer · 13 years ago
  24. 02ee753 StringToOffsetTable: Allow uniquing the first element, add an option to skip appending a terminating null. by Benjamin Kramer · 13 years ago
  25. 6131873 Honour --config-prefix also for lit.local.cfg. by Duncan Sands · 13 years ago
  26. 4b1212b Move getSubRegIndex out of generated code into MCRegisterInfo, devirtualize it. by Benjamin Kramer · 13 years ago
  27. b3acdcc Move TargetRegisterInfo::getSubReg() to MCRegisterInfo. by Jim Grosbach · 13 years ago
  28. 194f3fa Revert "Emit the SubRegTable with the smallest possible integer type." by Jim Grosbach · 13 years ago
  29. ccc8d3b Make TargetRegisterClasses non-virtual by making the only virtual function a function pointer. by Benjamin Kramer · 13 years ago
  30. 36a2138 Emit the "is an intrinsic overloaded" table as a bitfield. by Benjamin Kramer · 13 years ago
  31. b519a0f Emit the intrinsic modref info as a lookup table instead of a huge switch. by Benjamin Kramer · 13 years ago
  32. 6c449eb Implement getSubRegIndex as a linear search on the SubRegTable instead of using a big switch. by Benjamin Kramer · 13 years ago
  33. 9c826d2 Tidy up. 80 columns. by Jim Grosbach · 13 years ago
  34. b9ace02 Emit the SubRegTable with the smallest possible integer type. by Benjamin Kramer · 13 years ago
  35. eea8715 Tidy up. Spelling. by Jim Grosbach · 13 years ago
  36. 5d9651d Move the subregister indicies enum into the REGINFO_ENUM section. by Jim Grosbach · 13 years ago
  37. 95b38ae Switch TargetRegisterInfo::getSubReg() to use a lookup table. by Jim Grosbach · 13 years ago
  38. 1f59523 Convert generated intrinsic attributes to use an array lookup as Chris suggested in PR11951. by Craig Topper · 13 years ago
  39. a1c5b8e Update tblgen command guide. Remove unused tblgen InstrEnumEmitter files. by Craig Topper · 13 years ago
  40. 930a1eb X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo. by Craig Topper · 13 years ago
  41. 9d91c5d Remove 'if' from getSuperRegisters, getSubRegisters, and getOverlaps that were added in r151038. by Craig Topper · 13 years ago
  42. 13b151c Remove bad comma from .el file. by Bill Wendling · 13 years ago
  43. cebb4ee Add Foreach Loop by David Greene · 13 years ago
  44. c528e46 Declare register classes as const. Fix a couple pointers to register classes that weren't already const. by Craig Topper · 13 years ago
  45. 44d2382 Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified. by Craig Topper · 13 years ago
  46. 7d9b207 Reorder some members in MCRegisterClass to remove padding on 64-bit builds. by Craig Topper · 13 years ago
  47. f3e3783 In generated RegisterInfo files, replace a pointer to the end of an array with just the size of the array to avoid relocations. by Craig Topper · 13 years ago
  48. 902af25a Merge some tables in generated RegisterInfo file. Store indices into larger table instead of pointers to reduce relocations and shrink table size on 64-bit builds. Shaves ~24K off X86MCTargetDesc.o. Accidentally commited only part of this in r151038. by Craig Topper · 13 years ago
  49. b0934ab Remove dead code. Improve llvm_unreachable text. Simplify some control flow. by Ahmed Charles · 13 years ago
  50. 28a713b Add vmfunc instruction to X86 assembler and disassembler. by Craig Topper · 13 years ago
  51. 9e3d0b3 Add X86 assembler and disassembler support for AMD SVM instructions. Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication. by Craig Topper · 13 years ago
  52. 5b10656 utils: Kill NewNightlyTest.pl, which has been replaced by LNT (as far as I know). by Daniel Dunbar · 13 years ago
  53. 88b6fc0 Make the EDis tables const. by Benjamin Kramer · 13 years ago
  54. 953362c Reuse the enum names from X86Desc in the X86Disassembler. by Benjamin Kramer · 13 years ago
  55. c667ba6 Put instruction names into an indexed string table on the side, removing a pointer from MCInstrDesc. by Benjamin Kramer · 13 years ago
  56. 2c6ae09 Store just the SimpleValueType in the generated VT tables for each register class, eliminating static ctors. by Benjamin Kramer · 13 years ago
  57. 133f9d9 Move the Name field in MCInstrDesc to the end, saving 8 bytes of padding per entry on x86_64. by Benjamin Kramer · 13 years ago
  58. 3015dfb Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage. by James Molloy · 13 years ago
  59. f41ab77 More tweaks to get the size of the X86 disassembler tables down. by Craig Topper · 13 years ago
  60. ce8f4c5 Flatten some of the arrays in the X86 disassembler tables to reduce space needed to store pointers on 64-bit hosts and reduce relocations needed at startup. Part of PR11953. by Craig Topper · 13 years ago
  61. 9bcc7a6 Don't map registers to the invalid dwarf register (-1). It's the default value. by Benjamin Kramer · 13 years ago
  62. 90a468c Value initialize MCRegisterClasses. Not sure how could miss this during the MCTargetDesc refactor. by Benjamin Kramer · 13 years ago
  63. d0b3da1 This is a small patch with a couple of improvements for running lit with --debug: by Andrew Trick · 13 years ago
  64. 655b8de Convert assert(0) to llvm_unreachable by Craig Topper · 13 years ago
  65. ffbd071 Increment DFAStateEntryTable index for sentinel entry. by Brendon Cahoon · 13 years ago
  66. 1aee22e Replace the old --with-cxx-* configure options with a single --with-gcc-toolchain by Rafael Espindola · 13 years ago
  67. b5af2d9 Specify SubRegIndex components on the index itself. by Jakob Stoklund Olesen · 13 years ago
  68. ee59920 Fix a bug in the TopoOrderRC comparison function. by Jakob Stoklund Olesen · 13 years ago
  69. f18a9a2 Avoid emitting empty arrays, they're not standard C++. by Jakob Stoklund Olesen · 13 years ago
  70. ed2d17b Don't assign a value to NUM_TARGET_NAMED_SUBREGS. by Jakob Stoklund Olesen · 13 years ago
  71. 90498b1 Move the composite map into CodeGenSubRegIndex. by Jakob Stoklund Olesen · 13 years ago
  72. 5fcc156 Add a TableGen CodeGenSubRegIndex class. by Jakob Stoklund Olesen · 13 years ago
  73. 0c6e177 Remove Deprecated Features by David Greene · 13 years ago
  74. f26475a Use -H on darwin as well. by Eric Christopher · 13 years ago
  75. f35307c Tidy up. Trailing whitespace. by Jim Grosbach · 13 years ago
  76. 4f8dc7b Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand. by Owen Anderson · 13 years ago
  77. 5b52f6d Add an (interleave A, B, ...) SetTheory operator. by Jakob Stoklund Olesen · 13 years ago
  78. 69c96d7 Help GCC along with code that's actually unreachable. by David Blaikie · 13 years ago
  79. a36dda2 Remove unreachable defaults from gtest. by David Blaikie · 13 years ago
  80. 164b86b Extend Attributes to 64 bits by Kostya Serebryany · 13 years ago
  81. 3186766 Add a CoveredBySubRegs property to Register descriptions. by Jakob Stoklund Olesen · 13 years ago
  82. 7434c9a [lit] Add a --filter option which is useful when dealing with virtual test by Daniel Dunbar · 13 years ago
  83. ec57253 Add TableGen support for callee saved registers. by Jakob Stoklund Olesen · 13 years ago
  84. 40bced0 Intel syntax: Ignore mnemonic aliases. by Devang Patel · 13 years ago
  85. f61f22a Add an LLDB data formatter script for llvm::SmallVector, maybe this is helpful to someone else. by Benjamin Kramer · 13 years ago
  86. 58bd151 Provide better messages in llvm_unreachable. by David Blaikie · 13 years ago
  87. fdebc38 Remove unreachable code. (replace with llvm_unreachable to help GCC where necessary) by David Blaikie · 13 years ago
  88. 2dd674f Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly. by David Blaikie · 13 years ago
  89. 794481d Skip the NAME field when forming tuples. by Jakob Stoklund Olesen · 13 years ago
  90. 8dd6f0c Delete CodeInit and CodeRecTy from TableGen. by Jakob Stoklund Olesen · 13 years ago
  91. ddfda5c Added MVT::v2f16 by Pete Cooper · 13 years ago
  92. 08713b3 Disable the crash reporter when running lit tests. by Argyrios Kyrtzidis · 13 years ago
  93. 56315d3 Record asm variant id in MatchEntry and check it while matching instruction. by Devang Patel · 13 years ago
  94. 2bd3354 Remove unnecessary default cases in switches that cover all enum values. by David Blaikie · 13 years ago
  95. d06b01c Use descriptive variable name and remove incorrect operand number check. by Devang Patel · 13 years ago
  96. 0dbcada Split AsmParser into two components - AsmParser and AsmParserVariant by Devang Patel · 13 years ago
  97. f321e10 Remove VectorExtras. This unused helper was written for a type of API that is discouraged now. by Benjamin Kramer · 13 years ago
  98. 82f0002 Fix TableGen so that it will emit the correct signature for FastEmit_f: by Cameron Zwarich · 13 years ago
  99. 63faf82 Refactor. by Devang Patel · 13 years ago
  100. b78307f Eliminate an error check that may not work with all asm syntax variants. by Devang Patel · 13 years ago