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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 3feb0170a8d65984ce5c01a85e7dfd4005f8bb35 / lib / CodeGen
  1. 3feb017 Allow insert_subreg into implicit, target-specific values. by Christopher Lamb · 17 years ago
  2. b8cafe3 Increase ISD::ParamFlags to 64 bits. Increase the ByValSize by Dale Johannesen · 17 years ago
  3. 4c55c63 remove an extraneous (and ugly) default argument, thanks Duncan. by Chris Lattner · 17 years ago
  4. 4468c1f fp_round's produced by getCopyFromParts should always be exact, because by Chris Lattner · 17 years ago
  5. f30e1cf teach X86InstrInfo::copyRegToReg how to copy into ST(0) from by Chris Lattner · 17 years ago
  6. 02b6d25 Add ScheduleDAG support for copytoreg where the src/dst register are by Chris Lattner · 17 years ago
  7. d9c4c45 fix 80 col violation by Chris Lattner · 17 years ago
  8. d43d85c extend fp values with FP_EXTEND not FP_ROUND. by Chris Lattner · 17 years ago
  9. f9d95c8 Fix two problems in SelectionDAGLegalize::ExpandBUILD_VECTOR's handling by Chris Lattner · 17 years ago
  10. f3ba434 Teach SD some vector identities, allowing us to compile vec_set-9 into: by Chris Lattner · 17 years ago
  11. 27b7db5 Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. by Evan Cheng · 17 years ago
  12. d93ae24 Something that kills a super-register also kills the sub-register. by Bill Wendling · 17 years ago
  13. d68f47c Fixed a register scavenger bug. If a def is re-defining part of a super register, there must be an implicit def of the super-register on the MI. by Evan Cheng · 17 years ago
  14. ed1fcd8 When setting the "unused" info, take into account something like this: by Bill Wendling · 17 years ago
  15. eb49c4e 80 col violation. by Evan Cheng · 17 years ago
  16. 2cf36e0 some more spelling changes by Gabor Greif · 17 years ago
  17. 433f6f6 Constant fold SIGN_EXTEND_INREG with ashr not lshr. by Evan Cheng · 17 years ago
  18. ecb2a8b Fix a coalescer bug wrt how dead copy interval is shortened. by Evan Cheng · 17 years ago
  19. 0ea0356 Clarify that CALLSEQ_START..END may not be nested, by Dale Johannesen · 17 years ago
  20. ec4a567 Generalize FP constant shrinking optimization to apply to any vt by Chris Lattner · 17 years ago
  21. aa2acbb Improve comment, pass in the original VT so that we can shrink a long double constant by Chris Lattner · 17 years ago
  22. 34bc178 Codegen support for i128 UINT_TO_FP. This just fixes a by Dan Gohman · 17 years ago
  23. 6fd599f Add a target lowering hook to control whether it's worthwhile to compress fp constant. by Evan Cheng · 17 years ago
  24. d19189e 64bit CAS on 32bit x86. by Andrew Lenharth · 17 years ago
  25. d91446d Codegen support for i128 SINT_TO_FP. by Dan Gohman · 17 years ago
  26. 6130f66 Refactor code. Remove duplicated functions that basically do the same thing as by Evan Cheng · 17 years ago
  27. d86449e Some improvements related to the computation of heights, depths of SUnits. by Roman Levenstein · 17 years ago
  28. ef12057 Refactor ExpandConstantFP so it can optimize load from constpool of types larger than f64 into extload from smaller types. by Evan Cheng · 17 years ago
  29. 76782f4 Did I say 'e = getNumOperands()'? I meant --e, of course. by Bill Wendling · 17 years ago
  30. 917be68 Rename isOperand() to isOperandOf() (and other similar methods). It always confuses me. by Evan Cheng · 17 years ago
  31. 405abff Miscellaneous clean-ups based on Evan's feedback: by Bill Wendling · 17 years ago
  32. 220a823 Misc. APInt-ification in the DAGCombiner. by Dan Gohman · 17 years ago
  33. bb271ff More APInt-ification. by Dan Gohman · 17 years ago
  34. 3370dd7 Yet more APInt-ification. by Dan Gohman · 17 years ago
  35. 6c6cd1c More APInt-ification. by Dan Gohman · 17 years ago
  36. 050f550 More APInt-ification. by Dan Gohman · 17 years ago
  37. 4a23d72 Go through the machine instruction's operands to make sure that we're not by Bill Wendling · 17 years ago
  38. a0a570c Make the register scavenger update the bookkeeping values for sub/super by Bill Wendling · 17 years ago
  39. 988a578 Multiple instructions can be inserted when eliminating frame indexes. We need by Bill Wendling · 17 years ago
  40. 26ed869 all but CAS working on x86 by Andrew Lenharth · 17 years ago
  41. 3c8b59c Add MVT::is128BitVector and is64BitVector. Shrink by Dale Johannesen · 17 years ago
  42. 84d4a2b Refactor / clean up code; remove td list scheduler special tie breaker (no real benefit). by Evan Cheng · 17 years ago
  43. 05548eb Don't fill eh frames even though these are text sections. by Evan Cheng · 17 years ago
  44. 97e3c01 If we reload a virtual register that's already been assigned, we want to mark by Bill Wendling · 17 years ago
  45. 4f658e9 Fix PR2112: don't run loop aligner if target doesn't have a TargetLowering object. by Evan Cheng · 17 years ago
  46. bec2c0c No need for coalescer to update kills. Only copies are coalesced and those instructions will be deleted. Doh. by Evan Cheng · 17 years ago
  47. 8f14da1 Remove redundant #include. by Evan Cheng · 17 years ago
  48. 6c23150 More APInt-ification. by Dan Gohman · 17 years ago
  49. c7773bf Use the new convertFromAPInt instead of convertFromZeroExtendedInteger, by Dan Gohman · 17 years ago
  50. c6f9a06 Use the new APInt-enabled form of getConstant instead of converting by Dan Gohman · 17 years ago
  51. d703ed6 Added option -align-loops=<true/false> to disable loop aligner pass. by Evan Cheng · 17 years ago
  52. 28d08fd Interface of getByValTypeAlignment differed between by Dale Johannesen · 17 years ago
  53. cd9f174 Fix an assertion message. by Dale Johannesen · 17 years ago
  54. 643afa5 Keep track how many commutes are performed by the scheduler. by Evan Cheng · 17 years ago
  55. e07415d implement expand for ISD::DECLARE by just deleting it. by Chris Lattner · 17 years ago
  56. fb8075d Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. by Evan Cheng · 17 years ago
  57. 8155d64 Handle load/store of misaligned vectors that are the by Dale Johannesen · 17 years ago
  58. 21b3f31 Fix a bug in dead spill slot elimination. by Evan Cheng · 17 years ago
  59. 18714ae Remove the `else', at Evan's insistence. by Dan Gohman · 17 years ago
  60. 052e976 Add a FIXME about the VECTOR_SHUFFLE evil hack. by Duncan Sands · 17 years ago
  61. 077f9b2 LegalizeTypes support for EXTRACT_VECTOR_ELT. The by Duncan Sands · 17 years ago
  62. 8745b52 LegalizeTypes support for legalizing the mask by Duncan Sands · 17 years ago
  63. 4f069e6 LegalizeTypes support for INSERT_VECTOR_ELT. by Duncan Sands · 17 years ago
  64. be680dc Don't track max alignment during stack object allocations since they can be deleted later. Let PEI compute it. by Evan Cheng · 17 years ago
  65. e90a615 Support for legalizing MEMBARRIER. by Duncan Sands · 17 years ago
  66. 6ef781f Final de-tabification. by Bill Wendling · 17 years ago
  67. d365312 Spiller now remove unused spill slots. by Evan Cheng · 17 years ago
  68. 1953ecb Teach Legalize how to expand an EXTRACT_ELEMENT. by Dan Gohman · 17 years ago
  69. b3564aa Convert the last remaining users of the non-APInt form of by Dan Gohman · 17 years ago
  70. 7b8d4a9 Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt. by Dan Gohman · 17 years ago
  71. fe42462 Use a smallvector for inactiveCounts and initialize it lazily by Chris Lattner · 17 years ago
  72. e6d088a Rename PrintableName to Name. by Bill Wendling · 17 years ago
  73. 74ab84c Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool by Bill Wendling · 17 years ago
  74. 4d535ca Enable -coalescer-commute-instrs by default. by Evan Cheng · 17 years ago
  75. d4cf992 Avoid aborting on invalid shift counts. by Dan Gohman · 17 years ago
  76. aeecb6c Fix PR2096, a regression introduced with my patch last night. This by Chris Lattner · 17 years ago
  77. 212a11c Fix a nasty bug in LegalizeTypes (spotted in by Duncan Sands · 17 years ago
  78. f059deb De-tabify. by Bill Wendling · 17 years ago
  79. c886c46 This is possible: by Evan Cheng · 17 years ago
  80. 0254e70 Fix isNegatibleForFree to not return true for ConstantFP nodes by Chris Lattner · 17 years ago
  81. 5c80760 Refactor inline asm constraint matching code out of SDIsel into TargetLowering. by Evan Cheng · 17 years ago
  82. f6283fd Make some static variables const. by Dan Gohman · 17 years ago
  83. 2e68b6f Convert MaskedValueIsZero and all its users to use APInt. Also add by Dan Gohman · 17 years ago
  84. e83a275 All remat'ed loads cannot be folded into two-address code. Not just argument loads. This change doesn't really have any impact on codegen. by Evan Cheng · 17 years ago
  85. 1a9c9df In debug builds check that the key property holds: all by Duncan Sands · 17 years ago
  86. 79a0c1e Correctly determine whether a argument load can be folded into its uses. by Evan Cheng · 17 years ago
  87. 14fd63c Add support to LegalizeTypes for building legal vectors by Duncan Sands · 17 years ago
  88. 181eb73 Some platforms use the same name for 32-bit and 64-bit registers (like by Bill Wendling · 17 years ago
  89. 249ded3 Rematerialization logic was overly conservative when it comes to loads from fixed stack slots. by Evan Cheng · 17 years ago
  90. 298bbe8 If remating a machine instr with virtual register operand, make sure the vr is avaliable at all uses regardless of whether it would be folded. by Evan Cheng · 17 years ago
  91. dd3465e Recognize loads of arguments as re-materializable first. Therefore if isReallyTriviallyReMaterializable() returns true it doesn't confuse it as a "normal" re-materializable instruction. by Evan Cheng · 17 years ago
  92. 313d4b8 Fix spill weight updating bug. by Evan Cheng · 17 years ago
  93. 672e550 Same isPhysRegAvailable bug as local register allocator. by Evan Cheng · 17 years ago
  94. bcfa1ca Really really bad local register allocator bug. On X86, it was never using ESI, EDI, and EBP because of a bug in RALocal::isPhysRegAvailable(). For example, when by Evan Cheng · 17 years ago
  95. 9af7090 Add debugging printfs. by Evan Cheng · 17 years ago
  96. b2fd65f Make sure reload of implicit uses are issued before remat's. by Evan Cheng · 17 years ago
  97. 08e78b1 Pass alignment on ByVal parameters, from FE, all by Dale Johannesen · 17 years ago
  98. d70dbb5 Enable re-materialization of instructions which have virtual register operands if by Evan Cheng · 17 years ago
  99. becda48 Fix compiler warning. by Evan Cheng · 17 years ago
  100. 9e255b7 Fix a regression in 403.gcc and 186.crafty introduced in 47383. To test by Dan Gohman · 17 years ago