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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 4071a711126a2a75585a32b96bb5d15ea267a915 / lib / Target / ARM / ARMISelLowering.cpp
  1. 4071a71 Do some peephole optimizations to remove pointless VMOVs from Neon to integer by Cameron Zwarich · 14 years ago
  2. 8e23e81 Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs. by Evan Cheng · 14 years ago
  3. 463d358 Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier by Evan Cheng · 14 years ago
  4. ee2e0e3 Don't try to create zero-sized stack objects. by Evan Cheng · 14 years ago
  5. c0e6d78 Add a ARM-specific SD node for VBSL so that forms with a constant first operand by Cameron Zwarich · 14 years ago
  6. 92e3916 Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends by Evan Cheng · 14 years ago
  7. 3007d33 Add Neon SINT_TO_FP and UINT_TO_FP lowering from v4i16 to v4f32. Fixes by Cameron Zwarich · 14 years ago
  8. 78fe9ab Optimizing (zext A + zext B) * C, to (VMULL A, C) + (VMULL B, C) during by Evan Cheng · 14 years ago
  9. 29aeed1 Fix the bfi handling for or (and a mask) (and b mask). We need the two by Eric Christopher · 14 years ago
  10. 485fafc Re-apply r127953 with fixes: eliminate empty return block if it has no predecessors; update dominator tree if cfg is modified. by Evan Cheng · 14 years ago
  11. 7a90e04 Revert r127953, "SimplifyCFG has stopped duplicating returns into predecessors by Daniel Dunbar · 14 years ago
  12. ae16d6b SimplifyCFG has stopped duplicating returns into predecessors to canonicalize IR by Evan Cheng · 14 years ago
  13. 0d4c9d9 The VTBL (and VTBX) instructions are rather permissive concerning the masks they by Bill Wendling · 14 years ago
  14. a24cb40 Some minor cleanups based on feedback. by Bill Wendling · 14 years ago
  15. 69a05a7 Generate a VTBL instruction instead of a series of loads and stores when we by Bill Wendling · 14 years ago
  16. 21a6179 Indentation. by Evan Cheng · 14 years ago
  17. 79f56c9 Fix a compiler crash where a Glue value had multiple uses. Radar 9049552. by Bob Wilson · 14 years ago
  18. 1b772f9 Fix comment typos. by Bob Wilson · 14 years ago
  19. be2119e Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo. by Cameron Zwarich · 14 years ago
  20. 4faa0e1 Remove unused conditional negate operations. by Bob Wilson · 14 years ago
  21. c24ab5c Fix a typo which cause dag combine crash. rdar://9059537. by Evan Cheng · 14 years ago
  22. f222e59 Support for byval parameters on ARM. Will be enabled by a forthcoming by Stuart Hastings · 14 years ago
  23. e573fb3 More fcopysign correctness and performance fix. by Evan Cheng · 14 years ago
  24. 68e6bee Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns." by Devang Patel · 14 years ago
  25. 7973f35 Implement sdiv & udiv for <4 x i16> and <8 x i8> NEON vector types. by Nate Begeman · 14 years ago
  26. c143dd4 Fix buggy fcopysign lowering. by Evan Cheng · 15 years ago
  27. aa26102 Fix an obvious typo which caused an isel assertion. rdar://8964854. by Evan Cheng · 15 years ago
  28. 1c3ef90 Add codegen support for using post-increment NEON load/store instructions. by Bob Wilson · 15 years ago
  29. 31959b1 Given a pair of floating point load and store, if there are no other uses of by Evan Cheng · 15 years ago
  30. e9a7ea6 Keep track of incoming argument's location while emitting LiveIns. by Devang Patel · 15 years ago
  31. 5899a60 Provide correct registers for EH stuff on ARM by Anton Korobeynikov · 15 years ago
  32. 53519f0 Last round of fixes for movw + movt global address codegen. by Evan Cheng · 15 years ago
  33. 9fe2009 Sorry, several patches in one. by Evan Cheng · 15 years ago
  34. 32cec0a For ARM subtargets with useNEONForSinglePrecisionFP, double count uses by Andrew Trick · 15 years ago
  35. 7fa75ce whitespace by Andrew Trick · 15 years ago
  36. fc8475b Don't forget to emit the load from indirect symbol when using movw + movt to materialize GA indirect symbols. by Evan Cheng · 15 years ago
  37. 5de5d4b Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. by Evan Cheng · 15 years ago
  38. 41262da Fix 80-cols. by Eric Christopher · 15 years ago
  39. 16c29b5 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. by Anton Korobeynikov · 15 years ago
  40. c9df025 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 15 years ago
  41. 55d4200 Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call. by Evan Cheng · 15 years ago
  42. 70f8573 Add an explanatory message for an assertion. by Bob Wilson · 15 years ago
  43. 6979702 Eliminate variable only used in debug builds. by Matt Beaumont-Gay · 15 years ago
  44. 11a1dff Lower some BUILD_VECTORS using VEXT+shuffle. Patch by Tim Northover. by Bob Wilson · 15 years ago
  45. 5e8b833 Add ARM patterns to match EXTRACT_SUBVECTOR nodes. by Bob Wilson · 15 years ago
  46. 0521928 Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy by Evan Cheng · 15 years ago
  47. 3c90469 Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions. by Bob Wilson · 15 years ago
  48. 3160090 Add ARM-specific DAG combining to cast i64 vector element load/stores to f64. by Bob Wilson · 15 years ago
  49. f1b4eaf rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for by Chris Lattner · 15 years ago
  50. 3a75b9b Add some missing entries in ARMTargetLowering::getTargetNodeName. by Bob Wilson · 15 years ago
  51. 836c624 Don't handle -arm-long-calls in fast isel for now. by Eric Christopher · 15 years ago
  52. 0c1aec1 bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663 by Evan Cheng · 15 years ago
  53. 30fb13f Generalize BFI isel lowering a bit. by Evan Cheng · 15 years ago
  54. a9688c4 (or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == #shamt. rdar://8752056 by Evan Cheng · 15 years ago
  55. 40f8f62 PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and by Jay Foad · 15 years ago
  56. 1bf891a Fix and re-enable tail call optimization of expanded libcalls. by Evan Cheng · 15 years ago
  57. 3d2125c Enable sibling call optimization of libcalls which are expanded during by Evan Cheng · 15 years ago
  58. b1dfa7a Add support for NEON VLD2-dup instructions. by Bob Wilson · 15 years ago
  59. 364a72a Add entry in getTargetNodeName() for ARMISD::VBICIMM. by Bob Wilson · 15 years ago
  60. 626613d Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations. by Bob Wilson · 15 years ago
  61. bf17cfa Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. by Wesley Peck · 15 years ago
  62. 1f190c8 These instructions are thumb2 only. by Evan Cheng · 15 years ago
  63. 9684a7c Fix bug in DAGCombiner for ARM that was trying to do a ShiftCombine on illegal types (vector should be split first). by Tanya Lattner · 15 years ago
  64. d0c3817 Move hasFP() and few related hooks to TargetFrameInfo. by Anton Korobeynikov · 15 years ago
  65. d5448bb Split up ARM LowerShift function. by Bob Wilson · 15 years ago
  66. bf5be26 Fix an issue where we tried to turn a v2f32 build_vector into a v4i32 build vector with 2 elts by Nate Begeman · 15 years ago
  67. 54f9256 Do not use MEMBARRIER_MCR for any Thumb code. by Bob Wilson · 15 years ago
  68. 3a2429a Change the ARMConstantPoolValue modifier string to an enumeration. This will by Jim Grosbach · 15 years ago
  69. c24cb35 Add support for ARM's specialized vector-compare-against-zero instructions. by Owen Anderson · 15 years ago
  70. 36fa3ea Disallow the certain NEON modified-immediate forms when generating vorr or vbic. by Owen Anderson · 15 years ago
  71. 080c092 Add codegen and encoding support for the immediate form of vbic. by Owen Anderson · 15 years ago
  72. 416941d Fix @llvm.prefetch isel. Selecting between pld / pldw using the first immediate rw. There is currently no intrinsic that matches to pli. by Evan Cheng · 15 years ago
  73. 60f4870 Covert VORRIMM to be produced via early target-specific DAG combining, rather than legalization. by Owen Anderson · 15 years ago
  74. d966817 Add support for code generation of the one register with immediate form of vorr. by Owen Anderson · 15 years ago
  75. 3468c2e Check for extractelement with a variable operand for the element number. by Bob Wilson · 15 years ago
  76. cdfad36 Simplify uses of MVT and EVT. An MVT can be compared directly by Duncan Sands · 15 years ago
  77. dfed19f Fix preload instruction isel. Only v7 supports pli, and only v7 with mp extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing. by Evan Cheng · 15 years ago
  78. bc7deb0 Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. by Evan Cheng · 15 years ago
  79. 24645a1 NEON does not support truncating vector stores. Radar 8598391. by Bob Wilson · 15 years ago
  80. f74a429 Overhaul memory barriers in the ARM backend. Radar 8601999. by Bob Wilson · 15 years ago
  81. d7e473c - Don't schedule nodes with only MVT::Flag and MVT::Other values for latency. by Evan Cheng · 15 years ago
  82. 44ab89e Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support. by John Thompson · 15 years ago
  83. 1fa9d30 Fix compiler warnings about signed/unsigned comparisons. by Bob Wilson · 15 years ago
  84. f20700c SelectionDAG shuffle nodes do not allow operands with different numbers of by Bob Wilson · 15 years ago
  85. 5c2d428 Enable ARM fastcc. by Evan Cheng · 15 years ago
  86. 76f920d Add fastcc cc: pass and return VFP / NEON values in registers. Controlled by -arm-fastcc for now. by Evan Cheng · 15 years ago
  87. e4d3159 Fix crash introduced in 116852. 8573915. by Dale Johannesen · 15 years ago
  88. e4ad387 Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any by Jim Grosbach · 15 years ago
  89. 575cd14 Enable using vdup for vector constants which are splat of by Dale Johannesen · 15 years ago
  90. fd52906 Don't mark argument value stores as immutable, as otherwise the post-RA by Jim Grosbach · 15 years ago
  91. 1dd5a2f Remove unused ARMISD::AND selection DAG node. by Bob Wilson · 15 years ago
  92. 4f922f2 User proper libcall names & condcodes while compiling for ARM EABI. by Anton Korobeynikov · 15 years ago
  93. 02aba73 Add a command line option "-arm-strict-align" to disallow unaligned memory by Bob Wilson · 15 years ago
  94. fff606d Enable code placement optimization pass for ARM. by Evan Cheng · 15 years ago
  95. 637d89f Add support for ELF PLT references for ARM MC asm printing. Adding a by Jim Grosbach · 15 years ago
  96. b68987e Change VDUPLANE DAG combiner to just return the result instead of calling by Bob Wilson · 15 years ago
  97. 0b8ccb8 Combine both VMOVDRR(VMOVRRD) and VMOVRRD(VMOVDRR), instead of just doing one by Bob Wilson · 15 years ago
  98. 8614167 Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes by Owen Anderson · 15 years ago
  99. fc448ff convert a couple more places to use the new getStore() by Chris Lattner · 15 years ago
  100. 65ffec4 Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load by Bob Wilson · 15 years ago