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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 4319a552ac98137d511341905711293d541f15e7
  1. 4319a55 PR1255: case ranges. by Stepan Dyatkovskiy · 12 years ago
  2. be4258a ARM: add testing case for struct byval by Manman Ren · 12 years ago
  3. 3309dba Add another test case which tests Mips' unaligned load/store instructions. by Akira Hatanaka · 12 years ago
  4. 55a1051 Fix a bug in the code which custom-lowers truncating stores in LegalizeDAG. by Akira Hatanaka · 12 years ago
  5. 00edc3d remove an unused variable. by Chris Lattner · 12 years ago
  6. bdd2678 Fix test cases in test/CodeGen/Mips. by Akira Hatanaka · 12 years ago
  7. 4c8acec Remove code which is no longer needed in MipsAsmPrinter and MipsMCInstLower. by Akira Hatanaka · 12 years ago
  8. 7664f05 Set operation actions for load/store nodes in the Mips backend. by Akira Hatanaka · 12 years ago
  9. 4d70cee Add definitions of 32/64-bit unaligned load/store instructions for Mips. by Akira Hatanaka · 12 years ago
  10. 1cd0ec0 Define functions MipsTargetLowering::LowerLOAD and LowerSTORE which by Akira Hatanaka · 12 years ago
  11. b6f1dc2 Define Mips specific unaligned load/store nodes. by Akira Hatanaka · 12 years ago
  12. f66b7b1 Expand unaligned i16 loads/stores for the Mips backend. by Akira Hatanaka · 12 years ago
  13. bed5b0d In MipsMCInstLower::LowerSymbolOperand, get offset from symbol if by Akira Hatanaka · 12 years ago
  14. 22de91a Remove the old register list functions from MCRegisterInfo. by Jakob Stoklund Olesen · 12 years ago
  15. 396618b Switch all register list clients to the new MC*Iterator interface. by Jakob Stoklund Olesen · 12 years ago
  16. 4a8fefa Register the gcov "writeout" at init time. Don't list this as a d'tor. Instead, by Bill Wendling · 12 years ago
  17. 0984461 Remove physreg support from adjustCopiesBackFrom and removeCopyByCommutingDef. by Jakob Stoklund Olesen · 12 years ago
  18. 8c70ea4 Simplify some more getAliasSet callers. by Jakob Stoklund Olesen · 12 years ago
  19. 2090766 Use dominates(Instruction, Use) in the verifier. by Rafael Espindola · 12 years ago
  20. bbff4ee [arm-fast-isel] Fix handling of the frameaddress intrinsic. If depth is 0 by Chad Rosier · 12 years ago
  21. f152fe8 Switch some getAliasSet clients to MCRegAliasIterator. by Jakob Stoklund Olesen · 12 years ago
  22. 73c2f7f X86: peephole optimization to remove cmp instruction by Manman Ren · 12 years ago
  23. 68f2557 ARM: properly handle alignment for struct byval. by Manman Ren · 12 years ago
  24. a0c5e6c Add some tests checking that the verifier rejects cases where a definition by Rafael Espindola · 12 years ago
  25. 693e3ee Provide move semantics for (Small)BitVector. by Benjamin Kramer · 12 years ago
  26. 2b76473 testcase for PR13006, thanks to Duncan for filing it. by Chris Lattner · 12 years ago
  27. acee9e7 BoundsChecking: fix a bug when the handling of recursive PHIs failed and could leave dangling references in the cache by Nuno Lopes · 12 years ago
  28. f0234fc Implement the local-dynamic TLS model for x86 (PR3985) by Hans Wennborg · 12 years ago
  29. 6bb5c00 PR1255: case ranges. by Stepan Dyatkovskiy · 12 years ago
  30. b778179 Remove noisy semicolons. by Benjamin Kramer · 12 years ago
  31. 74ee0ef quick fix for PR13006, will check in testcase later. by Chris Lattner · 12 years ago
  32. f8d14c4 PR1255: case ranges. by Stepan Dyatkovskiy · 12 years ago
  33. 14f094b Enable automatic detection of FMA3 support to allow intrinsics to be used. by Craig Topper · 12 years ago
  34. 3a8172a Remove fadd(fmul) patterns for FMA3. This needs to be implemented by paying attention to FP_CONTRACT and matching @llvm.fma which is not available yet. This will allow us to enablle intrinsic use at least though. by Craig Topper · 12 years ago
  35. 78fc72d Add VFNSUB* instructions to folding table. by Craig Topper · 12 years ago
  36. 241c15f Remove a trailing space and fix a comment. by Craig Topper · 12 years ago
  37. f59e4e3 enhance the logic for looking through tailcalls to look through transparent casts by Chris Lattner · 12 years ago
  38. d956722 Tidy up. Remove trailing spaces and fix the worst of the 80 column violations. by Craig Topper · 12 years ago
  39. 5b0d946 enhance getNoopInput to know about vector<->vector bitcasts of legal by Chris Lattner · 12 years ago
  40. 09c14c0 add some simple 64-bit tail call tests. by Chris Lattner · 12 years ago
  41. cd6015c rearrange some logic, no functionality change. by Chris Lattner · 12 years ago
  42. e8ea60b merge some tests. by Chris Lattner · 12 years ago
  43. e109648 rename test by Chris Lattner · 12 years ago
  44. 763a75d ARM: support struct byval in llvm by Manman Ren · 12 years ago
  45. cdd6b2d Fix 80 columns. by Michael J. Spencer · 12 years ago
  46. fc4199b Add support for enum forward declarations. by Eric Christopher · 12 years ago
  47. 547d804 Put the shiny new MCSubRegIterator to work. by Chad Rosier · 12 years ago
  48. 1cbf2be add -bounds-checking-multiple-traps option to make one trap BB per check by Nuno Lopes · 12 years ago
  49. 0463cce revamp BoundsChecking considerably: by Nuno Lopes · 12 years ago
  50. 91a8ad7 IntrusiveRefCntPtr: Simplify operator= as suggested by Richard Smith. by Benjamin Kramer · 12 years ago
  51. a835f00 Make this testcase independent of register allocation. by Owen Anderson · 12 years ago
  52. ee66b41 Add support for return value promotion in X86 calling conventions. by Jakob Stoklund Olesen · 12 years ago
  53. b2a6d81 Didn't mean to export this function. by Jakob Stoklund Olesen · 12 years ago
  54. 91c5346 X86: replace SUB with CMP if possible by Manman Ren · 12 years ago
  55. 5ddc04c Add a PrintRegUnit helper similar to PrintReg. by Jakob Stoklund Olesen · 12 years ago
  56. f5d4e51 Emit register unit root tables. by Jakob Stoklund Olesen · 12 years ago
  57. 703360f Fix typos by Joel Jones · 12 years ago
  58. a1b95f5 Fix typos noticed by Benjamin Kramer. by Rafael Espindola · 12 years ago
  59. c8e340d X86: Rename the CLMUL target feature to PCLMUL. by Benjamin Kramer · 12 years ago
  60. c49b29e Require intervals in the range metadata to be in a canonical form: They must by Rafael Espindola · 12 years ago
  61. 177cf1e Added FMA3 Intel instructions. by Elena Demikhovsky · 12 years ago
  62. 53b4177 Enhance the sinking code to handle diamond patterns. Patch by by Duncan Sands · 12 years ago
  63. 0559a2f Add intrinsic for pclmulqdq instruction. by Craig Topper · 12 years ago
  64. 28ee4fd Cleanup and factoring of mips16 tablegen classes. Make register classes by Akira Hatanaka · 12 years ago
  65. feba193 Fix typo in assembly directive. Noticed by inspection. by Eric Christopher · 12 years ago
  66. f6a186e Add lit.local.cfg to run the tests in test/MC/Disassembler/Mips. by Akira Hatanaka · 12 years ago
  67. 4c91bda Avoid depending on list orders and register numbering. by Jakob Stoklund Olesen · 12 years ago
  68. 4aecc76 Extract some pointer hacking to a function. by Jakob Stoklund Olesen · 12 years ago
  69. 9cda1be Prioritize smaller register classes for urgent evictions. by Jakob Stoklund Olesen · 12 years ago
  70. ff09e56 Print uint16_t numbers without a sign. by Jakob Stoklund Olesen · 12 years ago
  71. 6ab75b4 Add support for the mips inline asm 'm' output modifier. by Eric Christopher · 12 years ago
  72. f917d20 Switch the canonical FMA term operand order to match both the comment I wrote and the usual LLVM convention. by Owen Anderson · 12 years ago
  73. 85ef6f4 Teach DAGCombine to canonicalize the position of a constant in the term operands of an FMA node. by Owen Anderson · 12 years ago
  74. 06a23ea Remove extra space. by Chad Rosier · 12 years ago
  75. 4f56a30 Reinstate -O3 for LTO. by David Blaikie · 12 years ago
  76. 127563b Make sure that we're dealing with a binary SCEVExpr when simplifying. by Benjamin Kramer · 12 years ago
  77. 6c82382 Fix some uses of getSubRegisters() to use getSubReg() instead. by Jakob Stoklund Olesen · 12 years ago
  78. 275fd25 Remove some redundant tests. by Jakob Stoklund Olesen · 12 years ago
  79. 6cf07a8 Teach SCEV's icmp simplification logic that a-b == 0 is equivalent to a == b. by Benjamin Kramer · 12 years ago
  80. f186df0 it's pointed out that R11 can be used for magic things, and doing things just for 64-bit registers is silly. Just optimize 3 more. by Chris Lattner · 12 years ago
  81. 5aaabbf Extend the (abi-irrelevant) return convention to be able to return more than two values in by Chris Lattner · 12 years ago
  82. ada759d [arm-fast-isel] Add support for the llvm.frameaddress() intrinsic. by Chad Rosier · 12 years ago
  83. cd00ef0 Add MCRegisterInfo::RegListIterator. by Jakob Stoklund Olesen · 12 years ago
  84. 1afbd27 Mark insertq/extrq intrinsic readnone. by Benjamin Kramer · 12 years ago
  85. 77fc4b2 Port support for SSE4a extrq/insertq to the old jit code emitter. by Benjamin Kramer · 12 years ago
  86. dee3be6 Remove little semicolon that caused a lot of warnings. by Benjamin Kramer · 12 years ago
  87. e6cf2e0 [asan] instrument cmpxchg and atomicrmw by Kostya Serebryany · 12 years ago
  88. fe3516f SCEV: Handle a corner case reducing AddRecExpr * AddRecExpr by Andrew Trick · 12 years ago
  89. 97178ae Reformat the loop that does AddRecExpr * AddRecExpr reduction. by Andrew Trick · 12 years ago
  90. eb25bd2 Teach taildup to update livein set. rdar://11538365 by Evan Cheng · 12 years ago
  91. 3d4166d If-converter models predicated defs as read + write. The read should be marked as 'undef' since it may not already be live. This appeases -verify-machineinstrs. by Evan Cheng · 12 years ago
  92. ef09705 typo fix by Chris Lattner · 12 years ago
  93. 6e1b812 Add an insertPass API to TargetPassConfig. <rdar://problem/11498613> by Bob Wilson · 12 years ago
  94. 209cdc2 Make DiffListIterator public to unbreak the gcc buildbots. by Jakob Stoklund Olesen · 12 years ago
  95. 96feada Use MCRegUnitIterator to compute regsOverlap(). by Jakob Stoklund Olesen · 12 years ago
  96. f52baf7 Emit register unit lists for each register. by Jakob Stoklund Olesen · 12 years ago
  97. 988a089 bounds checking: by Nuno Lopes · 12 years ago
  98. aad8296 DenseMap's move assignment operator needs to return *this by Douglas Gregor · 12 years ago
  99. cac58aa Optional def can be either a def or a use (of reg0). by Evan Cheng · 12 years ago
  100. 1386e9b Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. by Benjamin Kramer · 12 years ago