- 43970fe Handle new forms of llvm.dbg intrinsics. by Jim Laskey · 19 years ago
- 4556ce5 Simplify handling of llvm.dbg intrinsic operands to one spot. by Jim Laskey · 19 years ago
- c14897e Modify usage of llvm.dbg intrinsics. by Jim Laskey · 19 years ago
- d06b5fc Change the argument types of llvm.dbg intrinsics. by Jim Laskey · 19 years ago
- 60f27ff Support for locating of debug items in frames. by Jim Laskey · 19 years ago
- 108a638 Correction of stoppoint arguments. by Jim Laskey · 19 years ago
- 383e009 Updated information related to local variables and scopes. by Jim Laskey · 19 years ago
- 29b4dd0 Fix the encodings of these new instructions, hopefully fixing the JIT by Chris Lattner · 19 years ago
- 24dc1f5 Following icc's lead: use movdqa to load / store 128-bit integer vectors by Evan Cheng · 19 years ago
- 7df8e26 Add HowToReleaseLLVM.html. by Reid Spencer · 19 years ago
- cf427e8 A very early, rough draft of a guide to making public releases for LLVM. by Reid Spencer · 19 years ago
- 6c8a2f1 Wrap long lines, remove unnecessarily empty lines. by Reid Spencer · 19 years ago
- ff9b038 Updated for library changes: by Reid Spencer · 19 years ago
- 70a7b1b prune #includes by Chris Lattner · 19 years ago
- bc641b9 Eliminate IntrinsicLowering from TargetMachine. by Chris Lattner · 19 years ago
- 475c010 Eliminate IntrinsicLowering from TargetMachine. by Chris Lattner · 19 years ago
- 408c428 simplify some code by Chris Lattner · 19 years ago
- ef98691 remove always-null IntrinsicLowering argument. by Chris Lattner · 19 years ago
- 726c1ef remove the intrinsiclowering hook by Chris Lattner · 19 years ago
- 3b047f7 Add v4i32 <-> v4f32 bitconvert patterns. by Evan Cheng · 19 years ago
- 83e1a6a Allow result node to be a simple leaf node. This enable bitconvert patterns by Evan Cheng · 19 years ago
- a971f6f Add 128-bit integer vector load and add (for testing). by Evan Cheng · 19 years ago
- ce94482 Add support for 8 bit immediates with 16/32 bit cmp instructions by Nate Begeman · 19 years ago
- 7e35890 Fix a typo by Chris Lattner · 19 years ago
- ca6e8ea Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do by Evan Cheng · 19 years ago
- 7de48c1 Replace vector splat test case. by Evan Cheng · 19 years ago
- e9aba8b Add a v2f64 splat (using movlhps) test case. by Evan Cheng · 19 years ago
- e25ca69 Implement simple support for vector casting. This can currently only handle by Chris Lattner · 19 years ago
- 313f13c Fix comments by Chris Lattner · 19 years ago
- 0cea6d2 SHUFP* are two address code. by Evan Cheng · 19 years ago
- 762f2ae add a new node by Chris Lattner · 19 years ago
- a88973f Some clean up. by Evan Cheng · 19 years ago
- 1bffadd - Supposely movlhps is faster / better than unpcklpd. by Evan Cheng · 19 years ago
- 6bf9791 test that vspltw is generated for test cases by Chris Lattner · 19 years ago
- 0188ecb - Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support by Evan Cheng · 19 years ago
- 035c6a2 silence a bogus gcc warning by Chris Lattner · 19 years ago
- f2722ca These changes are necessary to support the new llvm-config tool. llvm-config by Reid Spencer · 19 years ago
- 63d3300 - VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches by Evan Cheng · 19 years ago
- c04b423 add a note by Chris Lattner · 19 years ago
- 2da953f Fix PSHUF* and SHUF* jit code emission problems by Evan Cheng · 19 years ago
- 2fe4bb0 Eliminate the dependency of ExecutionEngine on the JIT/Interpreter libraries. by Chris Lattner · 19 years ago
- 765c93c wrap lines to 80 columns. by Chris Lattner · 19 years ago
- 9d86a9d This has been implemented. Tweak it into another note by Chris Lattner · 19 years ago
- ecfe55e When possible, custom lower 32-bit SINT_TO_FP to this: by Chris Lattner · 19 years ago
- e5ba580 Add support for "ri" addressing modes where the immediate is a 14-bit field by Chris Lattner · 19 years ago
- 6df1154 fix a warning by Chris Lattner · 19 years ago
- b9df0ca Some splat and shuffle support. by Evan Cheng · 19 years ago
- a9f2a71 Add a couple more pseudo instructions. by Evan Cheng · 19 years ago
- 841c882 Endianness does not affect the order of vector fields. This fixes by Chris Lattner · 19 years ago
- eb8b09f Fix the JIT encoding of the VAForm_1 instructions, including vmaddfp by Chris Lattner · 19 years ago
- 3b9fa89 Enclose some variables in a scope to avoid error with some gcc versions by Chris Lattner · 19 years ago
- 4a7da36 Didn't mean to check this in. No MMX support yet. by Evan Cheng · 19 years ago
- 48090aa - Use movaps to store 128-bit vector integers. by Evan Cheng · 19 years ago
- e35c218 add expand support for extractelement by Chris Lattner · 19 years ago
- 9b3bd46 These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will. by Chris Lattner · 19 years ago
- 3a7a14b Don't forget to promote xform function to an explicit node for def : Pat<> by Evan Cheng · 19 years ago
- 384504c add some trivial support for extractelement. by Chris Lattner · 19 years ago
- 4b8db6c add some nodes for extractelement by Chris Lattner · 19 years ago
- f3ce432 Don't emit pseudo instructions! by Chris Lattner · 19 years ago
- 1c6191f Add a hacky workaround for crashes due to vectors live across blocks. by Chris Lattner · 19 years ago
- c0a8b6d Update readme by Nate Begeman · 19 years ago
- 4d2182a Add an integer splat test by Chris Lattner · 19 years ago
- 13feb58 Print absolute memory references like this: by Chris Lattner · 19 years ago
- 7ab5404 Combine 2 entries by Evan Cheng · 19 years ago
- 50a6d8c Add a note about x86 register coallescing by Evan Cheng · 19 years ago
- 82521dd - Remove scalar to vector pseudo ops. They are just wrong. by Evan Cheng · 19 years ago
- 4e2f54d minor code simplification by Chris Lattner · 19 years ago
- 8151914 With Evan's latest tblgen patch, this code is obsolete, thanks Evan! by Chris Lattner · 19 years ago
- 7d6a515 Cause the various warnings list to be generated via a <ul> list with by Reid Spencer · 19 years ago
- d465126 Document ENABLE_ASSERTIONS=1 by Chris Lattner · 19 years ago
- 7192786 Enable assertions to be enabled in release builds by building with by Chris Lattner · 19 years ago
- 8593f98 When codegen'ing vector MUL using VFMADD, *add* the 0, don't *mul* the 0. by Chris Lattner · 19 years ago
- ef040dd minor note by Chris Lattner · 19 years ago
- 811ec1c x86 ISD::SCALAR_TO_VECTOR support. by Evan Cheng · 19 years ago
- 5c791c8 Junk unused vector register classes. by Evan Cheng · 19 years ago
- 863bf5a The node wrapped in PatLeaf<> should be treated as a leaf even if it isn't by Evan Cheng · 19 years ago
- d979644 Handle constant addresses more efficiently, folding the low bits into the by Chris Lattner · 19 years ago
- 23baa1b remove dead variable by Chris Lattner · 19 years ago
- 3dfd61b new testcase by Chris Lattner · 19 years ago
- 26d5d16 Move some common data structures between dom and pdom into the base class by Nate Begeman · 19 years ago
- bd83afd Fix a couple of bugs in permute/splat generate, thanks to Nate for actually by Chris Lattner · 19 years ago
- f255b81 Option -enable-x86-lsr has been removed by Evan Cheng · 19 years ago
- e376e00 reenable this hack, the tblgen version isn't quite ready by Chris Lattner · 19 years ago
- 32f57d9 Fix the pattern for VADDUWM, add i32 splat by Chris Lattner · 19 years ago
- e63d746 Use tblgen'd VECTOR_SHUFFLE selection code. by Evan Cheng · 19 years ago
- f26ba69 It should be ok for a xform output type to be different from input type. by Evan Cheng · 19 years ago
- dd4d2d0 Add support for generating vspltw, instead of a vperm instruction with a by Chris Lattner · 19 years ago
- 88a99ef Implement PPC::isSplatShuffleMask and PPC::getVSPLTImmediate. by Chris Lattner · 19 years ago
- ef819f8 fix duplicate definition errors by Chris Lattner · 19 years ago
- 39afef3 Add a build_vector node by Chris Lattner · 19 years ago
- 3c0f9cc Check in some intermediate code that adds a skeleton for matching vsplt* by Chris Lattner · 19 years ago
- ba753c6 Move a few things around. by Evan Cheng · 19 years ago
- 420132e Copy matching pattern's output type info to instruction result pattern. by Evan Cheng · 19 years ago
- fa818d0 add vector_shuffle by Chris Lattner · 19 years ago
- 697f884 Add a new SDTCisIntVectorOfSameSize type constraint by Chris Lattner · 19 years ago
- 08e25de fix typo by Chris Lattner · 19 years ago
- 556aae0 add vsplat instructions, fix sched description for vperm by Chris Lattner · 19 years ago
- f1d0b2b Custom lower arbitrary VECTOR_SHUFFLE's to VPERM. by Chris Lattner · 19 years ago
- 2bc6dc2 Claim to have v16i8 for perm masks by Chris Lattner · 19 years ago
- 87100e0 If a target supports splatting with SHUFFLE_VECTOR, lower to it from BUILD_VECTOR(x,x,x,x) by Chris Lattner · 19 years ago