- 4633f1c Remove trailing whitespace by Misha Brukman · 20 years ago
- f976c85 Remove trailing whitespace by Misha Brukman · 20 years ago
- 837a521 Match another form of eqv by Chris Lattner · 20 years ago
- 1090262 Handle stores of global address as stores of immediates. Instead of: by Chris Lattner · 20 years ago
- 75f354b Handle (store &GV -> mem) as a store immediate. This often occurs for by Chris Lattner · 20 years ago
- d6a29a5 Remove trailing whitespace, patch by Markus Oberhumer. by Misha Brukman · 20 years ago
- f577c61 Add completely untested support for mtcrf/mfcrf encoding by Chris Lattner · 20 years ago
- 14522e3 switch over the rest of the formats that use RC to use isDOT by Chris Lattner · 20 years ago
- 883059f Convert the XForm instrs and XSForm instruction over to use isDOT by Chris Lattner · 20 years ago
- 97a2d42 Now that the ppc64 and vmx operands of I are always 0, forward substitute by Chris Lattner · 20 years ago
- a611ab7 convert over bform and iform instructions by Chris Lattner · 20 years ago
- 57226fb Convert over DForm and DSForm instructions by Chris Lattner · 20 years ago
- e19d0b1 Convert XLForm and XForm instructions over to use PPC64 when appropriate. by Chris Lattner · 20 years ago
- 5035cef Convert XO XS and XFX forms to use isPPC64 by Chris Lattner · 20 years ago
- 0bdc6f1 Turn PPC64 and VMX into classes that can be added to instructions instead of by Chris Lattner · 20 years ago
- 1cbf3ab Next round of PPC CR optimizations. For the following code: by Nate Begeman · 20 years ago
- 16ac709 Change codegen for setcc to read the bit directly out of the condition by Nate Begeman · 20 years ago
- 477d1de Handle ExternalSymbol operands in the PPC JIT by Chris Lattner · 20 years ago
- f8b0294 Make pattern isel default for ppc by Nate Begeman · 20 years ago
- 1e0d9bd fix calls by Andrew Lenharth · 20 years ago
- 3ae1829 a 21264 fix, and fix the operator precidence on an and -> zap check (should fix hundreds of test cases by Andrew Lenharth · 20 years ago
- 1ce0c01 print negative 64 bit immediates as negative numbers, makes things a little by Duraid Madina · 20 years ago
- 3eb7150 oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4 by Duraid Madina · 20 years ago
- 7bfba7d Implement multi-way branches through logical ops on condition registers. by Nate Begeman · 20 years ago
- c4ccc2d we have zextloads, not sextloads! by Duraid Madina · 20 years ago
- ef7288c Add the necessary support to codegen condition register logical ops with by Nate Begeman · 20 years ago
- 1b7f7fb Start allocating condition registers. Almost all explicit uses of CR0 are by Nate Begeman · 20 years ago
- 3664cef Implement the fold shift X, zext(Y) -> shift X, Y at the target level, by Nate Begeman · 20 years ago
- eea805e Disbale the broken fold of shift + sz[ext] for now by Nate Begeman · 20 years ago
- c24b537 WOW, function calls still seem to work after this. by Andrew Lenharth · 20 years ago
- 556c44e prepare for func call optimization by Andrew Lenharth · 20 years ago
- ed09502 * add the shladd instruction * fold left shifts of 1, 2, 3 or 4 bits into adds by Duraid Madina · 20 years ago
- 4f7cba5 add matches for SxADDL and company, as well as simplify the SxADDQ code by Andrew Lenharth · 20 years ago
- c02780e * if ANDing with a constant of the form: by Duraid Madina · 20 years ago
- 483f22d added all flavors of zap for anding by Andrew Lenharth · 20 years ago
- 5bf2686 Fix some mysteriously missing {}'s which cause the miscompilation of by Chris Lattner · 20 years ago
- 519f40b remove one more occurance of this that snuck in by Chris Lattner · 20 years ago
- 2942e9c Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuff by Chris Lattner · 20 years ago
- 6ac614a Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing by Chris Lattner · 20 years ago
- c951d87 Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit by Chris Lattner · 20 years ago
- 91302a1 Z_E_I is gone by Chris Lattner · 20 years ago
- b882752 Fold shift by size larger than type size to undef by Nate Begeman · 20 years ago
- 9765c25 Implement setcc op, -1 sequences by Nate Begeman · 20 years ago
- e8fd25f * OK, after changing to use liveIn/liveOut instead of IDEFs, by Duraid Madina · 20 years ago
- 0b04b5d Get rid of idefs for arguments (oops) by Andrew Lenharth · 20 years ago
- e1c5a00 Get rid of idefs for arguments by Andrew Lenharth · 20 years ago
- 9c24ba6 Put out* into the allocation order, allowing the register allocator to by Chris Lattner · 20 years ago
- ea6f770 Make sure to realize that calls use their argument regs by Chris Lattner · 20 years ago
- ca494fd stop emitting IDEFs for args - change to using liveIn/liveOut by Duraid Madina · 20 years ago
- 7af0248 Initial support for allocation condition registers by Nate Begeman · 20 years ago
- 9f833d3 Implement bitfield clears Implement divide by negative power of two by Nate Begeman · 20 years ago
- ef9531e Update PPC readme. Remove things that are done or aren't ppc specific by Nate Begeman · 20 years ago
- 30e8243 IA64 supports this operation. by Chris Lattner · 20 years ago
- 5eef9f3 ORo sets CR0 by Chris Lattner · 20 years ago
- 6b4ea2c Revert the previous patch, which I didn't mean to check in. by Chris Lattner · 20 years ago
- 26d4fdb Fix a minor bug (ORo didn't mark that it set CR0). by Chris Lattner · 20 years ago
- 21478e5 hmm, should probably change addImm() to take 64-bit arguments one day anyway. by Duraid Madina · 20 years ago
- c7bd482 Add recording variants of ISD::AND and ISD::OR. This kills almost 1000 by Nate Begeman · 20 years ago
- 5ef2ec9 assorted fixes: by Duraid Madina · 20 years ago
- 709c806 Fix another fixme: factor out the constant fp generation code. by Nate Begeman · 20 years ago
- c5b1cd2 Fix 64 bit argument loading that straddles the args in regs / args on stack by Nate Begeman · 20 years ago
- 340f290 Remove unnecessary Implicit Defs. Since r0 is not in allocation, we do not by Nate Begeman · 20 years ago
- 27499e3 Make sure that BRCOND branches can be converted into long branches too. by Nate Begeman · 20 years ago
- a0e3e94 Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod. by Nate Begeman · 20 years ago
- 51d2ed9 rename getPPCOpcodeForSetCCNumber -> getPPCOpcodeForSetCCOpode to be more by Chris Lattner · 20 years ago
- 706471e fix ISD::BRCONDTWOWAY codegen to not deference the end() iterator by Nate Begeman · 20 years ago
- 9184bfb Fix CodeGen/Generic/2005-05-09-GlobalInPHI.ll, which was reduced from 254.gap. by Chris Lattner · 20 years ago
- 91277ea do not set the root to null if an argument is dead by Chris Lattner · 20 years ago
- cd08e4c Add rlwnm instruction for variable rotate by Nate Begeman · 20 years ago
- 27ee3a3 Fix a crash on 173.applu by asking for a constant bigger than 32-bits. by Chris Lattner · 20 years ago
- f429a3e Switch this instruction selector over to using liveins and liveouts, eliminating by Chris Lattner · 20 years ago
- 4c52f0e Use live out sets for return values instead of imp_defs, which is cleaner and faster. by Chris Lattner · 20 years ago
- e00e5de ok, the "ia64 has a boatload of registers" joke stopped being funny today ;) by Duraid Madina · 20 years ago
- af4ab1b Optimize FSEL a bit for fneg arguments. This fixes the recently added test by Nate Begeman · 20 years ago
- 67ac5f4 Fix CodeGen/SparcV9/2005-05-09-GEP-Crash.ll a crash on some specfp program by Chris Lattner · 20 years ago
- da4d469 This target does not support/want ISD::BRCONDTWOWAY by Chris Lattner · 20 years ago
- 644db4e This target does not yet support ISD::BRCONDTWOWAY by Chris Lattner · 20 years ago
- e88aa5b 64b: Expand S/UREM by Nate Begeman · 20 years ago
- a9532d5 Fix 64b shifts by Nate Begeman · 20 years ago
- f3f2d6d Match Mac OS X 64 bit calling conventions by Nate Begeman · 20 years ago
- a32b9e3 collect a few statistics, factor constants (constant loading and mult), fix logic operation pattern matchs, supress FP div when int dividing by a constant by Andrew Lenharth · 20 years ago
- 6dcceb5 fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn) by Duraid Madina · 20 years ago
- 7e7fadd Optimized code sequences for setcc reg, 0 by Nate Begeman · 20 years ago
- d3355e2 Alpha zero extends setcc results by Andrew Lenharth · 20 years ago
- cbd06fc PowerPC zero extends setcc results by Chris Lattner · 20 years ago
- 6659bd7 X86 zero extends setcc results by Chris Lattner · 20 years ago
- 2966e84 fix a small optimization opertunity and make gcc happy by Andrew Lenharth · 20 years ago
- 320174f fixup magic constant making code. tested by thousands of random divisions.... by 10000. ok, so random divisors would be good too, but this at least fixes some things by Andrew Lenharth · 20 years ago
- 9bf59d7 lowercase instructions, makes diff happier by Andrew Lenharth · 20 years ago
- 273a1f9 It wasn't happy about this either by Andrew Lenharth · 20 years ago
- 706be91 Yea, it wasn't happy by Andrew Lenharth · 20 years ago
- e6a0b6c teach asmprinter to print s8/s14 operands by Duraid Madina · 20 years ago
- f55e403 codegen immediate forms of add/sub/shift by Duraid Madina · 20 years ago
- 18c0c6b add immediate forms of add, sub, shift by Duraid Madina · 20 years ago
- 7ddecb4 Pattern match bitfield insert, which helps shift long by immediate, among by Nate Begeman · 20 years ago
- 020ef42 Fix some shift bugs by Nate Begeman · 20 years ago
- aeca558 Make these 64 bit constants so that this compiles on x86-32 as well. by Alkis Evlogimenos · 20 years ago
- a565c27 added sdiv by 2^k and works for neg divisors also by Andrew Lenharth · 20 years ago
- f77f395 fix copy/paste errors, and add imm support to SxADDQ and SxSUBQ by Andrew Lenharth · 20 years ago
- 6d027f2 Fix SingleSource/Regression/C/2005-05-06-LongLongSignedShift.c, we were not by Chris Lattner · 20 years ago