- 48884cd rename isOperandValidForConstraint to LowerAsmOperandForConstraint, by Chris Lattner · 18 years ago
- 66ffe6b Vector fneg must be expanded into fsub -0.0, X. by Evan Cheng · 18 years ago
- 36397f5 Support for trampolines, except for X86 codegen which is still under discussion. by Duncan Sands · 18 years ago
- 75ce010 Assert when TLS is not implemented. by Lauro Ramos Venancio · 18 years ago
- 532dc2e Change getCopyToParts and getCopyFromParts to always use target-endian by Dan Gohman · 18 years ago
- ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 18 years ago
- 3ee7740 describe an argument, hide it. by Chris Lattner · 18 years ago
- 52387be If a function is vararg, never pass inreg arguments in registers. Thanks to by Chris Lattner · 18 years ago
- 51eaa86 Rename MVT::getVectorBaseType to MVT::getVectorElementType. by Dan Gohman · 18 years ago
- f5135be Apply this patch: by Dan Gohman · 18 years ago
- 9f5d578 fix some subtle inline asm selection issues by Chris Lattner · 18 years ago
- 7c7ba9d Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2 by Chris Lattner · 18 years ago
- 0111999 Starting implementation of the ELF32 ABI specification of varargs handling. by Nicolas Geoffray · 18 years ago
- ec58d9f The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules by Nicolas Geoffray · 18 years ago
- ef3c030 The ELF ABI specifies F1-F8 registers as argument registers for double, not by Nicolas Geoffray · 18 years ago
- c9addb7 implement the new addressing mode description hook. by Chris Lattner · 18 years ago
- 1baa197 "The C standards do say that "char" may either be a "signed char" or "unsigned by Lauro Ramos Venancio · 18 years ago
- 4234f57 switch TargetLowering::getConstraintType to take the entire constraint, by Chris Lattner · 18 years ago
- b2ec1cc Stack and register alignment of call arguments in the ELF ABI by Nicolas Geoffray · 18 years ago
- 8619391 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. by Evan Cheng · 18 years ago
- b9a7bea Switch PPC return lower to use an autogenerated CC description. by Chris Lattner · 18 years ago
- 43c6e7c Implemented the frameaddress intrinsic for PPC. by Nicolas Geoffray · 18 years ago
- 63f8fb1 Differentiate between the MachO and the ELF ABI the CALL instruction. by Nicolas Geoffray · 18 years ago
- caddd44 always lower to RETFLAG, never leave it as just ret. by Chris Lattner · 18 years ago
- 4ddf7a4 no really, this is the right patch by Chris Lattner · 18 years ago
- 640c0ac always promote float varargs to double. by Chris Lattner · 18 years ago
- 9f0bc65 implement support for the linux/ppc function call ABI. Patch by by Chris Lattner · 18 years ago
- 2ad9f17 Simplify lowering and selection of exception ops. by Jim Laskey · 18 years ago
- 62819f3 Support to provide exception and selector registers. by Jim Laskey · 18 years ago
- dee5a5a Fix ixaddrs as well, allowing ppc64 to compile to: by Chris Lattner · 18 years ago
- bc681d6 Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to: by Chris Lattner · 18 years ago
- bcc5f36 Finish off bug 680, allowing targets to custom lower frame and return by Nate Begeman · 19 years ago
- b10308e Propagate changes from my local tree. This patch includes: by Anton Korobeynikov · 19 years ago
- 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 19 years ago
- d08d233 setSetCCIsExpensive is gone. by Evan Cheng · 19 years ago
- ca367b4 Provide support for FP_TO_UINT. by Jim Laskey · 19 years ago
- 57fc62c Another step forward in PPC64 JIT support: we now no-longer need stubs by Chris Lattner · 19 years ago
- 2060a82 Missing opcode. by Jim Laskey · 19 years ago
- d27a258 Cleaned setjmp/longjmp lowering interfaces. Now we're producing right by Anton Korobeynikov · 19 years ago
- 85c671b Fix i64 uint_to_fp on ppc64 by Chris Lattner · 19 years ago
- efc7e52 Restoration of the stack pointer after a deallocation of a alloca was not by Jim Laskey · 19 years ago
- fbb74e6 1. In ppc64 mode we need only use one GPR. by Jim Laskey · 19 years ago
- 70fa493 Fix the CodeGen/PowerPC/vec_constants.ll regression. by Chris Lattner · 19 years ago
- 15eb329 Fix bug codegen'ing FP constant vectors with integer splats. Make sure the by Chris Lattner · 19 years ago
- 619965d Offset for load of 32-bit arg in 64-bit world was incorrect. by Jim Laskey · 19 years ago
- 7fc4a94 Remove debug code. by Jim Laskey · 19 years ago
- e9bd7b2 32-bit int space was not accounted for properly in lowerCall. by Jim Laskey · 19 years ago
- c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 19 years ago
- b1eb987 on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots. by Chris Lattner · 19 years ago
- 18258c6 convert PPC::BCC to use the 'pred' operand instead of separate predicate by Chris Lattner · 19 years ago
- 289c2d5 rename PPC::COND_BRANCH to PPC::BCC by Chris Lattner · 19 years ago
- df4ed63 start using PPC predicates more consistently. by Chris Lattner · 19 years ago
- 2f616bf by Jim Laskey · 19 years ago
- 0851b4f fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri by Chris Lattner · 19 years ago
- ac011bc lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of by Chris Lattner · 19 years ago
- 2fe4bf4 minor tweaks, reject vector preinc. by Chris Lattner · 19 years ago
- f6edf4d ppc64 doesn't have lwau, don't attempt to form it. by Chris Lattner · 19 years ago
- 94e509c implement preinc support for r+i loads on ppc64 by Chris Lattner · 19 years ago
- 4eab714 add an initial cut at preinc loads for ppc32. This is broken for ppc64 by Chris Lattner · 19 years ago
- cd63319 PPC supports i32 / i64 pre-inc load / store. by Evan Cheng · 19 years ago
- 144d8f0 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode by Evan Cheng · 19 years ago
- fc5b1ab Refactor all the addressing mode selection stuff into the isel lowering by Chris Lattner · 19 years ago
- 3ed469c For PR786: by Reid Spencer · 19 years ago
- 331d1bc Implement the getRegForInlineAsmConstraint method for PPC. With recent by Chris Lattner · 19 years ago
- dba1aee Change the prototype for TargetLowering::isOperandValidForConstraint by Chris Lattner · 19 years ago
- c35497f All targets expand BR_JT for now. by Evan Cheng · 19 years ago
- 10da957 set the ppc64 stack pointer right, dynamic alloca now works for ppc64 by Chris Lattner · 19 years ago
- 56a752e Expand alloca for ppc64 by Chris Lattner · 19 years ago
- 8b2794a Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. by Evan Cheng · 19 years ago
- 466685d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 19 years ago
- 786225a Make use of getStore(). by Evan Cheng · 19 years ago
- c548428 Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an by Evan Cheng · 19 years ago
- 3fe6c1d Legalize is no longer limited to cleverness with just constant shift amounts. by Chris Lattner · 19 years ago
- cf9d0ac Fold the PPCISD shifts when presented with 0 inputs. This occurs for code by Chris Lattner · 19 years ago
- c356a57 Reflects MachineConstantPoolEntry changes. by Evan Cheng · 19 years ago
- 3a9ec24 For PR387: by Reid Spencer · 19 years ago
- f6e190f Fix a bug in a recent refactoring that broke a bunch of stuff. by Chris Lattner · 19 years ago
- e219945 Eliminate use of getNode that takes a vector. by Chris Lattner · 19 years ago
- 79e490a Convert vectors to fixed sized arrays and smallvectors. Eliminate use of getNode that takes a vector. by Chris Lattner · 19 years ago
- 325f0a1 Fix miscompilation of float vector returns. Compile code to this: by Chris Lattner · 19 years ago
- 0d72a20 Fix some ppc64 issues with vector code. by Chris Lattner · 19 years ago
- 35d86fe Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC. by Chris Lattner · 19 years ago
- d998938 Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps by Chris Lattner · 19 years ago
- f89437d Implement 64-bit select, bswap, etc. by Chris Lattner · 19 years ago
- 5f9faea PPC doesn't have bit converts to/from i64 by Chris Lattner · 19 years ago
- 563ecfb Implement 64-bit undef, sub, shl/shr, srem/urem by Chris Lattner · 19 years ago
- 7b0c58c Use i32 for shift amounts instead of i64. This gets bisort working. by Chris Lattner · 19 years ago
- c08f902 Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but by Chris Lattner · 19 years ago
- c91a475 Improve PPC64 calling convention support by Chris Lattner · 19 years ago
- ef95710 Correct returns of 64-bit values, though they seemed to work before... by Chris Lattner · 19 years ago
- 059ca0f fix some assumptions that pointers can only be 32-bits. With this, we can by Chris Lattner · 19 years ago
- a7a5854 Rename some subtarget features. A CPU now can *have* 64-bit instructions, by Chris Lattner · 19 years ago
- a7dc4a5 Type of extract_element index operand should be iPTR. by Evan Cheng · 19 years ago
- 4a45abf Fix a problem exposed by the local allocator. CALL instructions are not marked by Chris Lattner · 19 years ago
- 7b05350 Always reserve space for 8 spilled GPRs. GCC apparently assumes that this by Chris Lattner · 19 years ago
- 6848be1 Change RET node to include signness information of the return values. i.e. by Evan Cheng · 19 years ago
- 4360bdc CALL node change (arg / sign pairs instead of just arguments). by Evan Cheng · 19 years ago
- d74ea2b Patches to make the LLVM sources more -pedantic clean. Patch provided by Chris Lattner · 19 years ago
- 2ef5e89 Fix CodeGen/Generic/vector.ll:test_div with altivec. by Chris Lattner · 19 years ago
- 5734012 Handle SETO* like we handle SET*, restoring behavior after Evan's setcc by Chris Lattner · 19 years ago