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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 4d2e9d9a1c213db144785f386ce661914d17afb6 / test / CodeGen
  1. 16295fc Tweak the loop rotation logic to check whether the loop is naturally by Chandler Carruth · 13 years ago
  2. 31490ba Remove dead SD nodes after the combining pass. Fixes PR12201. by Hal Finkel · 13 years ago
  3. 70daea9 Rewrite how machine block placement handles loop rotation. by Chandler Carruth · 13 years ago
  4. 2cb1e9d Remove AVX2 vpermq and vpermpd intrinsics. These can now be handled with normal shuffle vectors. by Craig Topper · 13 years ago
  5. f16af0a Fix PR12529. The Vxx family of instructions are only supported by AVX. by Nadav Rotem · 13 years ago
  6. 3ab32ea When emulating vselect using OR/AND/XOR make sure to bitcast the result back to the original type. by Nadav Rotem · 13 years ago
  7. 73c504a Added VPERM optimization for AVX2 shuffles by Elena Demikhovsky · 13 years ago
  8. 42fc29e Fix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ~*x & y. by Richard Smith · 13 years ago
  9. 7ece953 On Darwin targets, only use vfma etc. if the source use fma() intrinsic explicitly. by Evan Cheng · 13 years ago
  10. 2f69e4c Disable Hexagon test temporarily. by Sirish Pande · 13 years ago
  11. bf596c9 Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are integer instructions. by Craig Topper · 13 years ago
  12. ed08489 Revert changes that were accidentally committed. by Akira Hatanaka · 13 years ago
  13. 55e0e43 Fix string that is being checked. by Akira Hatanaka · 13 years ago
  14. 1cc6333 Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user, by Akira Hatanaka · 13 years ago
  15. c12a6e6 Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user. by Akira Hatanaka · 13 years ago
  16. 056c51e Fix bugs in lowering of FCOPYSIGN nodes. by Akira Hatanaka · 13 years ago
  17. 14b4c03 Add more fused mul+add/sub patterns. rdar://10139676 by Evan Cheng · 13 years ago
  18. e611378 Reapply 154396 after fixing a test. by Nadav Rotem · 13 years ago
  19. 92c9045 Match (fneg (fma) to vfnma. rdar://10139676 by Evan Cheng · 13 years ago
  20. a0908d0 Merge fma.ll into fusedMAC.ll by Evan Cheng · 13 years ago
  21. 89cdaf46 Fix test to be register assignment invariant. by Jakob Stoklund Olesen · 13 years ago
  22. 06886aa Move the constant-folding support for FP_ROUND in SelectionDAG from the one-operand version of getNode() to the two-operand version, since it became a two-operand node at sound point. by Owen Anderson · 13 years ago
  23. 3aef2ff Handle llvm.fma.* intrinsics. rdar://10914096 by Evan Cheng · 13 years ago
  24. 507bb7a Add a comment noting that the fdiv -> fmul conversion won't generate by Duncan Sands · 13 years ago
  25. a139051 Temporarily revert this patch to see if it brings the buildbots back. by Eric Christopher · 13 years ago
  26. 18112d8 To ensure that we have more accurate line information for a block by Eric Christopher · 13 years ago
  27. 50e64cf Modify the code that lowers shuffles to blends from using blendvXX to vblendXX. by Nadav Rotem · 13 years ago
  28. 999821c Transform div to mul with reciprocal only when fp imm is legal. by Anton Korobeynikov · 13 years ago
  29. fa12d0d Add proper checks. by Evan Cheng · 13 years ago
  30. bf010eb Fix a long standing tail call optimization bug. When a libcall is emitted by Evan Cheng · 13 years ago
  31. fdb230a Don't try to zExt just to check if an integer constant is zero, it might by Rafael Espindola · 13 years ago
  32. 23f369d Test case for PR12495. by Lang Hames · 13 years ago
  33. 787c3fd Have TargetLowering::getPICJumpTableRelocBase return a node that points to the by Akira Hatanaka · 13 years ago
  34. 7f35455 When performing a truncating store, it's possible to rearrange the data by Chad Rosier · 13 years ago
  35. decbc43 Pattern match a setcc of boolean value with 0 as a truncate. by Rafael Espindola · 13 years ago
  36. e80aa7c Lower some x86 shuffle sequences to the vblend family of instructions. by Nadav Rotem · 13 years ago
  37. 154819d Fix a bug in the lowering of broadcasts: ConstantPools need to use the target pointer type. by Nadav Rotem · 13 years ago
  38. ab5a55e Cleanup and relax a restriction on the matching of global offsets into by Chandler Carruth · 13 years ago
  39. 6916a23 Fold 15 tiny test cases into a single file that implements the by Chandler Carruth · 13 years ago
  40. 3ef3fcf Only have codegen turn fdiv by a constant into fmul by the reciprocal by Duncan Sands · 13 years ago
  41. 253933e Teach LLVM about a PIE option which, when enabled on top of PIC, makes by Chandler Carruth · 13 years ago
  42. 9d68b06 AVX2: Build splat vectors by broadcasting a scalar from the constant pool. by Nadav Rotem · 13 years ago
  43. d16c8d0 1. Remove the part of r153848 which optimizes shuffle-of-shuffle into a new by Nadav Rotem · 13 years ago
  44. 961d666 Convert floating point division by a constant into multiplication by the by Duncan Sands · 13 years ago
  45. 0fdfaaf Make the test for r154235 more platform-independent with a shorter string. by Sean Hunt · 13 years ago
  46. 3420e7f Output UTF-8-encoded characters as identifier characters into assembly by Sean Hunt · 13 years ago
  47. 3e59b5e Add lines in global-address.ll to test N32 and N64 code generation. by Akira Hatanaka · 13 years ago
  48. 70fbea7 Allow negative immediates in ARM and Thumb2 compares. by Jakob Stoklund Olesen · 13 years ago
  49. f85cb76 Test case for PR12413 by Craig Topper · 13 years ago
  50. 9a2b6e1 Allow 256-bit shuffles to be split if a 128-bit lane contains elements from a single source. This is a rewrite of the 256-bit shuffle splitting code based on similar code from legalize types. Fixes PR12413. by Craig Topper · 13 years ago
  51. ba9536a Reapply test case in 154038, this time with triple to prevent the backend by Akira Hatanaka · 13 years ago
  52. 740cd65 Don't break the IV update in TLI::SimplifySetCC(). by Jakob Stoklund Olesen · 13 years ago
  53. 17dcaf5 An oversight when applying the patches for r150956 and r150957 to a vanilla tree meant I forgot to svn add these testcases. by James Molloy · 13 years ago
  54. 9243c4f Pass the right sign to TLI->isLegalICmpImmediate. by Jakob Stoklund Olesen · 13 years ago
  55. 56ce6b3 Reapply 154038 without the failing test. by Akira Hatanaka · 13 years ago
  56. 657a4e7 Revert r154038. It was causing make check failures. by Owen Anderson · 13 years ago
  57. e825fb3 Fix LowerGlobalAddress to produce instructions with the correct relocation by Akira Hatanaka · 13 years ago
  58. 86a2733 Fix LowerConstantPool to produce instructions with the correct relocation by Akira Hatanaka · 13 years ago
  59. c5041ca Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr. by Jakob Stoklund Olesen · 13 years ago
  60. 03d830e Fix LowerBlockAddress to produce instructions with the correct relocation by Akira Hatanaka · 13 years ago
  61. 2ce63c7 Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095> by Pete Cooper · 13 years ago
  62. 43b32e0 Add an additional testcase which checks ops with multiple users. by Nadav Rotem · 13 years ago
  63. e3b23cd Allocate virtual registers in ascending order. by Jakob Stoklund Olesen · 13 years ago
  64. be9fe49 During two-address lowering, rescheduling an instruction does not untie by Lang Hames · 13 years ago
  65. ce16784 No need to run llvm-as. by Rafael Espindola · 13 years ago
  66. 44b5e6d Optimizing swizzles of complex shuffles may generate additional complex shuffles. by Nadav Rotem · 13 years ago
  67. 19aa2b5 Enable prefetch generation on PPC64. by Hal Finkel · 13 years ago
  68. 4ac9081 This commit contains a few changes that had to go in together. by Nadav Rotem · 13 years ago
  69. 4d989ac Add instruction itinerary for the PPC64 A2 core. by Hal Finkel · 13 years ago
  70. f10037b Add a triple to the test. by Rafael Espindola · 13 years ago
  71. 95d594c Teach CodeGen's version of computeMaskedBits to understand the range metadata. by Rafael Espindola · 13 years ago
  72. 1c80f56 ARM target should allow codegenprep to duplicate ret instructions to enable tailcall opt. rdar://11140249 by Evan Cheng · 13 years ago
  73. c459d31 Testcase for r153710. by Bill Wendling · 13 years ago
  74. 4108bd3 Add testcase for r153705 by Bill Wendling · 13 years ago
  75. f9e894d Change the constant in this testcase so that it results in a constant pool load. by Lang Hames · 13 years ago
  76. 182c34b The shuffle scheduler is only available in asserts build - make misched-new.ll by Lang Hames · 13 years ago
  77. 616c841 Make x86 REP_MOV* and REP_STO instructions use the correct operand sizes in 64-bit mode. by Lang Hames · 13 years ago
  78. 21ecc2f Expand FREM. by Akira Hatanaka · 13 years ago
  79. 76d0310 For X86, change load/dec-or-inc/store into dec-or-inc, respectively. by Joel Jones · 13 years ago
  80. f75f427 Reverted to revision 153616 to unblock build by Joel Jones · 13 years ago
  81. c367a3e For X86, change load/dec-or-inc/store into dec-or-inc, respectively. by Joel Jones · 13 years ago
  82. 892143f Don't kill the base register when expanding strd. by Jakob Stoklund Olesen · 13 years ago
  83. 5b2f913 Spill DPair registers, not just QPR. by Jakob Stoklund Olesen · 13 years ago
  84. 701ea2b Fix test case. by Akira Hatanaka · 13 years ago
  85. 130ba34 Add a test for the previous commit. Also, remove two tests that were by Eric Christopher · 13 years ago
  86. d6c2355 Post-ra LICM should take care not to hoist an instruction that would clobber a by Evan Cheng · 13 years ago
  87. e279f59 ARM has a peephole optimization which looks for a def / use pair. The def by Evan Cheng · 13 years ago
  88. d792a27 Remove stale CBackend tests. by Benjamin Kramer · 13 years ago
  89. cc85160 Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu by Eli Bendersky · 13 years ago
  90. 179a4dd Fix small-integer VAARG on SVR4 ABI PPC64. by Hal Finkel · 13 years ago
  91. bd618f1 Remove -enable-lsr-nested in time for 3.1. by Andrew Trick · 13 years ago
  92. 544b9b4 [fast-isel] Fold "urem x, pow2" -> "and x, pow2-1". This should fix the 271% by Chad Rosier · 13 years ago
  93. 0726926 misched: tag a few XFAILs that I plan to fix by Andrew Trick · 13 years ago
  94. 10fa51b I meant to disable this test, not XFAIL it by Andrew Trick · 13 years ago
  95. c6a19dd misched: beginning to add unit tests by Andrew Trick · 13 years ago
  96. 768b4e8 Fix test case from r153135. by Chad Rosier · 13 years ago
  97. 1b1fdc0 [avx] Add patterns for combining vextractf128 + vmovaps/vmovups/vmobdqu to by Chad Rosier · 13 years ago
  98. 36a273a [avx] Move the vextractf128 patterns closer to the vextractf128 def. Remove by Chad Rosier · 13 years ago
  99. 1fc999e Fix test. by Chad Rosier · 13 years ago
  100. 33e528d [avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads. by Chad Rosier · 13 years ago