- 4df60f5 Jump table JIT support. Work in progress. by Evan Cheng · 17 years ago
- d03eeaf Teach CellSPU about ELF sections and new section emitter classes. by Scott Michel · 17 years ago
- 8b59db3 Encode misc arithmetic instructions. by Evan Cheng · 17 years ago
- 97f48c3 Encode extend instructions; more clean up. by Evan Cheng · 17 years ago
- 12c3a53 - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm. by Evan Cheng · 17 years ago
- d87293c Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug. by Evan Cheng · 17 years ago
- f007a8b Widening cleanup by Mon P Wang · 17 years ago
- eb4f52e Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>. by Evan Cheng · 17 years ago
- 9092213 Fix so_imm encoding bug; add support for MOVi2pieces. by Evan Cheng · 17 years ago
- fbc9d41 Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls. by Evan Cheng · 17 years ago
- 83b5cf0 Encode pic load / store instructions; fix some encoding bugs. by Evan Cheng · 17 years ago
- edda31c Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions. by Evan Cheng · 17 years ago
- cbb7ab2 Reintroduce a comment that was removed with the AddToISelQueue changes. by Dan Gohman · 17 years ago
- 617303a Test commit, add Makefile for XCore target, more to follow. by Richard Osborne · 17 years ago
- b35ed92 Add more vector move low and zero-extend patterns. by Evan Cheng · 17 years ago
- 9dd93b3 Indentation. by Evan Cheng · 17 years ago
- 8be6bbe Eliminate the ISel priority queue, which used the topological order for a by Dan Gohman · 17 years ago
- fa210d8 Use getTargetConstant instead of getConstant for nodes that should not be visited by Dan Gohman · 17 years ago
- c96a8e7 Rename isGVLazyPtr to isGVNonLazyPtr relocation. This represents Mac OS X by Evan Cheng · 17 years ago
- 3eb22e8 Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls. by Evan Cheng · 17 years ago
- c7c7729 Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes. by Evan Cheng · 17 years ago
- 142c15e Debug output tweak. by Evan Cheng · 17 years ago
- e7fe6724 LDM_RET restores pc, do not set 's' bit which would restore CPSR from SPSR. by Evan Cheng · 17 years ago
- b0b5349 For some targets, it's not possible to place GVs in the same memory buffer as the MachineCodeEmitter allocated memory. Code and data has different read / write / execution privilege requirements. by Evan Cheng · 17 years ago
- e953b89 Stylistic change. by Evan Cheng · 17 years ago
- 25e0478 Handle ARM machine constantpool entries. by Evan Cheng · 17 years ago
- f6503a0 The ANDMask node folds to a constant, and isn't the node that needs to by Dan Gohman · 17 years ago
- 4998736 Remove a dead switch statement. by Evan Cheng · 17 years ago
- afaf120 Minor code restructuring. No functionality change. by Evan Cheng · 17 years ago
- 0a4b9dc Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there. by Jim Grosbach · 17 years ago
- 8f09225 Refactor various TargetAsmInfo subclasses' TargetMachine members away by Dan Gohman · 17 years ago
- 7ab1fc1 Whitespace fixes. No functionality change. by Bill Wendling · 17 years ago
- 2583b2a Add comment. by Evan Cheng · 17 years ago
- 938b9d8 Use better data structure for ConstPoolId2AddrMap. by Evan Cheng · 17 years ago
- ba44df6 Actually make debug output understandable. by Evan Cheng · 17 years ago
- fd532d7 x86_64 rip-relative and magic mode address by Mon P Wang · 17 years ago
- c072966 Forgot this in last commit. by Evan Cheng · 17 years ago
- eb4ed4b Encode PICADD; some code clean up. by Evan Cheng · 17 years ago
- f7c0940 Revert r58489. It isn't correct for all cases. by Bill Wendling · 17 years ago
- 9ed08f4 Change x86 register allocation ordering to match that of gcc. Otherwise some tools get confused by prologue generated by llvm. by Evan Cheng · 17 years ago
- f6a9988 Don't skip over all "terminator" instructions when determining where to put the by Bill Wendling · 17 years ago
- d17cfbe Use MOVSSmr instead of EXTRACTPSmr in the case of extracting by Dan Gohman · 17 years ago
- e53a5af I think we got non-machine specific constpool entries covered. by Evan Cheng · 17 years ago
- 2fbfbd2 Shift amounts should have type getShiftAmountTy by Duncan Sands · 17 years ago
- fa7935f Shift amounts should have the type given by by Duncan Sands · 17 years ago
- 65f2442 ARM JIT should observe -relocation-model command line option. by Evan Cheng · 17 years ago
- 0c39719 Add initial support for vector widening. Logic is set to widen for X86. by Mon P Wang · 17 years ago
- d976c21 Resolve bug 2947: vararg-marked functions must spill registers R3-R79 to stack by Scott Michel · 17 years ago
- 0f28243 Correct way to handle CONSTPOOL_ENTRY instructions. by Evan Cheng · 17 years ago
- 5be59ea Add debugging support. by Evan Cheng · 17 years ago
- 110e3b3 Fix PEXTRQ encoding by Nate Begeman · 17 years ago
- b384ab9 Add a RM pseudoreg for the rounding mode, which by Dale Johannesen · 17 years ago
- bc6d876 Support for constant islands in the ARM JIT. by Jim Grosbach · 17 years ago
- 57760d9 Fix darwin ppc llvm-gcc build breakage: intercept by Duncan Sands · 17 years ago
- 4002a1b Fix a nasty miscompilation of 176.gcc on linux/x86 where we synthesized by Chris Lattner · 17 years ago
- 8ad4c00 by David Greene · 17 years ago
- 2306628 For now, don't split live intervals around x87 stack register barriers. FpGET_ST0_80 must be right after a call instruction (and ADJCALLSTACKUP) so we need to find a way to prevent reload of x87 registers between them. by Evan Cheng · 17 years ago
- 71b7f64 Move the code that adds the DeadMachineInstructionElimPass from by Dan Gohman · 17 years ago
- 46fa139 Support for allocation of TLS variables in the JIT. Allocation of a global by Nicolas Geoffray · 17 years ago
- b74f370 Generate code for TLS instructions. by Nicolas Geoffray · 17 years ago
- 28df32b CMake: lib/Target/ARM/AsmPrinter/CMakeLists.txt added. by Oscar Fuentes · 17 years ago
- f14df02 Mark MFCR as reading all condition code registers. by Dale Johannesen · 17 years ago
- c12e581 Rewrite logic to figure out whether LR needs to by Dale Johannesen · 17 years ago
- 61df3b7 move the note to the correct README by Torok Edwin · 17 years ago
- db1b3bc add note about va_arg code on x86 and x86-64 by Torok Edwin · 17 years ago
- 4047f4a Fix translateX86CC: if SetCCOpcode is SETULE and by Duncan Sands · 17 years ago
- c9f3cc3 Fix constant-offset emission for x86-64 absolute addresses. This by Dan Gohman · 17 years ago
- 639076f Mark defs and uses of CTR and LR correctly. by Dale Johannesen · 17 years ago
- c64bdf6 remove extraneous #ifdef's by Jim Grosbach · 17 years ago
- e80d67e Remove allocation of unused stack slot. by Dale Johannesen · 17 years ago
- 6b6aeb3 Get this working with LegalizeTypes: (1) don't by Duncan Sands · 17 years ago
- aecc22a Fix PR2907 by digging through constant expressions to find FP constants that by Chris Lattner · 17 years ago
- 5c5b6df CMake: Turned some libraries into partially linked objects. Corrected by Oscar Fuentes · 17 years ago
- 9ae0d6d Adjust comments for pedantic satisfaction. by Dale Johannesen · 17 years ago
- 040225f Add comments to explain uint64->f64 algorithm, by Dale Johannesen · 17 years ago
- 1c15bf5 Add an SSE2 algorithm for uint64->f64 conversion. by Dale Johannesen · 17 years ago
- 7b66e04 Implement the optimized FCMP_OEQ/FCMP_UNE code for x86 fast-isel. by Dan Gohman · 17 years ago
- a9ab95b use pre-UAL mnemonics for push/pop for compilaton callback function by Jim Grosbach · 17 years ago
- 54aeea3 Disable constant-offset folding for PowerPC, as the PowerPC target by Dan Gohman · 17 years ago
- 4401361 Don't create TargetGlobalAddress nodes with offsets that don't fit by Dan Gohman · 17 years ago
- 279c22e Optimized FCMP_OEQ and FCMP_UNE for x86. by Dan Gohman · 17 years ago
- 3afda6e When the coalescer is doing rematerializing, have it remove by Dan Gohman · 17 years ago
- 932a32d Update the stub and callback code to handle lazy compilation. The stub by Jim Grosbach · 17 years ago
- ed294c4 Have X86 custom lowering for LegalizeTypes use by Duncan Sands · 17 years ago
- 6520e20 Teach DAGCombine to fold constant offsets into GlobalAddress nodes, by Dan Gohman · 17 years ago
- cb747c5 This is now partly done. by Dan Gohman · 17 years ago
- 97b3827 This is done. by Dan Gohman · 17 years ago
- 109a562 Add implicit defs of XMM8 to XMM15 on 32-bit call instructions. While this is not technically true, it tells tblgen that these instructions "clobber" the entire XMM register file. by Evan Cheng · 17 years ago
- 1fa7198 add support for 128 bit inputs on both x86-64 and x86-32. by Chris Lattner · 17 years ago
- 3d0c4c4 Fix a bug where the x86 backend would reject 64-bit r constraints when by Chris Lattner · 17 years ago
- 4b299d4 Fix lfence and mfence encoding. These look like MRM5r and MRM6r instructions except they do not have any operands. The RegModRM byte is encoded with register number 0. by Evan Cheng · 17 years ago
- 244911b getX86RegNum has long been moved to X86RegisterInfo. by Evan Cheng · 17 years ago
- abec474 add some simple hacky long double support for the CBE. This by Chris Lattner · 17 years ago
- 63f9720 Fun x86 encoding tricks: when adding an immediate value of 128, by Dan Gohman · 17 years ago
- 74feef2 Define patterns for shld and shrd that match immediate by Dan Gohman · 17 years ago
- f522068 Trim #includes. by Dan Gohman · 17 years ago
- cc4ba78 fix typo noticed by sdt by Chris Lattner · 17 years ago
- e79f5ef Fix warnings about mb/me being potentially used by Duncan Sands · 17 years ago
- a354825 add some notes by Chris Lattner · 17 years ago
- c74092b add some notes and a file to collect unimplemented features in the by Chris Lattner · 17 years ago