Log - 50b9efc2a852bab753948a35e6615ace3100c9da - fp2-dev/platform/external/llvm

50b9efc Add support for the x86 instructions "pusha" and "popa". by Nico Weber · 15 years ago
6470a11 Next round of tail call changes. Register used in a tail by Dale Johannesen · 15 years ago
1a913ed Add instruction encoding for the Neon VMOV immediate instruction. This changes by Bob Wilson · 15 years ago
22c687b Added a QQQQ register file to model 4-consecutive Q registers. by Evan Cheng · 15 years ago
1a8b789 Eliminated the classification of control registers into %ecr_ by Sean Callanan · 15 years ago
b63387a Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170. by Evan Cheng · 15 years ago
a0f914b Fixes to edis that mark x86 call targets as by Sean Callanan · 15 years ago
be10811 EDis: Don't include inttypes.h. We support compilers which don't provide it. It was unused anyways. by Benjamin Kramer · 15 years ago
9899f70 Fixed a nasty layering violation in the edis source by Sean Callanan · 15 years ago
127dc5e Use errs instead of fprintf. by Benjamin Kramer · 15 years ago
8f993b8 Added support for ARM disassembly to edis. by Sean Callanan · 15 years ago
f650278 change Target.getInstructionsByEnumValue to return a reference by Chris Lattner · 15 years ago
5e81716 Check in tablegen changes to fix disassembler related failures caused by r98465. by Evan Cheng · 15 years ago
cf57c70 Updated the enhanced disassembly library's TableGen by Sean Callanan · 16 years ago
2db6ff2 Updated the TableGen emitter for the Enhanced by Sean Callanan · 16 years ago
d0bc7f0 Fixed some indentation in the AsmWriterInst by Sean Callanan · 16 years ago
9988ab0 Quick fix to make the header file for the enhanced by Sean Callanan · 16 years ago
95fcebd Added a custom TableGen backend to support the by Sean Callanan · 16 years ago